stm32prog_serial.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <console.h>
  7. #include <dm.h>
  8. #include <dfu.h>
  9. #include <malloc.h>
  10. #include <serial.h>
  11. #include <watchdog.h>
  12. #include <dm/lists.h>
  13. #include <dm/device-internal.h>
  14. #include <linux/delay.h>
  15. #include <asm/global_data.h>
  16. #include "stm32prog.h"
  17. /* - configuration part -----------------------------*/
  18. #define USART_BL_VERSION 0x40 /* USART bootloader version V4.0*/
  19. #define UBOOT_BL_VERSION 0x03 /* bootloader version V0.3*/
  20. #define DEVICE_ID_BYTE1 0x05 /* MSB byte of device ID*/
  21. #define DEVICE_ID_BYTE2 0x00 /* LSB byte of device ID*/
  22. #define USART_RAM_BUFFER_SIZE 256 /* Size of USART_RAM_Buf buffer*/
  23. /* - Commands -----------------------------*/
  24. #define GET_CMD_COMMAND 0x00 /* Get CMD command*/
  25. #define GET_VER_COMMAND 0x01 /* Get Version command*/
  26. #define GET_ID_COMMAND 0x02 /* Get ID command*/
  27. #define GET_PHASE_COMMAND 0x03 /* Get Phase command*/
  28. #define RM_COMMAND 0x11 /* Read Memory command*/
  29. #define READ_PART_COMMAND 0x12 /* Read Partition command*/
  30. #define START_COMMAND 0x21 /* START command (Go)*/
  31. #define DOWNLOAD_COMMAND 0x31 /* Download command*/
  32. /* existing command for other STM32 but not used */
  33. /* ERASE 0x43 */
  34. /* EXTENDED_ERASE 0x44 */
  35. /* WRITE_UNPROTECTED 0x73 */
  36. /* READOUT_PROTECT 0x82 */
  37. /* READOUT_UNPROTECT 0x92 */
  38. /* - miscellaneous defines ----------------------------------------*/
  39. #define INIT_BYTE 0x7F /*Init Byte ID*/
  40. #define ACK_BYTE 0x79 /*Acknowlede Byte ID*/
  41. #define NACK_BYTE 0x1F /*No Acknowlede Byte ID*/
  42. #define ABORT_BYTE 0x5F /*ABORT*/
  43. struct udevice *down_serial_dev;
  44. const u8 cmd_id[] = {
  45. GET_CMD_COMMAND,
  46. GET_VER_COMMAND,
  47. GET_ID_COMMAND,
  48. GET_PHASE_COMMAND,
  49. RM_COMMAND,
  50. READ_PART_COMMAND,
  51. START_COMMAND,
  52. DOWNLOAD_COMMAND
  53. };
  54. #define NB_CMD sizeof(cmd_id)
  55. /* DFU support for serial *********************************************/
  56. static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
  57. {
  58. int alt_id;
  59. if (!data->cur_part)
  60. if (data->phase == PHASE_FLASHLAYOUT)
  61. alt_id = 0;
  62. else
  63. return NULL;
  64. else
  65. alt_id = data->cur_part->alt_id;
  66. return dfu_get_entity(alt_id);
  67. }
  68. static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
  69. u32 buffer_size)
  70. {
  71. struct dfu_entity *dfu_entity;
  72. u8 ret = 0;
  73. dfu_entity = stm32prog_get_entity(data);
  74. if (!dfu_entity)
  75. return -ENODEV;
  76. ret = dfu_write(dfu_entity,
  77. buffer,
  78. buffer_size,
  79. data->dfu_seq);
  80. if (ret) {
  81. stm32prog_err("DFU write failed [%d] cnt: %d",
  82. ret, data->dfu_seq);
  83. }
  84. data->dfu_seq++;
  85. /* handle rollover as in driver/dfu/dfu.c */
  86. data->dfu_seq &= 0xffff;
  87. if (buffer_size == 0)
  88. data->dfu_seq = 0; /* flush done */
  89. return ret;
  90. }
  91. static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
  92. u8 *buffer, u32 buffer_size)
  93. {
  94. struct dfu_entity *dfu_entity;
  95. struct stm32prog_part_t *part;
  96. u32 size;
  97. int ret, i;
  98. if (data->dfu_seq) {
  99. stm32prog_err("DFU write pending for phase %d, seq %d",
  100. data->phase, data->dfu_seq);
  101. return -EINVAL;
  102. }
  103. if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
  104. stm32prog_err("read failed : phase %d is invalid", phase);
  105. return -EINVAL;
  106. }
  107. if (data->read_phase <= PHASE_LAST_USER &&
  108. phase != data->read_phase) {
  109. /* clear previous read session */
  110. dfu_entity = dfu_get_entity(data->read_phase - 1);
  111. if (dfu_entity)
  112. dfu_transaction_cleanup(dfu_entity);
  113. }
  114. dfu_entity = NULL;
  115. /* found partition for the expected phase */
  116. for (i = 0; i < data->part_nb; i++) {
  117. part = &data->part_array[i];
  118. if (part->id == phase)
  119. dfu_entity = dfu_get_entity(part->alt_id);
  120. }
  121. if (!dfu_entity) {
  122. stm32prog_err("read failed : phase %d is unknown", phase);
  123. return -ENODEV;
  124. }
  125. /* clear pending read before to force offset */
  126. if (dfu_entity->inited &&
  127. (data->read_phase != phase || data->offset != offset))
  128. dfu_transaction_cleanup(dfu_entity);
  129. /* initiate before to force offset */
  130. if (!dfu_entity->inited) {
  131. ret = dfu_transaction_initiate(dfu_entity, true);
  132. if (ret < 0) {
  133. stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
  134. ret, phase, offset);
  135. return ret;
  136. }
  137. }
  138. /* force new offset */
  139. if (dfu_entity->offset != offset)
  140. dfu_entity->offset = offset;
  141. data->offset = offset;
  142. data->read_phase = phase;
  143. log_debug("\nSTM32 download read %s offset=0x%x\n",
  144. dfu_entity->name, offset);
  145. ret = dfu_read(dfu_entity, buffer, buffer_size,
  146. dfu_entity->i_blk_seq_num);
  147. if (ret < 0) {
  148. stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
  149. ret, phase, offset);
  150. return ret;
  151. }
  152. size = ret;
  153. if (size < buffer_size) {
  154. data->offset = 0;
  155. data->read_phase = PHASE_END;
  156. memset(buffer + size, 0, buffer_size - size);
  157. } else {
  158. data->offset += size;
  159. }
  160. return ret;
  161. }
  162. /* UART access ***************************************************/
  163. int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
  164. {
  165. struct udevice *dev = NULL;
  166. struct dm_serial_ops *ops;
  167. /* no parity, 8 bits, 1 stop */
  168. u32 serial_config = SERIAL_DEFAULT_CONFIG;
  169. down_serial_dev = NULL;
  170. if (uclass_get_device_by_seq(UCLASS_SERIAL, link_dev, &dev)) {
  171. log_err("serial %d device not found\n", link_dev);
  172. return -ENODEV;
  173. }
  174. down_serial_dev = dev;
  175. /* force silent console on uart only when used */
  176. if (gd->cur_serial_dev == down_serial_dev)
  177. gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
  178. else
  179. gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
  180. ops = serial_get_ops(down_serial_dev);
  181. if (!ops) {
  182. log_err("serial %d = %s missing ops\n", link_dev, dev->name);
  183. return -ENODEV;
  184. }
  185. if (!ops->setconfig) {
  186. log_err("serial %d = %s missing setconfig\n", link_dev, dev->name);
  187. return -ENODEV;
  188. }
  189. clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
  190. data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
  191. USART_RAM_BUFFER_SIZE);
  192. return ops->setconfig(down_serial_dev, serial_config);
  193. }
  194. static void stm32prog_serial_flush(void)
  195. {
  196. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  197. int err;
  198. do {
  199. err = ops->getc(down_serial_dev);
  200. } while (err != -EAGAIN);
  201. }
  202. static int stm32prog_serial_getc_err(void)
  203. {
  204. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  205. int err;
  206. do {
  207. err = ops->getc(down_serial_dev);
  208. if (err == -EAGAIN) {
  209. ctrlc();
  210. WATCHDOG_RESET();
  211. }
  212. } while ((err == -EAGAIN) && (!had_ctrlc()));
  213. return err;
  214. }
  215. static u8 stm32prog_serial_getc(void)
  216. {
  217. int err;
  218. err = stm32prog_serial_getc_err();
  219. return err >= 0 ? err : 0;
  220. }
  221. static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
  222. {
  223. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  224. int err;
  225. do {
  226. err = ops->getc(down_serial_dev);
  227. if (err >= 0) {
  228. *buffer++ = err;
  229. *count -= 1;
  230. } else if (err == -EAGAIN) {
  231. ctrlc();
  232. WATCHDOG_RESET();
  233. } else {
  234. break;
  235. }
  236. } while (*count && !had_ctrlc());
  237. return !!(err < 0);
  238. }
  239. static void stm32prog_serial_putc(u8 w_byte)
  240. {
  241. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  242. int err;
  243. do {
  244. err = ops->putc(down_serial_dev, w_byte);
  245. } while (err == -EAGAIN);
  246. }
  247. /* Helper function ************************************************/
  248. static u8 stm32prog_header(struct stm32prog_data *data)
  249. {
  250. u8 ret;
  251. u8 boot = 0;
  252. struct dfu_entity *dfu_entity;
  253. u64 size = 0;
  254. dfu_entity = stm32prog_get_entity(data);
  255. if (!dfu_entity)
  256. return -ENODEV;
  257. printf("\nSTM32 download write %s\n", dfu_entity->name);
  258. /* force cleanup to avoid issue with previous read */
  259. dfu_transaction_cleanup(dfu_entity);
  260. ret = stm32prog_header_check(data->header_data,
  261. &data->header);
  262. /* no header : max size is partition size */
  263. if (ret) {
  264. dfu_entity->get_medium_size(dfu_entity, &size);
  265. data->header.image_length = size;
  266. }
  267. /**** Flash the header if necessary for boot partition */
  268. if (data->phase < PHASE_FIRST_USER)
  269. boot = 1;
  270. /* write header if boot partition */
  271. if (boot) {
  272. if (ret) {
  273. stm32prog_err("invalid header (error %d)", ret);
  274. } else {
  275. ret = stm32prog_write(data,
  276. (u8 *)data->header_data,
  277. BL_HEADER_SIZE);
  278. }
  279. } else {
  280. if (ret)
  281. printf(" partition without checksum\n");
  282. ret = 0;
  283. }
  284. free(data->header_data);
  285. data->header_data = NULL;
  286. return ret;
  287. }
  288. static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
  289. {
  290. u8 ret = 0;
  291. struct dfu_entity *dfu_entity;
  292. if (address < 0x100) {
  293. if (address == PHASE_OTP)
  294. return stm32prog_otp_start(data);
  295. if (address == PHASE_PMIC)
  296. return stm32prog_pmic_start(data);
  297. if (address == PHASE_RESET || address == PHASE_END) {
  298. data->cur_part = NULL;
  299. data->dfu_seq = 0;
  300. data->phase = address;
  301. return 0;
  302. }
  303. if (address != data->phase) {
  304. stm32prog_err("invalid received phase id %d, current phase is %d",
  305. (u8)address, (u8)data->phase);
  306. return -EINVAL;
  307. }
  308. }
  309. /* check the last loaded partition */
  310. if (address == DEFAULT_ADDRESS || address == data->phase) {
  311. switch (data->phase) {
  312. case PHASE_END:
  313. case PHASE_RESET:
  314. case PHASE_DO_RESET:
  315. data->cur_part = NULL;
  316. data->phase = PHASE_DO_RESET;
  317. return 0;
  318. }
  319. dfu_entity = stm32prog_get_entity(data);
  320. if (!dfu_entity)
  321. return -ENODEV;
  322. ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
  323. if (ret) {
  324. stm32prog_err("DFU flush failed [%d]", ret);
  325. return ret;
  326. }
  327. data->dfu_seq = 0;
  328. printf("\n received length = 0x%x\n", data->cursor);
  329. if (data->header.present) {
  330. if (data->cursor !=
  331. (data->header.image_length + BL_HEADER_SIZE)) {
  332. stm32prog_err("transmission interrupted (length=0x%x expected=0x%x)",
  333. data->cursor,
  334. data->header.image_length +
  335. BL_HEADER_SIZE);
  336. return -EIO;
  337. }
  338. if (data->header.image_checksum != data->checksum) {
  339. stm32prog_err("invalid checksum received (0x%x expected 0x%x)",
  340. data->checksum,
  341. data->header.image_checksum);
  342. return -EIO;
  343. }
  344. printf("\n checksum OK (0x%x)\n", data->checksum);
  345. }
  346. /* update DFU with received flashlayout */
  347. if (data->phase == PHASE_FLASHLAYOUT)
  348. stm32prog_dfu_init(data);
  349. } else {
  350. void (*entry)(void) = (void *)address;
  351. printf("## Starting application at 0x%x ...\n", address);
  352. (*entry)();
  353. printf("## Application terminated\n");
  354. ret = -ENOEXEC;
  355. }
  356. return ret;
  357. }
  358. /**
  359. * get_address() - Get address if it is valid
  360. *
  361. * @tmp_xor: Current xor value to update
  362. * @return The address area
  363. */
  364. static u32 get_address(u8 *tmp_xor)
  365. {
  366. u32 address = 0x0;
  367. u8 data;
  368. data = stm32prog_serial_getc();
  369. *tmp_xor ^= data;
  370. address |= ((u32)data) << 24;
  371. data = stm32prog_serial_getc();
  372. address |= ((u32)data) << 16;
  373. *tmp_xor ^= data;
  374. data = stm32prog_serial_getc();
  375. address |= ((u32)data) << 8;
  376. *tmp_xor ^= data;
  377. data = stm32prog_serial_getc();
  378. address |= ((u32)data);
  379. *tmp_xor ^= data;
  380. return address;
  381. }
  382. static void stm32prog_serial_result(u8 result)
  383. {
  384. /* always flush fifo before to send result */
  385. stm32prog_serial_flush();
  386. stm32prog_serial_putc(result);
  387. }
  388. /* Command -----------------------------------------------*/
  389. /**
  390. * get_cmd_command() - Respond to Get command
  391. *
  392. * @data: Current command context
  393. */
  394. static void get_cmd_command(struct stm32prog_data *data)
  395. {
  396. u32 counter = 0x0;
  397. stm32prog_serial_putc(NB_CMD);
  398. stm32prog_serial_putc(USART_BL_VERSION);
  399. for (counter = 0; counter < NB_CMD; counter++)
  400. stm32prog_serial_putc(cmd_id[counter]);
  401. stm32prog_serial_result(ACK_BYTE);
  402. }
  403. /**
  404. * get_version_command() - Respond to Get Version command
  405. *
  406. * @data: Current command context
  407. */
  408. static void get_version_command(struct stm32prog_data *data)
  409. {
  410. stm32prog_serial_putc(UBOOT_BL_VERSION);
  411. stm32prog_serial_result(ACK_BYTE);
  412. }
  413. /**
  414. * get_id_command() - Respond to Get ID command
  415. *
  416. * @data: Current command context
  417. */
  418. static void get_id_command(struct stm32prog_data *data)
  419. {
  420. /* Send Device IDCode */
  421. stm32prog_serial_putc(0x1);
  422. stm32prog_serial_putc(DEVICE_ID_BYTE1);
  423. stm32prog_serial_putc(DEVICE_ID_BYTE2);
  424. stm32prog_serial_result(ACK_BYTE);
  425. }
  426. /**
  427. * get_phase_command() - Respond to Get phase
  428. *
  429. * @data: Current command context
  430. */
  431. static void get_phase_command(struct stm32prog_data *data)
  432. {
  433. char *err_msg = NULL;
  434. u8 i, length = 0;
  435. u32 destination = DEFAULT_ADDRESS; /* destination address */
  436. int phase = data->phase;
  437. if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
  438. err_msg = stm32prog_get_error(data);
  439. length = strlen(err_msg);
  440. }
  441. if (phase == PHASE_FLASHLAYOUT)
  442. destination = STM32_DDR_BASE;
  443. stm32prog_serial_putc(length + 5); /* Total length */
  444. stm32prog_serial_putc(phase & 0xFF); /* partition ID */
  445. stm32prog_serial_putc(destination); /* byte 1 of address */
  446. stm32prog_serial_putc(destination >> 8); /* byte 2 of address */
  447. stm32prog_serial_putc(destination >> 16); /* byte 3 of address */
  448. stm32prog_serial_putc(destination >> 24); /* byte 4 of address */
  449. stm32prog_serial_putc(length); /* Information length */
  450. for (i = 0; i < length; i++)
  451. stm32prog_serial_putc(err_msg[i]);
  452. stm32prog_serial_result(ACK_BYTE);
  453. if (phase == PHASE_RESET)
  454. stm32prog_do_reset(data);
  455. }
  456. /**
  457. * read_memory_command() - Read data from memory
  458. *
  459. * @data: Current command context
  460. */
  461. static void read_memory_command(struct stm32prog_data *data)
  462. {
  463. u32 address = 0x0;
  464. u8 rcv_data = 0x0, tmp_xor = 0x0;
  465. u32 counter = 0x0;
  466. /* Read memory address */
  467. address = get_address(&tmp_xor);
  468. /* If address memory is not received correctly */
  469. rcv_data = stm32prog_serial_getc();
  470. if (rcv_data != tmp_xor) {
  471. stm32prog_serial_result(NACK_BYTE);
  472. return;
  473. }
  474. stm32prog_serial_result(ACK_BYTE);
  475. /* Read the number of bytes to be received:
  476. * Max NbrOfData = Data + 1 = 256
  477. */
  478. rcv_data = stm32prog_serial_getc();
  479. tmp_xor = ~rcv_data;
  480. if (stm32prog_serial_getc() != tmp_xor) {
  481. stm32prog_serial_result(NACK_BYTE);
  482. return;
  483. }
  484. /* If checksum is correct send ACK */
  485. stm32prog_serial_result(ACK_BYTE);
  486. /* Send data to the host:
  487. * Number of data to read = data + 1
  488. */
  489. for (counter = (rcv_data + 1); counter != 0; counter--)
  490. stm32prog_serial_putc(*(u8 *)(address++));
  491. }
  492. /**
  493. * start_command() - Respond to start command
  494. *
  495. * Jump to user application in RAM or partition check
  496. *
  497. * @data: Current command context
  498. */
  499. static void start_command(struct stm32prog_data *data)
  500. {
  501. u32 address = 0;
  502. u8 tmp_xor = 0x0;
  503. u8 ret, rcv_data;
  504. /* Read memory address */
  505. address = get_address(&tmp_xor);
  506. /* If address memory is not received correctly */
  507. rcv_data = stm32prog_serial_getc();
  508. if (rcv_data != tmp_xor) {
  509. stm32prog_serial_result(NACK_BYTE);
  510. return;
  511. }
  512. /* validate partition */
  513. ret = stm32prog_start(data,
  514. address);
  515. if (ret)
  516. stm32prog_serial_result(ABORT_BYTE);
  517. else
  518. stm32prog_serial_result(ACK_BYTE);
  519. }
  520. /**
  521. * download_command() - Respond to download command
  522. *
  523. * Write data to not volatile memory, Flash
  524. *
  525. * @data: Current command context
  526. */
  527. static void download_command(struct stm32prog_data *data)
  528. {
  529. u32 address = 0x0;
  530. u8 my_xor = 0x0;
  531. u8 rcv_xor;
  532. u32 counter = 0x0, codesize = 0x0;
  533. u8 *ramaddress = 0;
  534. u8 rcv_data = 0x0;
  535. struct image_header_s *image_header = &data->header;
  536. u32 cursor = data->cursor;
  537. long size = 0;
  538. u8 operation;
  539. u32 packet_number;
  540. u32 result = ACK_BYTE;
  541. u8 ret;
  542. unsigned int i;
  543. bool error;
  544. int rcv;
  545. address = get_address(&my_xor);
  546. /* If address memory is not received correctly */
  547. rcv_xor = stm32prog_serial_getc();
  548. if (rcv_xor != my_xor) {
  549. result = NACK_BYTE;
  550. goto end;
  551. }
  552. /* If address valid send ACK */
  553. stm32prog_serial_result(ACK_BYTE);
  554. /* get packet number and operation type */
  555. operation = (u8)((u32)address >> 24);
  556. packet_number = ((u32)(((u32)address << 8))) >> 8;
  557. switch (operation) {
  558. /* supported operation */
  559. case PHASE_FLASHLAYOUT:
  560. case PHASE_OTP:
  561. case PHASE_PMIC:
  562. break;
  563. default:
  564. result = NACK_BYTE;
  565. goto end;
  566. }
  567. /* check the packet number */
  568. if (packet_number == 0) {
  569. /* erase: re-initialize the image_header struct */
  570. data->packet_number = 0;
  571. if (data->header_data)
  572. memset(data->header_data, 0, BL_HEADER_SIZE);
  573. else
  574. data->header_data = calloc(1, BL_HEADER_SIZE);
  575. cursor = 0;
  576. data->cursor = 0;
  577. data->checksum = 0;
  578. /*idx = cursor;*/
  579. } else {
  580. data->packet_number++;
  581. }
  582. /* Check with the number of current packet if the device receive
  583. * the true packet
  584. */
  585. if (packet_number != data->packet_number) {
  586. data->packet_number--;
  587. result = NACK_BYTE;
  588. goto end;
  589. }
  590. /*-- Read number of bytes to be written and data -----------*/
  591. /* Read the number of bytes to be written:
  592. * Max NbrOfData = data + 1 <= 256
  593. */
  594. rcv_data = stm32prog_serial_getc();
  595. /* NbrOfData to write = data + 1 */
  596. codesize = rcv_data + 0x01;
  597. if (codesize > USART_RAM_BUFFER_SIZE) {
  598. result = NACK_BYTE;
  599. goto end;
  600. }
  601. /* Checksum Initialization */
  602. my_xor = rcv_data;
  603. /* UART receive data and send to Buffer */
  604. counter = codesize;
  605. error = stm32prog_serial_get_buffer(data->buffer, &counter);
  606. /* read checksum */
  607. if (!error) {
  608. rcv = stm32prog_serial_getc_err();
  609. error = !!(rcv < 0);
  610. rcv_xor = rcv;
  611. }
  612. if (error) {
  613. printf("transmission error on packet %d, byte %d\n",
  614. packet_number, codesize - counter);
  615. /* waiting end of packet before flush & NACK */
  616. mdelay(30);
  617. data->packet_number--;
  618. result = NACK_BYTE;
  619. goto end;
  620. }
  621. /* Compute Checksum */
  622. ramaddress = data->buffer;
  623. for (counter = codesize; counter != 0; counter--)
  624. my_xor ^= *(ramaddress++);
  625. /* If Checksum is incorrect */
  626. if (rcv_xor != my_xor) {
  627. printf("checksum error on packet %d\n",
  628. packet_number);
  629. /* wait to be sure that all data are received
  630. * in the FIFO before flush
  631. */
  632. mdelay(30);
  633. data->packet_number--;
  634. result = NACK_BYTE;
  635. goto end;
  636. }
  637. /* Update current position in buffer */
  638. data->cursor += codesize;
  639. if (operation == PHASE_OTP) {
  640. size = data->cursor - cursor;
  641. /* no header for OTP */
  642. if (stm32prog_otp_write(data, cursor,
  643. data->buffer, &size))
  644. result = ABORT_BYTE;
  645. goto end;
  646. }
  647. if (operation == PHASE_PMIC) {
  648. size = data->cursor - cursor;
  649. /* no header for PMIC */
  650. if (stm32prog_pmic_write(data, cursor,
  651. data->buffer, &size))
  652. result = ABORT_BYTE;
  653. goto end;
  654. }
  655. if (cursor < BL_HEADER_SIZE) {
  656. /* size = portion of header in this chunck */
  657. if (data->cursor >= BL_HEADER_SIZE)
  658. size = BL_HEADER_SIZE - cursor;
  659. else
  660. size = data->cursor - cursor;
  661. memcpy((void *)((u32)(data->header_data) + cursor),
  662. data->buffer, size);
  663. cursor += size;
  664. if (cursor == BL_HEADER_SIZE) {
  665. /* Check and Write the header */
  666. if (stm32prog_header(data)) {
  667. result = ABORT_BYTE;
  668. goto end;
  669. }
  670. } else {
  671. goto end;
  672. }
  673. }
  674. if (image_header->present) {
  675. if (data->cursor <= BL_HEADER_SIZE)
  676. goto end;
  677. /* compute checksum on payload */
  678. for (i = (unsigned long)size; i < codesize; i++)
  679. data->checksum += data->buffer[i];
  680. if (data->cursor >
  681. image_header->image_length + BL_HEADER_SIZE) {
  682. log_err("expected size exceeded\n");
  683. result = ABORT_BYTE;
  684. goto end;
  685. }
  686. /* write data (payload) */
  687. ret = stm32prog_write(data,
  688. &data->buffer[size],
  689. codesize - size);
  690. } else {
  691. /* write all */
  692. ret = stm32prog_write(data,
  693. data->buffer,
  694. codesize);
  695. }
  696. if (ret)
  697. result = ABORT_BYTE;
  698. end:
  699. stm32prog_serial_result(result);
  700. }
  701. /**
  702. * read_partition() - Respond to read command
  703. *
  704. * Read data from not volatile memory, Flash
  705. *
  706. * @data: Current command context
  707. */
  708. static void read_partition_command(struct stm32prog_data *data)
  709. {
  710. u32 i, part_id, codesize, offset = 0, rcv_data;
  711. long size;
  712. u8 tmp_xor;
  713. int res;
  714. u8 buffer[256];
  715. part_id = stm32prog_serial_getc();
  716. tmp_xor = part_id;
  717. offset = get_address(&tmp_xor);
  718. rcv_data = stm32prog_serial_getc();
  719. if (rcv_data != tmp_xor) {
  720. log_debug("1st checksum received = %x, computed %x\n",
  721. rcv_data, tmp_xor);
  722. goto error;
  723. }
  724. stm32prog_serial_putc(ACK_BYTE);
  725. /* NbrOfData to read = data + 1 */
  726. rcv_data = stm32prog_serial_getc();
  727. codesize = rcv_data + 0x01;
  728. tmp_xor = rcv_data;
  729. rcv_data = stm32prog_serial_getc();
  730. if ((rcv_data ^ tmp_xor) != 0xFF) {
  731. log_debug("2nd checksum received = %x, computed %x\n",
  732. rcv_data, tmp_xor);
  733. goto error;
  734. }
  735. log_debug("%s : %x\n", __func__, part_id);
  736. rcv_data = 0;
  737. switch (part_id) {
  738. case PHASE_OTP:
  739. size = codesize;
  740. if (!stm32prog_otp_read(data, offset, buffer, &size))
  741. rcv_data = size;
  742. break;
  743. case PHASE_PMIC:
  744. size = codesize;
  745. if (!stm32prog_pmic_read(data, offset, buffer, &size))
  746. rcv_data = size;
  747. break;
  748. default:
  749. res = stm32prog_read(data, part_id, offset,
  750. buffer, codesize);
  751. if (res > 0)
  752. rcv_data = res;
  753. break;
  754. }
  755. if (rcv_data > 0) {
  756. stm32prog_serial_putc(ACK_BYTE);
  757. /*----------- Send data to the host -----------*/
  758. for (i = 0; i < rcv_data; i++)
  759. stm32prog_serial_putc(buffer[i]);
  760. /*----------- Send filler to the host -----------*/
  761. for (; i < codesize; i++)
  762. stm32prog_serial_putc(0x0);
  763. return;
  764. }
  765. stm32prog_serial_result(ABORT_BYTE);
  766. return;
  767. error:
  768. stm32prog_serial_result(NACK_BYTE);
  769. }
  770. /* MAIN function = SERIAL LOOP ***********************************************/
  771. /**
  772. * stm32prog_serial_loop() - USART bootloader Loop routine
  773. *
  774. * @data: Current command context
  775. * @return true if reset is needed after loop
  776. */
  777. bool stm32prog_serial_loop(struct stm32prog_data *data)
  778. {
  779. u32 counter = 0x0;
  780. u8 command = 0x0;
  781. u8 found;
  782. int phase = data->phase;
  783. /* element of cmd_func need to aligned with cmd_id[]*/
  784. void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
  785. /* GET_CMD_COMMAND */ get_cmd_command,
  786. /* GET_VER_COMMAND */ get_version_command,
  787. /* GET_ID_COMMAND */ get_id_command,
  788. /* GET_PHASE_COMMAND */ get_phase_command,
  789. /* RM_COMMAND */ read_memory_command,
  790. /* READ_PART_COMMAND */ read_partition_command,
  791. /* START_COMMAND */ start_command,
  792. /* DOWNLOAD_COMMAND */ download_command
  793. };
  794. /* flush and NACK pending command received during u-boot init
  795. * request command reemit
  796. */
  797. stm32prog_serial_result(NACK_BYTE);
  798. clear_ctrlc(); /* forget any previous Control C */
  799. while (!had_ctrlc()) {
  800. phase = data->phase;
  801. if (phase == PHASE_DO_RESET)
  802. return true;
  803. /* Get the user command: read first byte */
  804. command = stm32prog_serial_getc();
  805. if (command == INIT_BYTE) {
  806. puts("\nConnected\n");
  807. stm32prog_serial_result(ACK_BYTE);
  808. continue;
  809. }
  810. found = 0;
  811. for (counter = 0; counter < NB_CMD; counter++)
  812. if (cmd_id[counter] == command) {
  813. found = 1;
  814. break;
  815. }
  816. if (found)
  817. if ((command ^ stm32prog_serial_getc()) != 0xFF)
  818. found = 0;
  819. if (!found) {
  820. /* wait to be sure that all data are received
  821. * in the FIFO before flush (CMD and XOR)
  822. */
  823. mdelay(3);
  824. stm32prog_serial_result(NACK_BYTE);
  825. } else {
  826. stm32prog_serial_result(ACK_BYTE);
  827. cmd_func[counter](data);
  828. }
  829. WATCHDOG_RESET();
  830. }
  831. /* clean device */
  832. if (gd->cur_serial_dev == down_serial_dev) {
  833. /* restore console on uart */
  834. gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
  835. }
  836. down_serial_dev = NULL;
  837. return false; /* no reset after ctrlc */
  838. }