reset_manager.h 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
  4. */
  5. #ifndef _RESET_MANAGER_H_
  6. #define _RESET_MANAGER_H_
  7. phys_addr_t socfpga_get_rstmgr_addr(void);
  8. void reset_cpu(void);
  9. void socfpga_per_reset(u32 reset, int set);
  10. void socfpga_per_reset_all(void);
  11. #define RSTMGR_CTRL_SWCOLDRSTREQ_LSB 0
  12. #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
  13. /*
  14. * Define a reset identifier, from which a permodrst bank ID
  15. * and reset ID can be extracted using the subsequent macros
  16. * RSTMGR_RESET() and RSTMGR_BANK().
  17. */
  18. #define RSTMGR_BANK_OFFSET 8
  19. #define RSTMGR_BANK_MASK 0x7
  20. #define RSTMGR_RESET_OFFSET 0
  21. #define RSTMGR_RESET_MASK 0x1f
  22. #define RSTMGR_DEFINE(_bank, _offset) \
  23. ((_bank) << RSTMGR_BANK_OFFSET) | ((_offset) << RSTMGR_RESET_OFFSET)
  24. /* Extract reset ID from the reset identifier. */
  25. #define RSTMGR_RESET(_reset) \
  26. (((_reset) >> RSTMGR_RESET_OFFSET) & RSTMGR_RESET_MASK)
  27. /* Extract bank ID from the reset identifier. */
  28. #define RSTMGR_BANK(_reset) \
  29. (((_reset) >> RSTMGR_BANK_OFFSET) & RSTMGR_BANK_MASK)
  30. /* Create a human-readable reference to SoCFPGA reset. */
  31. #define SOCFPGA_RESET(_name) RSTMGR_##_name
  32. #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
  33. #include <asm/arch/reset_manager_gen5.h>
  34. #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
  35. #include <asm/arch/reset_manager_arria10.h>
  36. #elif defined(CONFIG_TARGET_SOCFPGA_SOC64)
  37. #include <asm/arch/reset_manager_soc64.h>
  38. #endif
  39. #endif /* _RESET_MANAGER_H_ */