Makefile 2.2 KB

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  1. # SPDX-License-Identifier: GPL-2.0+
  2. #
  3. # (C) Copyright 2000-2003
  4. # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. #
  6. # Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
  7. # Copyright (C) 2017-2020 Intel Corporation <www.intel.com>
  8. obj-y += board.o
  9. obj-y += clock_manager.o
  10. obj-y += misc.o
  11. ifdef CONFIG_TARGET_SOCFPGA_GEN5
  12. obj-y += clock_manager_gen5.o
  13. obj-y += misc_gen5.o
  14. obj-y += reset_manager_gen5.o
  15. obj-y += scan_manager.o
  16. obj-y += system_manager_gen5.o
  17. obj-y += timer.o
  18. obj-y += wrap_pll_config.o
  19. obj-y += fpga_manager.o
  20. endif
  21. ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
  22. obj-y += clock_manager_arria10.o
  23. obj-y += misc_arria10.o
  24. obj-y += pinmux_arria10.o
  25. obj-y += reset_manager_arria10.o
  26. endif
  27. ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
  28. obj-y += clock_manager_s10.o
  29. obj-y += lowlevel_init_soc64.o
  30. obj-y += mailbox_s10.o
  31. obj-y += misc_s10.o
  32. obj-y += mmu-arm64_s10.o
  33. obj-y += reset_manager_s10.o
  34. obj-y += system_manager_s10.o
  35. obj-y += timer_s10.o
  36. obj-y += wrap_pinmux_config_s10.o
  37. obj-y += wrap_pll_config_s10.o
  38. endif
  39. ifdef CONFIG_TARGET_SOCFPGA_AGILEX
  40. obj-y += clock_manager_agilex.o
  41. obj-y += lowlevel_init_soc64.o
  42. obj-y += mailbox_s10.o
  43. obj-y += misc_s10.o
  44. obj-y += mmu-arm64_s10.o
  45. obj-y += reset_manager_s10.o
  46. obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += secure_vab.o
  47. obj-y += system_manager_s10.o
  48. obj-y += timer_s10.o
  49. obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += vab.o
  50. obj-y += wrap_pinmux_config_s10.o
  51. obj-y += wrap_pll_config_s10.o
  52. endif
  53. ifdef CONFIG_SPL_BUILD
  54. ifdef CONFIG_TARGET_SOCFPGA_GEN5
  55. obj-y += spl_gen5.o
  56. obj-y += freeze_controller.o
  57. obj-y += wrap_iocsr_config.o
  58. obj-y += wrap_pinmux_config.o
  59. obj-y += wrap_sdram_config.o
  60. endif
  61. ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
  62. obj-y += spl_a10.o
  63. endif
  64. ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
  65. obj-y += firewall.o
  66. obj-y += spl_s10.o
  67. endif
  68. ifdef CONFIG_TARGET_SOCFPGA_AGILEX
  69. obj-y += firewall.o
  70. obj-y += spl_agilex.o
  71. endif
  72. else
  73. obj-$(CONFIG_SPL_ATF) += secure_reg_helper.o
  74. obj-$(CONFIG_SPL_ATF) += smc_api.o
  75. endif
  76. ifdef CONFIG_TARGET_SOCFPGA_GEN5
  77. # QTS-generated config file wrappers
  78. CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR)
  79. CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR)
  80. CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR)
  81. CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR)
  82. endif