sys_env_lib.c 6.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) Marvell International Ltd. and its affiliates
  4. */
  5. #include <common.h>
  6. #include <spl.h>
  7. #include <asm/io.h>
  8. #include <asm/arch/cpu.h>
  9. #include <asm/arch/soc.h>
  10. #include "seq_exec.h"
  11. #include "sys_env_lib.h"
  12. enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
  13. /* 6820 6810 6811 6828 */
  14. /* PEX_UNIT_ID */ { 4, 3, 3, 4},
  15. /* ETH_GIG_UNIT_ID */ { 3, 2, 3, 3},
  16. /* USB3H_UNIT_ID */ { 2, 2, 2, 2},
  17. /* USB3D_UNIT_ID */ { 1, 1, 1, 1},
  18. /* SATA_UNIT_ID */ { 2, 2, 2, 4},
  19. /* QSGMII_UNIT_ID */ { 1, 0, 0, 1},
  20. /* XAUI_UNIT_ID */ { 0, 0, 0, 0},
  21. /* RXAUI_UNIT_ID */ { 0, 0, 0, 0}
  22. };
  23. u32 g_dev_id = -1;
  24. u32 mv_board_id_get(void)
  25. {
  26. #if defined(CONFIG_TARGET_DB_88F6820_GP)
  27. return DB_GP_68XX_ID;
  28. #else
  29. /*
  30. * Return 0 here for custom board as this should not be used
  31. * for custom boards.
  32. */
  33. return 0;
  34. #endif
  35. }
  36. u32 mv_board_tclk_get(void)
  37. {
  38. u32 value;
  39. value = (reg_read(DEVICE_SAMPLE_AT_RESET1_REG) >> 15) & 0x1;
  40. switch (value) {
  41. case (0x0):
  42. return 250000000;
  43. case (0x1):
  44. return 200000000;
  45. default:
  46. return 0xffffffff;
  47. }
  48. }
  49. u32 mv_board_id_index_get(u32 board_id)
  50. {
  51. /*
  52. * Marvell Boards use 0x10 as base for Board ID:
  53. * mask MSB to receive index for board ID
  54. */
  55. return board_id & (MARVELL_BOARD_ID_MASK - 1);
  56. }
  57. /*
  58. * sys_env_suspend_wakeup_check
  59. * DESCRIPTION: Reads GPIO input for suspend-wakeup indication.
  60. * INPUT: None.
  61. * OUTPUT:
  62. * RETURNS: u32 indicating suspend wakeup status:
  63. * 0 - Not supported,
  64. * 1 - supported: read magic word detect wakeup,
  65. * 2 - detected wakeup from GPIO.
  66. */
  67. enum suspend_wakeup_status sys_env_suspend_wakeup_check(void)
  68. {
  69. u32 reg, board_id_index, gpio;
  70. struct board_wakeup_gpio board_gpio[] = MV_BOARD_WAKEUP_GPIO_INFO;
  71. board_id_index = mv_board_id_index_get(mv_board_id_get());
  72. if (!(sizeof(board_gpio) / sizeof(struct board_wakeup_gpio) >
  73. board_id_index)) {
  74. printf("\n_failed loading Suspend-Wakeup information (invalid board ID)\n");
  75. return SUSPEND_WAKEUP_DISABLED;
  76. }
  77. /*
  78. * - Detect if Suspend-Wakeup is supported on current board
  79. * - Fetch the GPIO number for wakeup status input indication
  80. */
  81. if (board_gpio[board_id_index].gpio_num == -1) {
  82. /* Suspend to RAM is not supported */
  83. return SUSPEND_WAKEUP_DISABLED;
  84. } else if (board_gpio[board_id_index].gpio_num == -2) {
  85. /*
  86. * Suspend to RAM is supported but GPIO indication is
  87. * not implemented - Skip
  88. */
  89. return SUSPEND_WAKEUP_ENABLED;
  90. } else {
  91. gpio = board_gpio[board_id_index].gpio_num;
  92. }
  93. /* Initialize MPP for GPIO (set MPP = 0x0) */
  94. reg = reg_read(MPP_CONTROL_REG(MPP_REG_NUM(gpio)));
  95. /* reset MPP21 to 0x0, keep rest of MPP settings*/
  96. reg &= ~MPP_MASK(gpio);
  97. reg_write(MPP_CONTROL_REG(MPP_REG_NUM(gpio)), reg);
  98. /* Initialize GPIO as input */
  99. reg = reg_read(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)));
  100. reg |= GPP_MASK(gpio);
  101. reg_write(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)), reg);
  102. /*
  103. * Check GPP for input status from PIC: 0 - regular init,
  104. * 1 - suspend wakeup
  105. */
  106. reg = reg_read(GPP_DATA_IN_REG(GPP_REG_NUM(gpio)));
  107. /* if GPIO is ON: wakeup from S2RAM indication detected */
  108. return (reg & GPP_MASK(gpio)) ? SUSPEND_WAKEUP_ENABLED_GPIO_DETECTED :
  109. SUSPEND_WAKEUP_DISABLED;
  110. }
  111. /*
  112. * mv_ctrl_dev_id_index_get
  113. *
  114. * DESCRIPTION: return SOC device index
  115. * INPUT: None
  116. * OUTPUT: None
  117. * RETURN:
  118. * return SOC device index
  119. */
  120. u32 sys_env_id_index_get(u32 ctrl_model)
  121. {
  122. switch (ctrl_model) {
  123. case MV_6820_DEV_ID:
  124. return MV_6820_INDEX;
  125. case MV_6810_DEV_ID:
  126. return MV_6810_INDEX;
  127. case MV_6811_DEV_ID:
  128. return MV_6811_INDEX;
  129. case MV_6828_DEV_ID:
  130. return MV_6828_INDEX;
  131. case MV_6920_DEV_ID:
  132. return MV_6920_INDEX;
  133. case MV_6928_DEV_ID:
  134. return MV_6928_INDEX;
  135. default:
  136. return MV_6820_INDEX;
  137. }
  138. }
  139. u32 sys_env_unit_max_num_get(enum unit_id unit)
  140. {
  141. u32 dev_id_index;
  142. if (unit >= MAX_UNITS_ID) {
  143. printf("%s: Error: Wrong unit type (%u)\n", __func__, unit);
  144. return 0;
  145. }
  146. dev_id_index = sys_env_id_index_get(sys_env_model_get());
  147. return sys_env_soc_unit_nums[unit][dev_id_index];
  148. }
  149. /*
  150. * sys_env_model_get
  151. * DESCRIPTION: Returns 16bit describing the device model (ID) as defined
  152. * in Vendor ID configuration register
  153. */
  154. u16 sys_env_model_get(void)
  155. {
  156. u32 default_ctrl_id, ctrl_id = reg_read(DEV_ID_REG);
  157. ctrl_id = (ctrl_id & (DEV_ID_REG_DEVICE_ID_MASK)) >>
  158. DEV_ID_REG_DEVICE_ID_OFFS;
  159. switch (ctrl_id) {
  160. case MV_6820_DEV_ID:
  161. case MV_6810_DEV_ID:
  162. case MV_6811_DEV_ID:
  163. case MV_6828_DEV_ID:
  164. case MV_6920_DEV_ID:
  165. case MV_6928_DEV_ID:
  166. return ctrl_id;
  167. default:
  168. /* Device ID Default for A38x: 6820 , for A39x: 6920 */
  169. default_ctrl_id = MV_6820_DEV_ID;
  170. printf("%s: Error retrieving device ID (%x), using default ID = %x\n",
  171. __func__, ctrl_id, default_ctrl_id);
  172. return default_ctrl_id;
  173. }
  174. }
  175. /*
  176. * sys_env_device_id_get
  177. * DESCRIPTION: Returns enum (0..7) index of the device model (ID)
  178. */
  179. u32 sys_env_device_id_get(void)
  180. {
  181. char *device_id_str[7] = {
  182. "6810", "6820", "6811", "6828", "NONE", "6920", "6928"
  183. };
  184. if (g_dev_id != -1)
  185. return g_dev_id;
  186. g_dev_id = reg_read(DEVICE_SAMPLE_AT_RESET1_REG);
  187. g_dev_id = g_dev_id >> SAR_DEV_ID_OFFS & SAR_DEV_ID_MASK;
  188. printf("Detected Device ID %s\n", device_id_str[g_dev_id]);
  189. return g_dev_id;
  190. }
  191. /*
  192. * sys_env_device_rev_get - Get Marvell controller device revision number
  193. *
  194. * DESCRIPTION:
  195. * This function returns 8bit describing the device revision as defined
  196. * Revision ID Register.
  197. *
  198. * INPUT:
  199. * None.
  200. *
  201. * OUTPUT:
  202. * None.
  203. *
  204. * RETURN:
  205. * 8bit desscribing Marvell controller revision number
  206. */
  207. u8 sys_env_device_rev_get(void)
  208. {
  209. u32 value;
  210. value = reg_read(DEV_VERSION_ID_REG);
  211. return (value & (REVISON_ID_MASK)) >> REVISON_ID_OFFS;
  212. }
  213. void mv_rtc_config(void)
  214. {
  215. u32 i, val;
  216. /* Activate pipe0 for read/write transaction, and set XBAR client number #1 */
  217. val = 0x1 << DFX_PIPE_SELECT_PIPE0_ACTIVE_OFFS |
  218. 0x1 << DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS;
  219. writel(val, MVEBU_DFX_BASE);
  220. /* Set new RTC value for all memory wrappers */
  221. for (i = 0; i < RTC_MEMORY_WRAPPER_COUNT; i++)
  222. reg_write(RTC_MEMORY_WRAPPER_REG(i), RTC_MEMORY_WRAPPER_CTRL_VAL);
  223. }
  224. void mv_avs_init(void)
  225. {
  226. u32 sar_freq;
  227. reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
  228. reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
  229. sar_freq = reg_read(DEVICE_SAMPLE_AT_RESET1_REG);
  230. sar_freq = sar_freq >> SAR_FREQ_OFFSET & SAR_FREQ_MASK;
  231. /* Set AVS value only for core frequency of 1600MHz or less.
  232. * For higher frequency leave the default value.
  233. */
  234. if (sar_freq <= 0xd) {
  235. u32 avs_reg_data = reg_read(AVS_ENABLED_CONTROL);
  236. avs_reg_data &= ~(AVS_LOW_VDD_LIMIT_MASK
  237. | AVS_HIGH_VDD_LIMIT_MASK);
  238. avs_reg_data |= AVS_LOW_VDD_SLOW_VAL | AVS_HIGH_VDD_SLOW_VAL;
  239. reg_write(AVS_ENABLED_CONTROL, avs_reg_data);
  240. }
  241. }