imx8mm-venice.dts 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2021 Gateworks Corporation
  4. */
  5. /dts-v1/;
  6. #include "imx8mm.dtsi"
  7. / {
  8. model = "Gateworks Venice i.MX8MM board";
  9. compatible = "gw,imx8mm-venice", "fsl,imx8mm";
  10. chosen {
  11. stdout-path = &uart2;
  12. };
  13. memory@40000000 {
  14. device_type = "memory";
  15. reg = <0x0 0x40000000 0 0x80000000>;
  16. };
  17. };
  18. &i2c1 {
  19. clock-frequency = <100000>;
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&pinctrl_i2c1>;
  22. status = "okay";
  23. eeprom@51 {
  24. compatible = "atmel,24c02";
  25. reg = <0x51>;
  26. pagesize = <16>;
  27. };
  28. };
  29. &i2c2 {
  30. clock-frequency = <400000>;
  31. pinctrl-names = "default";
  32. pinctrl-0 = <&pinctrl_i2c2>;
  33. status = "okay";
  34. eeprom@52 {
  35. compatible = "atmel,24c32";
  36. reg = <0x52>;
  37. pagesize = <32>;
  38. };
  39. };
  40. /* console */
  41. &uart2 {
  42. pinctrl-names = "default";
  43. pinctrl-0 = <&pinctrl_uart2>;
  44. status = "okay";
  45. };
  46. /* eMMC */
  47. &usdhc3 {
  48. assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;
  49. assigned-clock-rates = <400000000>;
  50. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  51. pinctrl-0 = <&pinctrl_usdhc3>;
  52. pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
  53. pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
  54. bus-width = <8>;
  55. non-removable;
  56. status = "okay";
  57. };
  58. &wdog1 {
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&pinctrl_wdog>;
  61. fsl,ext-reset-output;
  62. status = "okay";
  63. };
  64. &iomuxc {
  65. pinctrl_i2c1: i2c1grp {
  66. fsl,pins = <
  67. MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
  68. MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
  69. >;
  70. };
  71. pinctrl_i2c2: i2c2grp {
  72. fsl,pins = <
  73. MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
  74. MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
  75. >;
  76. };
  77. pinctrl_uart2: uart2grp {
  78. fsl,pins = <
  79. MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
  80. MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
  81. >;
  82. };
  83. pinctrl_usdhc3: usdhc3grp {
  84. fsl,pins = <
  85. MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
  86. MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
  87. MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
  88. MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
  89. MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
  90. MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
  91. MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
  92. MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
  93. MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
  94. MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
  95. MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
  96. >;
  97. };
  98. pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
  99. fsl,pins = <
  100. MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
  101. MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
  102. MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
  103. MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
  104. MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
  105. MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
  106. MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
  107. MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
  108. MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
  109. MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
  110. MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
  111. >;
  112. };
  113. pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
  114. fsl,pins = <
  115. MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
  116. MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
  117. MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
  118. MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
  119. MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
  120. MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
  121. MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
  122. MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
  123. MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
  124. MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
  125. MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
  126. >;
  127. };
  128. pinctrl_wdog: wdoggrp {
  129. fsl,pins = <
  130. MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
  131. >;
  132. };
  133. };