imx8mm-venice-gw73xx.dtsi 8.2 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright 2020 Gateworks Corporation
  4. */
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include <dt-bindings/leds/common.h>
  7. / {
  8. aliases {
  9. usb0 = &usbotg1;
  10. usb1 = &usbotg2;
  11. };
  12. led-controller {
  13. compatible = "gpio-leds";
  14. pinctrl-names = "default";
  15. pinctrl-0 = <&pinctrl_gpio_leds>;
  16. led-0 {
  17. function = LED_FUNCTION_STATUS;
  18. color = <LED_COLOR_ID_GREEN>;
  19. gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
  20. default-state = "on";
  21. linux,default-trigger = "heartbeat";
  22. };
  23. led-1 {
  24. function = LED_FUNCTION_STATUS;
  25. color = <LED_COLOR_ID_RED>;
  26. gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
  27. default-state = "off";
  28. };
  29. };
  30. pps {
  31. compatible = "pps-gpio";
  32. pinctrl-names = "default";
  33. pinctrl-0 = <&pinctrl_pps>;
  34. gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
  35. status = "okay";
  36. };
  37. reg_1p8v: regulator-1p8v {
  38. compatible = "regulator-fixed";
  39. regulator-name = "1P8V";
  40. regulator-min-microvolt = <1800000>;
  41. regulator-max-microvolt = <1800000>;
  42. regulator-always-on;
  43. };
  44. reg_3p3v: regulator-3p3v {
  45. compatible = "regulator-fixed";
  46. regulator-name = "3P3V";
  47. regulator-min-microvolt = <3300000>;
  48. regulator-max-microvolt = <3300000>;
  49. regulator-always-on;
  50. };
  51. reg_usb_otg1_vbus: regulator-usb-otg1 {
  52. pinctrl-names = "default";
  53. pinctrl-0 = <&pinctrl_reg_usb1_en>;
  54. compatible = "regulator-fixed";
  55. regulator-name = "usb_otg1_vbus";
  56. gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
  57. enable-active-high;
  58. regulator-min-microvolt = <5000000>;
  59. regulator-max-microvolt = <5000000>;
  60. };
  61. reg_usb_otg2_vbus: regulator-usb-otg2 {
  62. pinctrl-names = "default";
  63. pinctrl-0 = <&pinctrl_reg_usb2_en>;
  64. compatible = "regulator-fixed";
  65. regulator-name = "usb_otg2_vbus";
  66. gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  67. enable-active-high;
  68. regulator-min-microvolt = <5000000>;
  69. regulator-max-microvolt = <5000000>;
  70. };
  71. reg_wifi_en: regulator-wifi-en {
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&pinctrl_reg_wl>;
  74. compatible = "regulator-fixed";
  75. regulator-name = "wl";
  76. gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
  77. startup-delay-us = <100>;
  78. enable-active-high;
  79. regulator-min-microvolt = <3300000>;
  80. regulator-max-microvolt = <3300000>;
  81. };
  82. };
  83. /* off-board header */
  84. &ecspi2 {
  85. pinctrl-names = "default";
  86. pinctrl-0 = <&pinctrl_spi2>;
  87. cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
  88. status = "okay";
  89. };
  90. &i2c2 {
  91. clock-frequency = <400000>;
  92. pinctrl-names = "default";
  93. pinctrl-0 = <&pinctrl_i2c2>;
  94. status = "okay";
  95. accelerometer@19 {
  96. pinctrl-names = "default";
  97. pinctrl-0 = <&pinctrl_accel>;
  98. compatible = "st,lis2de12";
  99. reg = <0x19>;
  100. st,drdy-int-pin = <1>;
  101. interrupt-parent = <&gpio4>;
  102. interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
  103. interrupt-names = "INT1";
  104. };
  105. };
  106. /* off-board header */
  107. &i2c3 {
  108. clock-frequency = <400000>;
  109. pinctrl-names = "default";
  110. pinctrl-0 = <&pinctrl_i2c3>;
  111. status = "okay";
  112. };
  113. /* off-board header */
  114. &sai3 {
  115. pinctrl-names = "default";
  116. pinctrl-0 = <&pinctrl_sai3>;
  117. assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
  118. assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
  119. assigned-clock-rates = <24576000>;
  120. status = "okay";
  121. };
  122. /* GPS */
  123. &uart1 {
  124. pinctrl-names = "default";
  125. pinctrl-0 = <&pinctrl_uart1>;
  126. status = "okay";
  127. };
  128. /* bluetooth HCI */
  129. &uart3 {
  130. pinctrl-names = "default";
  131. pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
  132. cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
  133. rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
  134. status = "okay";
  135. bluetooth {
  136. compatible = "brcm,bcm4330-bt";
  137. shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
  138. };
  139. };
  140. /* RS232 */
  141. &uart4 {
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&pinctrl_uart4>;
  144. status = "okay";
  145. };
  146. &usbotg1 {
  147. dr_mode = "otg";
  148. vbus-supply = <&reg_usb_otg1_vbus>;
  149. status = "okay";
  150. };
  151. &usbotg2 {
  152. dr_mode = "host";
  153. vbus-supply = <&reg_usb_otg2_vbus>;
  154. status = "okay";
  155. };
  156. /* SDIO WiFi */
  157. &usdhc1 {
  158. pinctrl-names = "default";
  159. pinctrl-0 = <&pinctrl_usdhc1>;
  160. bus-width = <4>;
  161. non-removable;
  162. vmmc-supply = <&reg_wifi_en>;
  163. status = "okay";
  164. };
  165. /* microSD */
  166. &usdhc2 {
  167. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  168. pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
  169. pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
  170. pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
  171. cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
  172. bus-width = <4>;
  173. vmmc-supply = <&reg_3p3v>;
  174. status = "okay";
  175. };
  176. &iomuxc {
  177. pinctrl-names = "default";
  178. pinctrl-0 = <&pinctrl_hog>;
  179. pinctrl_hog: hoggrp {
  180. fsl,pins = <
  181. MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
  182. MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
  183. MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
  184. MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
  185. MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
  186. MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x40000104 /* RS485_TERM */
  187. MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x40000104 /* RS485 */
  188. MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x40000104 /* RS485_HALF */
  189. >;
  190. };
  191. pinctrl_accel: accelgrp {
  192. fsl,pins = <
  193. MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
  194. >;
  195. };
  196. pinctrl_bten: btengrp {
  197. fsl,pins = <
  198. MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
  199. >;
  200. };
  201. pinctrl_gpio_leds: gpioledgrp {
  202. fsl,pins = <
  203. MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
  204. MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
  205. >;
  206. };
  207. pinctrl_i2c3: i2c3grp {
  208. fsl,pins = <
  209. MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
  210. MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
  211. >;
  212. };
  213. pinctrl_pps: ppsgrp {
  214. fsl,pins = <
  215. MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
  216. >;
  217. };
  218. pinctrl_reg_wl: regwlgrp {
  219. fsl,pins = <
  220. MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41
  221. >;
  222. };
  223. pinctrl_reg_usb1_en: regusb1grp {
  224. fsl,pins = <
  225. MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x41
  226. MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
  227. >;
  228. };
  229. pinctrl_reg_usb2_en: regusb2grp {
  230. fsl,pins = <
  231. MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41
  232. >;
  233. };
  234. pinctrl_sai3: sai3grp {
  235. fsl,pins = <
  236. MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
  237. MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
  238. MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
  239. MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
  240. MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
  241. >;
  242. };
  243. pinctrl_spi2: spi2grp {
  244. fsl,pins = <
  245. MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
  246. MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
  247. MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
  248. MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
  249. >;
  250. };
  251. pinctrl_uart1: uart1grp {
  252. fsl,pins = <
  253. MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
  254. MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
  255. >;
  256. };
  257. pinctrl_uart3: uart3grp {
  258. fsl,pins = <
  259. MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
  260. MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
  261. MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x140
  262. MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x140
  263. >;
  264. };
  265. pinctrl_uart4: uart4grp {
  266. fsl,pins = <
  267. MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
  268. MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
  269. >;
  270. };
  271. pinctrl_usdhc1: usdhc1grp {
  272. fsl,pins = <
  273. MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
  274. MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
  275. MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
  276. MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
  277. MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
  278. MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
  279. >;
  280. };
  281. pinctrl_usdhc2: usdhc2grp {
  282. fsl,pins = <
  283. MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
  284. MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
  285. MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
  286. MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
  287. MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
  288. MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
  289. >;
  290. };
  291. pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
  292. fsl,pins = <
  293. MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
  294. MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
  295. MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
  296. MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
  297. MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
  298. MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
  299. >;
  300. };
  301. pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
  302. fsl,pins = <
  303. MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
  304. MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
  305. MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
  306. MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
  307. MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
  308. MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
  309. >;
  310. };
  311. pinctrl_usdhc2_gpio: usdhc2gpiogrp {
  312. fsl,pins = <
  313. MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
  314. MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0x1d0
  315. MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
  316. >;
  317. };
  318. };