dcu_sii9022a.c 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014 Freescale Semiconductor, Inc.
  4. * Copyright 2019 NXP
  5. */
  6. #include <asm/io.h>
  7. #include <common.h>
  8. #include <fsl_dcu_fb.h>
  9. #include <i2c.h>
  10. #include <linux/fb.h>
  11. #define PIXEL_CLK_LSB_REG 0x00
  12. #define PIXEL_CLK_MSB_REG 0x01
  13. #define VERT_FREQ_LSB_REG 0x02
  14. #define VERT_FREQ_MSB_REG 0x03
  15. #define TOTAL_PIXELS_LSB_REG 0x04
  16. #define TOTAL_PIXELS_MSB_REG 0x05
  17. #define TOTAL_LINES_LSB_REG 0x06
  18. #define TOTAL_LINES_MSB_REG 0x07
  19. #define TPI_INBUS_FMT_REG 0x08
  20. #define TPI_INPUT_FMT_REG 0x09
  21. #define TPI_OUTPUT_FMT_REG 0x0A
  22. #define TPI_SYS_CTRL_REG 0x1A
  23. #define TPI_PWR_STAT_REG 0x1E
  24. #define TPI_AUDIO_HANDING_REG 0x25
  25. #define TPI_AUDIO_INTF_REG 0x26
  26. #define TPI_AUDIO_FREQ_REG 0x27
  27. #define TPI_SET_PAGE_REG 0xBC
  28. #define TPI_SET_OFFSET_REG 0xBD
  29. #define TPI_RW_ACCESS_REG 0xBE
  30. #define TPI_TRANS_MODE_REG 0xC7
  31. #define TPI_INBUS_CLOCK_RATIO_1 (1 << 6)
  32. #define TPI_INBUS_FULL_PIXEL_WIDE (1 << 5)
  33. #define TPI_INBUS_RISING_EDGE (1 << 4)
  34. #define TPI_INPUT_CLR_DEPTH_8BIT (0 << 6)
  35. #define TPI_INPUT_VRANGE_EXPAN_AUTO (0 << 2)
  36. #define TPI_INPUT_CLR_RGB (0 << 0)
  37. #define TPI_OUTPUT_CLR_DEPTH_8BIT (0 << 6)
  38. #define TPI_OUTPUT_VRANGE_COMPRE_AUTO (0 << 2)
  39. #define TPI_OUTPUT_CLR_HDMI_RGB (0 << 0)
  40. #define TPI_SYS_TMDS_OUTPUT (0 << 4)
  41. #define TPI_SYS_AV_NORAML (0 << 3)
  42. #define TPI_SYS_AV_MUTE (1 << 3)
  43. #define TPI_SYS_DVI_MODE (0 << 0)
  44. #define TPI_SYS_HDMI_MODE (1 << 0)
  45. #define TPI_PWR_STAT_MASK (3 << 0)
  46. #define TPI_PWR_STAT_D0 (0 << 0)
  47. #define TPI_AUDIO_PASS_BASIC (0 << 0)
  48. #define TPI_AUDIO_INTF_I2S (2 << 6)
  49. #define TPI_AUDIO_INTF_NORMAL (0 << 4)
  50. #define TPI_AUDIO_TYPE_PCM (1 << 0)
  51. #define TPI_AUDIO_SAMP_SIZE_16BIT (1 << 6)
  52. #define TPI_AUDIO_SAMP_FREQ_44K (2 << 3)
  53. #define TPI_SET_PAGE_SII9022A 0x01
  54. #define TPI_SET_OFFSET_SII9022A 0x82
  55. #define TPI_RW_EN_SRC_TERMIN (1 << 0)
  56. #define TPI_TRANS_MODE_ENABLE (0 << 7)
  57. /* Programming of Silicon SIi9022a HDMI Transmitter */
  58. int dcu_set_dvi_encoder(struct fb_videomode *videomode)
  59. {
  60. u8 temp;
  61. u16 temp1, temp2;
  62. u32 temp3;
  63. #if CONFIG_IS_ENABLED(DM_I2C)
  64. struct udevice *dev;
  65. int ret;
  66. ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM,
  67. CONFIG_SYS_I2C_DVI_ADDR,
  68. 1, &dev);
  69. if (ret) {
  70. printf("%s: Cannot find udev for a bus %d\n", __func__,
  71. CONFIG_SYS_I2C_DVI_BUS_NUM);
  72. return ret;
  73. }
  74. /* Enable TPI transmitter mode */
  75. temp = TPI_TRANS_MODE_ENABLE;
  76. dm_i2c_write(dev, TPI_TRANS_MODE_REG, &temp, 1);
  77. /* Enter into D0 state, full operation */
  78. dm_i2c_read(dev, TPI_PWR_STAT_REG, &temp, 1);
  79. temp &= ~TPI_PWR_STAT_MASK;
  80. temp |= TPI_PWR_STAT_D0;
  81. dm_i2c_write(dev, TPI_PWR_STAT_REG, &temp, 1);
  82. /* Enable source termination */
  83. temp = TPI_SET_PAGE_SII9022A;
  84. dm_i2c_write(dev, TPI_SET_PAGE_REG, &temp, 1);
  85. temp = TPI_SET_OFFSET_SII9022A;
  86. dm_i2c_write(dev, TPI_SET_OFFSET_REG, &temp, 1);
  87. dm_i2c_read(dev, TPI_RW_ACCESS_REG, &temp, 1);
  88. temp |= TPI_RW_EN_SRC_TERMIN;
  89. dm_i2c_write(dev, TPI_RW_ACCESS_REG, &temp, 1);
  90. /* Set TPI system control */
  91. temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE;
  92. dm_i2c_write(dev, TPI_SYS_CTRL_REG, &temp, 1);
  93. /* Set pixel clock */
  94. temp1 = PICOS2KHZ(videomode->pixclock) / 10;
  95. temp = (u8)(temp1 & 0xFF);
  96. dm_i2c_write(dev, PIXEL_CLK_LSB_REG, &temp, 1);
  97. temp = (u8)(temp1 >> 8);
  98. dm_i2c_write(dev, PIXEL_CLK_MSB_REG, &temp, 1);
  99. /* Set total pixels per line */
  100. temp1 = videomode->hsync_len + videomode->left_margin +
  101. videomode->xres + videomode->right_margin;
  102. temp = (u8)(temp1 & 0xFF);
  103. dm_i2c_write(dev, TOTAL_PIXELS_LSB_REG, &temp, 1);
  104. temp = (u8)(temp1 >> 8);
  105. dm_i2c_write(dev, TOTAL_PIXELS_MSB_REG, &temp, 1);
  106. /* Set total lines */
  107. temp2 = videomode->vsync_len + videomode->upper_margin +
  108. videomode->yres + videomode->lower_margin;
  109. temp = (u8)(temp2 & 0xFF);
  110. dm_i2c_write(dev, TOTAL_LINES_LSB_REG, &temp, 1);
  111. temp = (u8)(temp2 >> 8);
  112. dm_i2c_write(dev, TOTAL_LINES_MSB_REG, &temp, 1);
  113. /* Set vertical frequency in Hz */
  114. temp3 = temp1 * temp2;
  115. temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3;
  116. temp1 = (u16)temp3 * 100;
  117. temp = (u8)(temp1 & 0xFF);
  118. dm_i2c_write(dev, VERT_FREQ_LSB_REG, &temp, 1);
  119. temp = (u8)(temp1 >> 8);
  120. dm_i2c_write(dev, VERT_FREQ_MSB_REG, &temp, 1);
  121. /* Set TPI input bus and pixel repetition data */
  122. temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE |
  123. TPI_INBUS_RISING_EDGE;
  124. dm_i2c_write(dev, TPI_INBUS_FMT_REG, &temp, 1);
  125. /* Set TPI AVI Input format data */
  126. temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO |
  127. TPI_INPUT_CLR_RGB;
  128. dm_i2c_write(dev, TPI_INPUT_FMT_REG, &temp, 1);
  129. /* Set TPI AVI Output format data */
  130. temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO |
  131. TPI_OUTPUT_CLR_HDMI_RGB;
  132. dm_i2c_write(dev, TPI_OUTPUT_FMT_REG, &temp, 1);
  133. /* Set TPI audio configuration write data */
  134. temp = TPI_AUDIO_PASS_BASIC;
  135. dm_i2c_write(dev, TPI_AUDIO_HANDING_REG, &temp, 1);
  136. temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL |
  137. TPI_AUDIO_TYPE_PCM;
  138. dm_i2c_write(dev, TPI_AUDIO_INTF_REG, &temp, 1);
  139. temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K;
  140. dm_i2c_write(dev, TPI_AUDIO_FREQ_REG, &temp, 1);
  141. #else
  142. i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM);
  143. /* Enable TPI transmitter mode */
  144. temp = TPI_TRANS_MODE_ENABLE;
  145. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_TRANS_MODE_REG, 1, &temp, 1);
  146. /* Enter into D0 state, full operation */
  147. i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1);
  148. temp &= ~TPI_PWR_STAT_MASK;
  149. temp |= TPI_PWR_STAT_D0;
  150. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1);
  151. /* Enable source termination */
  152. temp = TPI_SET_PAGE_SII9022A;
  153. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_PAGE_REG, 1, &temp, 1);
  154. temp = TPI_SET_OFFSET_SII9022A;
  155. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_OFFSET_REG, 1, &temp, 1);
  156. i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1);
  157. temp |= TPI_RW_EN_SRC_TERMIN;
  158. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1);
  159. /* Set TPI system control */
  160. temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE;
  161. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SYS_CTRL_REG, 1, &temp, 1);
  162. /* Set pixel clock */
  163. temp1 = PICOS2KHZ(videomode->pixclock) / 10;
  164. temp = (u8)(temp1 & 0xFF);
  165. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_LSB_REG, 1, &temp, 1);
  166. temp = (u8)(temp1 >> 8);
  167. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_MSB_REG, 1, &temp, 1);
  168. /* Set total pixels per line */
  169. temp1 = videomode->hsync_len + videomode->left_margin +
  170. videomode->xres + videomode->right_margin;
  171. temp = (u8)(temp1 & 0xFF);
  172. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_LSB_REG, 1, &temp, 1);
  173. temp = (u8)(temp1 >> 8);
  174. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_MSB_REG, 1, &temp, 1);
  175. /* Set total lines */
  176. temp2 = videomode->vsync_len + videomode->upper_margin +
  177. videomode->yres + videomode->lower_margin;
  178. temp = (u8)(temp2 & 0xFF);
  179. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_LSB_REG, 1, &temp, 1);
  180. temp = (u8)(temp2 >> 8);
  181. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_MSB_REG, 1, &temp, 1);
  182. /* Set vertical frequency in Hz */
  183. temp3 = temp1 * temp2;
  184. temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3;
  185. temp1 = (u16)temp3 * 100;
  186. temp = (u8)(temp1 & 0xFF);
  187. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_LSB_REG, 1, &temp, 1);
  188. temp = (u8)(temp1 >> 8);
  189. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_MSB_REG, 1, &temp, 1);
  190. /* Set TPI input bus and pixel repetition data */
  191. temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE |
  192. TPI_INBUS_RISING_EDGE;
  193. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INBUS_FMT_REG, 1, &temp, 1);
  194. /* Set TPI AVI Input format data */
  195. temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO |
  196. TPI_INPUT_CLR_RGB;
  197. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INPUT_FMT_REG, 1, &temp, 1);
  198. /* Set TPI AVI Output format data */
  199. temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO |
  200. TPI_OUTPUT_CLR_HDMI_RGB;
  201. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_OUTPUT_FMT_REG, 1, &temp, 1);
  202. /* Set TPI audio configuration write data */
  203. temp = TPI_AUDIO_PASS_BASIC;
  204. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_HANDING_REG, 1, &temp, 1);
  205. temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL |
  206. TPI_AUDIO_TYPE_PCM;
  207. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_INTF_REG, 1, &temp, 1);
  208. temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K;
  209. i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_FREQ_REG, 1, &temp, 1);
  210. #endif
  211. return 0;
  212. }