dram.c 1.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <fdtdec.h>
  7. #include <init.h>
  8. #include <linux/sizes.h>
  9. #ifdef CONFIG_ID_EEPROM
  10. #include <asm/arch/eeprom.h>
  11. #define STARFIVE_JH7110_EEPROM_DDRINFO_OFFSET 91
  12. #endif
  13. DECLARE_GLOBAL_DATA_PTR;
  14. #ifdef CONFIG_ID_EEPROM
  15. static bool check_eeprom_dram_info(phys_size_t size)
  16. {
  17. switch (size) {
  18. case 0x40000000:
  19. case 0x80000000:
  20. case 0x100000000:
  21. case 0x200000000:
  22. case 0x400000000:
  23. return true;
  24. default:
  25. return false;
  26. }
  27. }
  28. static void resize_ddr_from_eeprom(void)
  29. {
  30. u32 offset = STARFIVE_JH7110_EEPROM_DDRINFO_OFFSET;
  31. phys_size_t size;
  32. u32 len = 1;
  33. u8 data = 0;
  34. int ret;
  35. /* read memory size info */
  36. ret = get_data_from_eeprom(offset, len, &data);
  37. if (ret == len) {
  38. size = ((phys_size_t)hextoul(&data, NULL)) << 30;
  39. if (check_eeprom_dram_info(size))
  40. gd->ram_size = size;
  41. }
  42. }
  43. #endif /* CONFIG_ID_EEPROM */
  44. int dram_init(void)
  45. {
  46. int ret;
  47. ret = fdtdec_setup_mem_size_base();
  48. if (ret)
  49. return ret;
  50. #ifdef CONFIG_ID_EEPROM
  51. resize_ddr_from_eeprom();
  52. #endif
  53. return 0;
  54. }
  55. int dram_init_banksize(void)
  56. {
  57. int ret;
  58. ret = fdtdec_setup_memory_banksize();
  59. if (ret)
  60. return ret;
  61. gd->bd->bi_dram[0].size = gd->ram_size;
  62. return 0;
  63. }
  64. ulong board_get_usable_ram_top(ulong total_size)
  65. {
  66. #ifdef CONFIG_64BIT
  67. /*
  68. * Ensure that we run from first 4GB so that all
  69. * addresses used by U-Boot are 32bit addresses.
  70. *
  71. * This in-turn ensures that 32bit DMA capable
  72. * devices work fine because DMA mapping APIs will
  73. * provide 32bit DMA addresses only.
  74. */
  75. if (gd->ram_top > SZ_4G)
  76. return SZ_4G;
  77. #endif
  78. return gd->ram_top;
  79. }