Kconfig 4.9 KB

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  1. menu "MIPS architecture"
  2. depends on MIPS
  3. config SYS_ARCH
  4. default "mips"
  5. config SYS_CPU
  6. default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2
  7. default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2
  8. choice
  9. prompt "Target select"
  10. optional
  11. config TARGET_QEMU_MIPS
  12. bool "Support qemu-mips"
  13. select SUPPORTS_BIG_ENDIAN
  14. select SUPPORTS_LITTLE_ENDIAN
  15. select SUPPORTS_CPU_MIPS32_R1
  16. select SUPPORTS_CPU_MIPS32_R2
  17. select SUPPORTS_CPU_MIPS64_R1
  18. select SUPPORTS_CPU_MIPS64_R2
  19. config TARGET_MALTA
  20. bool "Support malta"
  21. select DYNAMIC_IO_PORT_BASE
  22. select SUPPORTS_BIG_ENDIAN
  23. select SUPPORTS_LITTLE_ENDIAN
  24. select SUPPORTS_CPU_MIPS32_R1
  25. select SUPPORTS_CPU_MIPS32_R2
  26. select SWAP_IO_SPACE
  27. select MIPS_L1_CACHE_SHIFT_6
  28. config TARGET_VCT
  29. bool "Support vct"
  30. select SUPPORTS_BIG_ENDIAN
  31. select SUPPORTS_CPU_MIPS32_R1
  32. select SUPPORTS_CPU_MIPS32_R2
  33. select SYS_MIPS_CACHE_INIT_RAM_LOAD
  34. config TARGET_DBAU1X00
  35. bool "Support dbau1x00"
  36. select SUPPORTS_BIG_ENDIAN
  37. select SUPPORTS_LITTLE_ENDIAN
  38. select SUPPORTS_CPU_MIPS32_R1
  39. select SUPPORTS_CPU_MIPS32_R2
  40. select SYS_MIPS_CACHE_INIT_RAM_LOAD
  41. select MIPS_TUNE_4KC
  42. config TARGET_PB1X00
  43. bool "Support pb1x00"
  44. select SUPPORTS_LITTLE_ENDIAN
  45. select SUPPORTS_CPU_MIPS32_R1
  46. select SUPPORTS_CPU_MIPS32_R2
  47. select SYS_MIPS_CACHE_INIT_RAM_LOAD
  48. select MIPS_TUNE_4KC
  49. config MACH_PIC32
  50. bool "Support Microchip PIC32"
  51. select OF_CONTROL
  52. select DM
  53. endchoice
  54. source "board/dbau1x00/Kconfig"
  55. source "board/imgtec/malta/Kconfig"
  56. source "board/micronas/vct/Kconfig"
  57. source "board/pb1x00/Kconfig"
  58. source "board/qemu-mips/Kconfig"
  59. source "arch/mips/mach-pic32/Kconfig"
  60. if MIPS
  61. choice
  62. prompt "Endianness selection"
  63. help
  64. Some MIPS boards can be configured for either little or big endian
  65. byte order. These modes require different U-Boot images. In general there
  66. is one preferred byteorder for a particular system but some systems are
  67. just as commonly used in the one or the other endianness.
  68. config SYS_BIG_ENDIAN
  69. bool "Big endian"
  70. depends on SUPPORTS_BIG_ENDIAN
  71. config SYS_LITTLE_ENDIAN
  72. bool "Little endian"
  73. depends on SUPPORTS_LITTLE_ENDIAN
  74. endchoice
  75. choice
  76. prompt "CPU selection"
  77. default CPU_MIPS32_R2
  78. config CPU_MIPS32_R1
  79. bool "MIPS32 Release 1"
  80. depends on SUPPORTS_CPU_MIPS32_R1
  81. select 32BIT
  82. help
  83. Choose this option to build an U-Boot for release 1 or later of the
  84. MIPS32 architecture.
  85. config CPU_MIPS32_R2
  86. bool "MIPS32 Release 2"
  87. depends on SUPPORTS_CPU_MIPS32_R2
  88. select 32BIT
  89. help
  90. Choose this option to build an U-Boot for release 2 or later of the
  91. MIPS32 architecture.
  92. config CPU_MIPS64_R1
  93. bool "MIPS64 Release 1"
  94. depends on SUPPORTS_CPU_MIPS64_R1
  95. select 64BIT
  96. help
  97. Choose this option to build a kernel for release 1 or later of the
  98. MIPS64 architecture.
  99. config CPU_MIPS64_R2
  100. bool "MIPS64 Release 2"
  101. depends on SUPPORTS_CPU_MIPS64_R2
  102. select 64BIT
  103. help
  104. Choose this option to build a kernel for release 2 or later of the
  105. MIPS64 architecture.
  106. endchoice
  107. menu "OS boot interface"
  108. config MIPS_BOOT_CMDLINE_LEGACY
  109. bool "Hand over legacy command line to Linux kernel"
  110. default y
  111. help
  112. Enable this option if you want U-Boot to hand over the Yamon-style
  113. command line to the kernel. All bootargs will be prepared as argc/argv
  114. compatible list. The argument count (argc) is stored in register $a0.
  115. The address of the argument list (argv) is stored in register $a1.
  116. config MIPS_BOOT_ENV_LEGACY
  117. bool "Hand over legacy environment to Linux kernel"
  118. default y
  119. help
  120. Enable this option if you want U-Boot to hand over the Yamon-style
  121. environment to the kernel. Information like memory size, initrd
  122. address and size will be prepared as zero-terminated key/value list.
  123. The address of the environment is stored in register $a2.
  124. config MIPS_BOOT_FDT
  125. bool "Hand over a flattened device tree to Linux kernel"
  126. default n
  127. help
  128. Enable this option if you want U-Boot to hand over a flattened
  129. device tree to the kernel. According to UHI register $a0 will be set
  130. to -2 and the FDT address is stored in $a1.
  131. endmenu
  132. config SUPPORTS_BIG_ENDIAN
  133. bool
  134. config SUPPORTS_LITTLE_ENDIAN
  135. bool
  136. config SUPPORTS_CPU_MIPS32_R1
  137. bool
  138. config SUPPORTS_CPU_MIPS32_R2
  139. bool
  140. config SUPPORTS_CPU_MIPS64_R1
  141. bool
  142. config SUPPORTS_CPU_MIPS64_R2
  143. bool
  144. config CPU_MIPS32
  145. bool
  146. default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
  147. config CPU_MIPS64
  148. bool
  149. default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
  150. config MIPS_TUNE_4KC
  151. bool
  152. config MIPS_TUNE_14KC
  153. bool
  154. config MIPS_TUNE_24KC
  155. bool
  156. config 32BIT
  157. bool
  158. config 64BIT
  159. bool
  160. config SWAP_IO_SPACE
  161. bool
  162. config SYS_MIPS_CACHE_INIT_RAM_LOAD
  163. bool
  164. config MIPS_L1_CACHE_SHIFT_4
  165. bool
  166. config MIPS_L1_CACHE_SHIFT_5
  167. bool
  168. config MIPS_L1_CACHE_SHIFT_6
  169. bool
  170. config MIPS_L1_CACHE_SHIFT_7
  171. bool
  172. config MIPS_L1_CACHE_SHIFT
  173. int
  174. default "7" if MIPS_L1_CACHE_SHIFT_7
  175. default "6" if MIPS_L1_CACHE_SHIFT_6
  176. default "5" if MIPS_L1_CACHE_SHIFT_5
  177. default "4" if MIPS_L1_CACHE_SHIFT_4
  178. default "5"
  179. config DYNAMIC_IO_PORT_BASE
  180. bool
  181. endif
  182. endmenu