test.dts 29 KB

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  1. /dts-v1/;
  2. #include <dt-bindings/gpio/gpio.h>
  3. #include <dt-bindings/gpio/sandbox-gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/pinctrl/sandbox-pinmux.h>
  6. #include <dt-bindings/mux/mux.h>
  7. / {
  8. model = "sandbox";
  9. compatible = "sandbox";
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. aliases {
  13. console = &uart0;
  14. eth0 = "/eth@10002000";
  15. eth2 = &swp_0;
  16. eth3 = &eth_3;
  17. eth4 = &dsa_eth0;
  18. eth5 = &eth_5;
  19. gpio1 = &gpio_a;
  20. gpio2 = &gpio_b;
  21. gpio3 = &gpio_c;
  22. i2c0 = "/i2c@0";
  23. mmc0 = "/mmc0";
  24. mmc1 = "/mmc1";
  25. pci0 = &pci0;
  26. pci1 = &pci1;
  27. pci2 = &pci2;
  28. remoteproc0 = &rproc_1;
  29. remoteproc1 = &rproc_2;
  30. rtc0 = &rtc_0;
  31. rtc1 = &rtc_1;
  32. spi0 = "/spi@0";
  33. testfdt6 = "/e-test";
  34. testbus3 = "/some-bus";
  35. testfdt0 = "/some-bus/c-test@0";
  36. testfdt12 = "/some-bus/c-test@1";
  37. testfdt3 = "/b-test";
  38. testfdt5 = "/some-bus/c-test@5";
  39. testfdt8 = "/a-test";
  40. testfdtm1 = &testfdtm1;
  41. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  42. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  43. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  44. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  45. fdt-dummy4 = "/translation-test@8000/xlatebus@4,400/devs/dev@19";
  46. usb0 = &usb_0;
  47. usb1 = &usb_1;
  48. usb2 = &usb_2;
  49. axi0 = &axi;
  50. osd0 = "/osd";
  51. };
  52. audio: audio-codec {
  53. compatible = "sandbox,audio-codec";
  54. #sound-dai-cells = <1>;
  55. };
  56. buttons {
  57. compatible = "gpio-keys";
  58. btn1 {
  59. gpios = <&gpio_a 3 0>;
  60. label = "button1";
  61. };
  62. btn2 {
  63. gpios = <&gpio_a 4 0>;
  64. label = "button2";
  65. };
  66. };
  67. buttons2 {
  68. compatible = "adc-keys";
  69. io-channels = <&adc 3>;
  70. keyup-threshold-microvolt = <3000000>;
  71. button-up {
  72. label = "button3";
  73. linux,code = <KEY_F3>;
  74. press-threshold-microvolt = <1500000>;
  75. };
  76. button-down {
  77. label = "button4";
  78. linux,code = <KEY_F4>;
  79. press-threshold-microvolt = <1000000>;
  80. };
  81. button-enter {
  82. label = "button5";
  83. linux,code = <KEY_F5>;
  84. press-threshold-microvolt = <500000>;
  85. };
  86. };
  87. cros_ec: cros-ec {
  88. reg = <0 0>;
  89. compatible = "google,cros-ec-sandbox";
  90. /*
  91. * This describes the flash memory within the EC. Note
  92. * that the STM32L flash erases to 0, not 0xff.
  93. */
  94. flash {
  95. image-pos = <0x08000000>;
  96. size = <0x20000>;
  97. erase-value = <0>;
  98. /* Information for sandbox */
  99. ro {
  100. image-pos = <0>;
  101. size = <0xf000>;
  102. };
  103. wp-ro {
  104. image-pos = <0xf000>;
  105. size = <0x1000>;
  106. used = <0x884>;
  107. compress = "lz4";
  108. uncomp-size = <0xcf8>;
  109. hash {
  110. algo = "sha256";
  111. value = [00 01 02 03 04 05 06 07
  112. 08 09 0a 0b 0c 0d 0e 0f
  113. 10 11 12 13 14 15 16 17
  114. 18 19 1a 1b 1c 1d 1e 1f];
  115. };
  116. };
  117. rw {
  118. image-pos = <0x10000>;
  119. size = <0x10000>;
  120. };
  121. };
  122. };
  123. dsi_host: dsi_host {
  124. compatible = "sandbox,dsi-host";
  125. };
  126. a-test {
  127. reg = <0 1>;
  128. compatible = "denx,u-boot-fdt-test";
  129. ping-expect = <0>;
  130. ping-add = <0>;
  131. u-boot,dm-pre-reloc;
  132. test-gpios = <&gpio_a 1>, <&gpio_a 4>,
  133. <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
  134. <0>, <&gpio_a 12>;
  135. test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
  136. <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
  137. <&gpio_b 7 GPIO_IN 3 2 1>,
  138. <&gpio_b 8 GPIO_OUT 3 2 1>,
  139. <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
  140. test3-gpios =
  141. <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
  142. <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
  143. <&gpio_c 2 GPIO_OUT>,
  144. <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
  145. <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
  146. <&gpio_c 5 GPIO_IN>,
  147. <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
  148. <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
  149. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  150. test5-gpios = <&gpio_a 19>;
  151. int-value = <1234>;
  152. uint-value = <(-1234)>;
  153. int64-value = /bits/ 64 <0x1111222233334444>;
  154. int-array = <5678 9123 4567>;
  155. str-value = "test string";
  156. interrupts-extended = <&irq 3 0>;
  157. acpi,name = "GHIJ";
  158. phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>;
  159. mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
  160. <&muxcontroller0 2>, <&muxcontroller0 3>,
  161. <&muxcontroller1>;
  162. mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4";
  163. mux-syscon = <&syscon3>;
  164. display-timings {
  165. timing0: 240x320 {
  166. clock-frequency = <6500000>;
  167. hactive = <240>;
  168. vactive = <320>;
  169. hfront-porch = <6>;
  170. hback-porch = <7>;
  171. hsync-len = <1>;
  172. vback-porch = <5>;
  173. vfront-porch = <8>;
  174. vsync-len = <2>;
  175. hsync-active = <1>;
  176. vsync-active = <0>;
  177. de-active = <1>;
  178. pixelclk-active = <1>;
  179. interlaced;
  180. doublescan;
  181. doubleclk;
  182. };
  183. timing1: 480x800 {
  184. clock-frequency = <9000000>;
  185. hactive = <480>;
  186. vactive = <800>;
  187. hfront-porch = <10>;
  188. hback-porch = <59>;
  189. hsync-len = <12>;
  190. vback-porch = <15>;
  191. vfront-porch = <17>;
  192. vsync-len = <16>;
  193. hsync-active = <0>;
  194. vsync-active = <1>;
  195. de-active = <0>;
  196. pixelclk-active = <0>;
  197. };
  198. timing2: 800x480 {
  199. clock-frequency = <33500000>;
  200. hactive = <800>;
  201. vactive = <480>;
  202. hback-porch = <89>;
  203. hfront-porch = <164>;
  204. vback-porch = <23>;
  205. vfront-porch = <10>;
  206. hsync-len = <11>;
  207. vsync-len = <13>;
  208. };
  209. };
  210. };
  211. junk {
  212. reg = <1 1>;
  213. compatible = "not,compatible";
  214. };
  215. no-compatible {
  216. reg = <2 1>;
  217. };
  218. backlight: backlight {
  219. compatible = "pwm-backlight";
  220. enable-gpios = <&gpio_a 1>;
  221. power-supply = <&ldo_1>;
  222. pwms = <&pwm 0 1000>;
  223. default-brightness-level = <5>;
  224. brightness-levels = <0 16 32 64 128 170 202 234 255>;
  225. };
  226. bind-test {
  227. compatible = "simple-bus";
  228. bind-test-child1 {
  229. compatible = "sandbox,phy";
  230. #phy-cells = <1>;
  231. };
  232. bind-test-child2 {
  233. compatible = "simple-bus";
  234. };
  235. };
  236. b-test {
  237. reg = <3 1>;
  238. compatible = "denx,u-boot-fdt-test";
  239. ping-expect = <3>;
  240. ping-add = <3>;
  241. mux-controls = <&muxcontroller0 0>;
  242. mux-control-names = "mux0";
  243. };
  244. phy_provider0: gen_phy@0 {
  245. compatible = "sandbox,phy";
  246. #phy-cells = <1>;
  247. };
  248. phy_provider1: gen_phy@1 {
  249. compatible = "sandbox,phy";
  250. #phy-cells = <0>;
  251. broken;
  252. };
  253. phy_provider2: gen_phy@2 {
  254. compatible = "sandbox,phy";
  255. #phy-cells = <0>;
  256. };
  257. gen_phy_user: gen_phy_user {
  258. compatible = "simple-bus";
  259. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  260. phy-names = "phy1", "phy2", "phy3";
  261. };
  262. gen_phy_user1: gen_phy_user1 {
  263. compatible = "simple-bus";
  264. phys = <&phy_provider0 0>, <&phy_provider2>;
  265. phy-names = "phy1", "phy2";
  266. };
  267. some-bus {
  268. #address-cells = <1>;
  269. #size-cells = <0>;
  270. compatible = "denx,u-boot-test-bus";
  271. reg = <3 1>;
  272. ping-expect = <4>;
  273. ping-add = <4>;
  274. c-test@5 {
  275. compatible = "denx,u-boot-fdt-test";
  276. reg = <5>;
  277. ping-expect = <5>;
  278. ping-add = <5>;
  279. };
  280. c-test@0 {
  281. compatible = "denx,u-boot-fdt-test";
  282. reg = <0>;
  283. ping-expect = <6>;
  284. ping-add = <6>;
  285. };
  286. c-test@1 {
  287. compatible = "denx,u-boot-fdt-test";
  288. reg = <1>;
  289. ping-expect = <7>;
  290. ping-add = <7>;
  291. };
  292. };
  293. d-test {
  294. reg = <3 1>;
  295. ping-expect = <6>;
  296. ping-add = <6>;
  297. compatible = "google,another-fdt-test";
  298. };
  299. e-test {
  300. reg = <3 1>;
  301. ping-expect = <6>;
  302. ping-add = <6>;
  303. compatible = "google,another-fdt-test";
  304. };
  305. f-test {
  306. compatible = "denx,u-boot-fdt-test";
  307. };
  308. g-test {
  309. compatible = "denx,u-boot-fdt-test";
  310. };
  311. h-test {
  312. compatible = "denx,u-boot-fdt-test1";
  313. };
  314. i-test {
  315. compatible = "mediatek,u-boot-fdt-test";
  316. #address-cells = <1>;
  317. #size-cells = <0>;
  318. subnode@0 {
  319. reg = <0>;
  320. };
  321. subnode@1 {
  322. reg = <1>;
  323. };
  324. subnode@2 {
  325. reg = <2>;
  326. };
  327. };
  328. devres-test {
  329. compatible = "denx,u-boot-devres-test";
  330. };
  331. another-test {
  332. reg = <0 2>;
  333. compatible = "denx,u-boot-fdt-test";
  334. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  335. test5-gpios = <&gpio_a 19>;
  336. };
  337. mmio-bus@0 {
  338. #address-cells = <1>;
  339. #size-cells = <1>;
  340. compatible = "denx,u-boot-test-bus";
  341. dma-ranges = <0x10000000 0x00000000 0x00040000>;
  342. subnode@0 {
  343. compatible = "denx,u-boot-fdt-test";
  344. };
  345. };
  346. mmio-bus@1 {
  347. #address-cells = <1>;
  348. #size-cells = <1>;
  349. compatible = "denx,u-boot-test-bus";
  350. subnode@0 {
  351. compatible = "denx,u-boot-fdt-test";
  352. };
  353. };
  354. acpi_test1: acpi-test {
  355. compatible = "denx,u-boot-acpi-test";
  356. acpi-ssdt-test-data = "ab";
  357. acpi-dsdt-test-data = "hi";
  358. child {
  359. compatible = "denx,u-boot-acpi-test";
  360. };
  361. };
  362. acpi_test2: acpi-test2 {
  363. compatible = "denx,u-boot-acpi-test";
  364. acpi-ssdt-test-data = "cd";
  365. acpi-dsdt-test-data = "jk";
  366. };
  367. clocks {
  368. clk_fixed: clk-fixed {
  369. compatible = "fixed-clock";
  370. #clock-cells = <0>;
  371. clock-frequency = <1234>;
  372. };
  373. clk_fixed_factor: clk-fixed-factor {
  374. compatible = "fixed-factor-clock";
  375. #clock-cells = <0>;
  376. clock-div = <3>;
  377. clock-mult = <2>;
  378. clocks = <&clk_fixed>;
  379. };
  380. osc {
  381. compatible = "fixed-clock";
  382. #clock-cells = <0>;
  383. clock-frequency = <20000000>;
  384. };
  385. };
  386. clk_sandbox: clk-sbox {
  387. compatible = "sandbox,clk";
  388. #clock-cells = <1>;
  389. assigned-clocks = <&clk_sandbox 3>;
  390. assigned-clock-rates = <321>;
  391. };
  392. clk-test {
  393. compatible = "sandbox,clk-test";
  394. clocks = <&clk_fixed>,
  395. <&clk_sandbox 1>,
  396. <&clk_sandbox 0>,
  397. <&clk_sandbox 3>,
  398. <&clk_sandbox 2>;
  399. clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
  400. };
  401. ccf: clk-ccf {
  402. compatible = "sandbox,clk-ccf";
  403. };
  404. eth@10002000 {
  405. compatible = "sandbox,eth";
  406. reg = <0x10002000 0x1000>;
  407. fake-host-hwaddr = [00 00 66 44 22 00];
  408. };
  409. eth_5: eth@10003000 {
  410. compatible = "sandbox,eth";
  411. reg = <0x10003000 0x1000>;
  412. fake-host-hwaddr = [00 00 66 44 22 11];
  413. };
  414. eth_3: sbe5 {
  415. compatible = "sandbox,eth";
  416. reg = <0x10005000 0x1000>;
  417. fake-host-hwaddr = [00 00 66 44 22 33];
  418. };
  419. eth@10004000 {
  420. compatible = "sandbox,eth";
  421. reg = <0x10004000 0x1000>;
  422. fake-host-hwaddr = [00 00 66 44 22 22];
  423. };
  424. dsa_eth0: dsa-test-eth {
  425. compatible = "sandbox,eth";
  426. reg = <0x10006000 0x1000>;
  427. fake-host-hwaddr = [00 00 66 44 22 66];
  428. };
  429. dsa-test {
  430. compatible = "sandbox,dsa";
  431. ports {
  432. #address-cells = <1>;
  433. #size-cells = <0>;
  434. swp_0: port@0 {
  435. reg = <0>;
  436. label = "lan0";
  437. phy-mode = "rgmii-rxid";
  438. fixed-link {
  439. speed = <100>;
  440. full-duplex;
  441. };
  442. };
  443. swp_1: port@1 {
  444. reg = <1>;
  445. label = "lan1";
  446. phy-mode = "rgmii-txid";
  447. fixed-link = <0 1 100 0 0>;
  448. };
  449. port@2 {
  450. reg = <2>;
  451. ethernet = <&dsa_eth0>;
  452. fixed-link {
  453. speed = <1000>;
  454. full-duplex;
  455. };
  456. };
  457. };
  458. };
  459. firmware {
  460. sandbox_firmware: sandbox-firmware {
  461. compatible = "sandbox,firmware";
  462. };
  463. sandbox-scmi-agent@0 {
  464. compatible = "sandbox,scmi-agent";
  465. #address-cells = <1>;
  466. #size-cells = <0>;
  467. clk_scmi0: protocol@14 {
  468. reg = <0x14>;
  469. #clock-cells = <1>;
  470. };
  471. reset_scmi0: protocol@16 {
  472. reg = <0x16>;
  473. #reset-cells = <1>;
  474. };
  475. protocol@17 {
  476. reg = <0x17>;
  477. regulators {
  478. #address-cells = <1>;
  479. #size-cells = <0>;
  480. regul0_scmi0: reg@0 {
  481. reg = <0>;
  482. regulator-name = "sandbox-voltd0";
  483. regulator-min-microvolt = <1100000>;
  484. regulator-max-microvolt = <3300000>;
  485. };
  486. regul1_scmi0: reg@1 {
  487. reg = <0x1>;
  488. regulator-name = "sandbox-voltd1";
  489. regulator-min-microvolt = <1800000>;
  490. };
  491. };
  492. };
  493. };
  494. sandbox-scmi-agent@1 {
  495. compatible = "sandbox,scmi-agent";
  496. #address-cells = <1>;
  497. #size-cells = <0>;
  498. clk_scmi1: protocol@14 {
  499. reg = <0x14>;
  500. #clock-cells = <1>;
  501. };
  502. protocol@10 {
  503. reg = <0x10>;
  504. };
  505. };
  506. };
  507. pinctrl-gpio {
  508. compatible = "sandbox,pinctrl-gpio";
  509. gpio_a: base-gpios {
  510. compatible = "sandbox,gpio";
  511. gpio-controller;
  512. #gpio-cells = <1>;
  513. gpio-bank-name = "a";
  514. sandbox,gpio-count = <20>;
  515. hog_input_active_low {
  516. gpio-hog;
  517. input;
  518. gpios = <10 GPIO_ACTIVE_LOW>;
  519. };
  520. hog_input_active_high {
  521. gpio-hog;
  522. input;
  523. gpios = <11 GPIO_ACTIVE_HIGH>;
  524. };
  525. hog_output_low {
  526. gpio-hog;
  527. output-low;
  528. gpios = <12 GPIO_ACTIVE_HIGH>;
  529. };
  530. hog_output_high {
  531. gpio-hog;
  532. output-high;
  533. gpios = <13 GPIO_ACTIVE_HIGH>;
  534. };
  535. };
  536. gpio_b: extra-gpios {
  537. compatible = "sandbox,gpio";
  538. gpio-controller;
  539. #gpio-cells = <5>;
  540. gpio-bank-name = "b";
  541. sandbox,gpio-count = <10>;
  542. };
  543. gpio_c: pinmux-gpios {
  544. compatible = "sandbox,gpio";
  545. gpio-controller;
  546. #gpio-cells = <2>;
  547. gpio-bank-name = "c";
  548. sandbox,gpio-count = <10>;
  549. };
  550. };
  551. i2c@0 {
  552. #address-cells = <1>;
  553. #size-cells = <0>;
  554. reg = <0 1>;
  555. compatible = "sandbox,i2c";
  556. clock-frequency = <100000>;
  557. pinctrl-names = "default";
  558. pinctrl-0 = <&pinmux_i2c0_pins>;
  559. eeprom@2c {
  560. reg = <0x2c>;
  561. compatible = "i2c-eeprom";
  562. sandbox,emul = <&emul_eeprom>;
  563. partitions {
  564. compatible = "fixed-partitions";
  565. #address-cells = <1>;
  566. #size-cells = <1>;
  567. bootcount_i2c: bootcount@10 {
  568. reg = <10 2>;
  569. };
  570. };
  571. };
  572. rtc_0: rtc@43 {
  573. reg = <0x43>;
  574. compatible = "sandbox-rtc";
  575. sandbox,emul = <&emul0>;
  576. };
  577. rtc_1: rtc@61 {
  578. reg = <0x61>;
  579. compatible = "sandbox-rtc";
  580. sandbox,emul = <&emul1>;
  581. };
  582. i2c_emul: emul {
  583. reg = <0xff>;
  584. compatible = "sandbox,i2c-emul-parent";
  585. emul_eeprom: emul-eeprom {
  586. compatible = "sandbox,i2c-eeprom";
  587. sandbox,filename = "i2c.bin";
  588. sandbox,size = <256>;
  589. };
  590. emul0: emul0 {
  591. compatible = "sandbox,i2c-rtc-emul";
  592. };
  593. emul1: emull {
  594. compatible = "sandbox,i2c-rtc-emul";
  595. };
  596. };
  597. sandbox_pmic: sandbox_pmic {
  598. reg = <0x40>;
  599. sandbox,emul = <&emul_pmic0>;
  600. };
  601. mc34708: pmic@41 {
  602. reg = <0x41>;
  603. sandbox,emul = <&emul_pmic1>;
  604. };
  605. };
  606. bootcount@0 {
  607. compatible = "u-boot,bootcount-rtc";
  608. rtc = <&rtc_1>;
  609. offset = <0x13>;
  610. };
  611. bootcount {
  612. compatible = "u-boot,bootcount-i2c-eeprom";
  613. i2c-eeprom = <&bootcount_i2c>;
  614. };
  615. adc: adc@0 {
  616. compatible = "sandbox,adc";
  617. #io-channel-cells = <1>;
  618. vdd-supply = <&buck2>;
  619. vss-microvolts = <0>;
  620. };
  621. irq: irq {
  622. compatible = "sandbox,irq";
  623. interrupt-controller;
  624. #interrupt-cells = <2>;
  625. };
  626. lcd {
  627. u-boot,dm-pre-reloc;
  628. compatible = "sandbox,lcd-sdl";
  629. pinctrl-names = "default";
  630. pinctrl-0 = <&pinmux_lcd_pins>;
  631. xres = <1366>;
  632. yres = <768>;
  633. };
  634. leds {
  635. compatible = "gpio-leds";
  636. iracibble {
  637. gpios = <&gpio_a 1 0>;
  638. label = "sandbox:red";
  639. };
  640. martinet {
  641. gpios = <&gpio_a 2 0>;
  642. label = "sandbox:green";
  643. };
  644. default_on {
  645. gpios = <&gpio_a 5 0>;
  646. label = "sandbox:default_on";
  647. default-state = "on";
  648. };
  649. default_off {
  650. gpios = <&gpio_a 6 0>;
  651. /* label intentionally omitted */
  652. default-state = "off";
  653. };
  654. };
  655. mbox: mbox {
  656. compatible = "sandbox,mbox";
  657. #mbox-cells = <1>;
  658. };
  659. mbox-test {
  660. compatible = "sandbox,mbox-test";
  661. mboxes = <&mbox 100>, <&mbox 1>;
  662. mbox-names = "other", "test";
  663. };
  664. cpus {
  665. timebase-frequency = <2000000>;
  666. cpu-test1 {
  667. timebase-frequency = <3000000>;
  668. compatible = "sandbox,cpu_sandbox";
  669. u-boot,dm-pre-reloc;
  670. };
  671. cpu-test2 {
  672. compatible = "sandbox,cpu_sandbox";
  673. u-boot,dm-pre-reloc;
  674. };
  675. cpu-test3 {
  676. compatible = "sandbox,cpu_sandbox";
  677. u-boot,dm-pre-reloc;
  678. };
  679. };
  680. chipid: chipid {
  681. compatible = "sandbox,soc";
  682. };
  683. i2s: i2s {
  684. compatible = "sandbox,i2s";
  685. #sound-dai-cells = <1>;
  686. sandbox,silent; /* Don't emit sounds while testing */
  687. };
  688. nop-test_0 {
  689. compatible = "sandbox,nop_sandbox1";
  690. nop-test_1 {
  691. compatible = "sandbox,nop_sandbox2";
  692. bind = "True";
  693. };
  694. nop-test_2 {
  695. compatible = "sandbox,nop_sandbox2";
  696. bind = "False";
  697. };
  698. };
  699. misc-test {
  700. compatible = "sandbox,misc_sandbox";
  701. };
  702. mmc2 {
  703. compatible = "sandbox,mmc";
  704. };
  705. mmc1 {
  706. compatible = "sandbox,mmc";
  707. };
  708. mmc0 {
  709. compatible = "sandbox,mmc";
  710. };
  711. pch {
  712. compatible = "sandbox,pch";
  713. };
  714. pci0: pci@0 {
  715. compatible = "sandbox,pci";
  716. device_type = "pci";
  717. bus-range = <0x00 0xff>;
  718. #address-cells = <3>;
  719. #size-cells = <2>;
  720. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
  721. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  722. pci@0,0 {
  723. compatible = "pci-generic";
  724. reg = <0x0000 0 0 0 0>;
  725. sandbox,emul = <&swap_case_emul0_0>;
  726. };
  727. pci@1,0 {
  728. compatible = "pci-generic";
  729. /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
  730. reg = <0x02000814 0 0 0 0
  731. 0x01000810 0 0 0 0>;
  732. sandbox,emul = <&swap_case_emul0_1>;
  733. };
  734. p2sb-pci@2,0 {
  735. compatible = "sandbox,p2sb";
  736. reg = <0x02001010 0 0 0 0>;
  737. sandbox,emul = <&p2sb_emul>;
  738. adder {
  739. intel,p2sb-port-id = <3>;
  740. compatible = "sandbox,adder";
  741. };
  742. };
  743. pci@1e,0 {
  744. compatible = "sandbox,pmc";
  745. reg = <0xf000 0 0 0 0>;
  746. sandbox,emul = <&pmc_emul1e>;
  747. acpi-base = <0x400>;
  748. gpe0-dwx-mask = <0xf>;
  749. gpe0-dwx-shift-base = <4>;
  750. gpe0-dw = <6 7 9>;
  751. gpe0-sts = <0x20>;
  752. gpe0-en = <0x30>;
  753. };
  754. pci@1f,0 {
  755. compatible = "pci-generic";
  756. /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
  757. reg = <0x0100f810 0 0 0 0>;
  758. sandbox,emul = <&swap_case_emul0_1f>;
  759. };
  760. };
  761. pci-emul0 {
  762. compatible = "sandbox,pci-emul-parent";
  763. swap_case_emul0_0: emul0@0,0 {
  764. compatible = "sandbox,swap-case";
  765. };
  766. swap_case_emul0_1: emul0@1,0 {
  767. compatible = "sandbox,swap-case";
  768. use-ea;
  769. };
  770. swap_case_emul0_1f: emul0@1f,0 {
  771. compatible = "sandbox,swap-case";
  772. };
  773. p2sb_emul: emul@2,0 {
  774. compatible = "sandbox,p2sb-emul";
  775. };
  776. pmc_emul1e: emul@1e,0 {
  777. compatible = "sandbox,pmc-emul";
  778. };
  779. };
  780. pci1: pci@1 {
  781. compatible = "sandbox,pci";
  782. device_type = "pci";
  783. bus-range = <0x00 0xff>;
  784. #address-cells = <3>;
  785. #size-cells = <2>;
  786. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0
  787. 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1
  788. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  789. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  790. 0x0c 0x00 0x1234 0x5678
  791. 0x10 0x00 0x1234 0x5678>;
  792. pci@10,0 {
  793. reg = <0x8000 0 0 0 0>;
  794. };
  795. };
  796. pci2: pci@2 {
  797. compatible = "sandbox,pci";
  798. device_type = "pci";
  799. bus-range = <0x00 0xff>;
  800. #address-cells = <3>;
  801. #size-cells = <2>;
  802. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  803. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  804. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  805. pci@1f,0 {
  806. compatible = "pci-generic";
  807. reg = <0xf800 0 0 0 0>;
  808. sandbox,emul = <&swap_case_emul2_1f>;
  809. };
  810. };
  811. pci-emul2 {
  812. compatible = "sandbox,pci-emul-parent";
  813. swap_case_emul2_1f: emul2@1f,0 {
  814. compatible = "sandbox,swap-case";
  815. };
  816. };
  817. pci_ep: pci_ep {
  818. compatible = "sandbox,pci_ep";
  819. };
  820. probing {
  821. compatible = "simple-bus";
  822. test1 {
  823. compatible = "denx,u-boot-probe-test";
  824. };
  825. test2 {
  826. compatible = "denx,u-boot-probe-test";
  827. };
  828. test3 {
  829. compatible = "denx,u-boot-probe-test";
  830. };
  831. test4 {
  832. compatible = "denx,u-boot-probe-test";
  833. first-syscon = <&syscon0>;
  834. second-sys-ctrl = <&another_system_controller>;
  835. third-syscon = <&syscon2>;
  836. };
  837. };
  838. pwrdom: power-domain {
  839. compatible = "sandbox,power-domain";
  840. #power-domain-cells = <1>;
  841. };
  842. power-domain-test {
  843. compatible = "sandbox,power-domain-test";
  844. power-domains = <&pwrdom 2>;
  845. };
  846. pwm: pwm {
  847. compatible = "sandbox,pwm";
  848. #pwm-cells = <2>;
  849. pinctrl-names = "default";
  850. pinctrl-0 = <&pinmux_pwm_pins>;
  851. };
  852. pwm2 {
  853. compatible = "sandbox,pwm";
  854. #pwm-cells = <2>;
  855. };
  856. ram {
  857. compatible = "sandbox,ram";
  858. };
  859. reset@0 {
  860. compatible = "sandbox,warm-reset";
  861. };
  862. reset@1 {
  863. compatible = "sandbox,reset";
  864. };
  865. resetc: reset-ctl {
  866. compatible = "sandbox,reset-ctl";
  867. #reset-cells = <1>;
  868. };
  869. reset-ctl-test {
  870. compatible = "sandbox,reset-ctl-test";
  871. resets = <&resetc 100>, <&resetc 2>, <&resetc 20>, <&resetc 40>;
  872. reset-names = "other", "test", "test2", "test3";
  873. };
  874. rng {
  875. compatible = "sandbox,sandbox-rng";
  876. };
  877. rproc_1: rproc@1 {
  878. compatible = "sandbox,test-processor";
  879. remoteproc-name = "remoteproc-test-dev1";
  880. };
  881. rproc_2: rproc@2 {
  882. compatible = "sandbox,test-processor";
  883. internal-memory-mapped;
  884. remoteproc-name = "remoteproc-test-dev2";
  885. };
  886. panel {
  887. compatible = "simple-panel";
  888. backlight = <&backlight 0 100>;
  889. };
  890. smem@0 {
  891. compatible = "sandbox,smem";
  892. };
  893. sound {
  894. compatible = "sandbox,sound";
  895. cpu {
  896. sound-dai = <&i2s 0>;
  897. };
  898. codec {
  899. sound-dai = <&audio 0>;
  900. };
  901. };
  902. spi@0 {
  903. #address-cells = <1>;
  904. #size-cells = <0>;
  905. reg = <0 1>;
  906. compatible = "sandbox,spi";
  907. cs-gpios = <0>, <0>, <&gpio_a 0>;
  908. pinctrl-names = "default";
  909. pinctrl-0 = <&pinmux_spi0_pins>;
  910. spi.bin@0 {
  911. reg = <0>;
  912. compatible = "spansion,m25p16", "jedec,spi-nor";
  913. spi-max-frequency = <40000000>;
  914. sandbox,filename = "spi.bin";
  915. };
  916. spi.bin@1 {
  917. reg = <1>;
  918. compatible = "spansion,m25p16", "jedec,spi-nor";
  919. spi-max-frequency = <50000000>;
  920. sandbox,filename = "spi.bin";
  921. spi-cpol;
  922. spi-cpha;
  923. };
  924. };
  925. syscon0: syscon@0 {
  926. compatible = "sandbox,syscon0";
  927. reg = <0x10 16>;
  928. };
  929. another_system_controller: syscon@1 {
  930. compatible = "sandbox,syscon1";
  931. reg = <0x20 5
  932. 0x28 6
  933. 0x30 7
  934. 0x38 8>;
  935. };
  936. syscon2: syscon@2 {
  937. compatible = "simple-mfd", "syscon";
  938. reg = <0x40 5
  939. 0x48 6
  940. 0x50 7
  941. 0x58 8>;
  942. };
  943. syscon3: syscon@3 {
  944. compatible = "simple-mfd", "syscon";
  945. reg = <0x000100 0x10>;
  946. muxcontroller0: a-mux-controller {
  947. compatible = "mmio-mux";
  948. #mux-control-cells = <1>;
  949. mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
  950. <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
  951. <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
  952. idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
  953. u-boot,mux-autoprobe;
  954. };
  955. };
  956. muxcontroller1: emul-mux-controller {
  957. compatible = "mux-emul";
  958. #mux-control-cells = <0>;
  959. u-boot,mux-autoprobe;
  960. idle-state = <0xabcd>;
  961. };
  962. testfdtm0 {
  963. compatible = "denx,u-boot-fdtm-test";
  964. };
  965. testfdtm1: testfdtm1 {
  966. compatible = "denx,u-boot-fdtm-test";
  967. };
  968. testfdtm2 {
  969. compatible = "denx,u-boot-fdtm-test";
  970. };
  971. timer@0 {
  972. compatible = "sandbox,timer";
  973. clock-frequency = <1000000>;
  974. };
  975. timer@1 {
  976. compatible = "sandbox,timer";
  977. sandbox,timebase-frequency-fallback;
  978. };
  979. tpm2 {
  980. compatible = "sandbox,tpm2";
  981. };
  982. uart0: serial {
  983. compatible = "sandbox,serial";
  984. u-boot,dm-pre-reloc;
  985. pinctrl-names = "default";
  986. pinctrl-0 = <&pinmux_uart0_pins>;
  987. };
  988. usb_0: usb@0 {
  989. compatible = "sandbox,usb";
  990. status = "disabled";
  991. hub {
  992. compatible = "sandbox,usb-hub";
  993. #address-cells = <1>;
  994. #size-cells = <0>;
  995. flash-stick {
  996. reg = <0>;
  997. compatible = "sandbox,usb-flash";
  998. };
  999. };
  1000. };
  1001. usb_1: usb@1 {
  1002. compatible = "sandbox,usb";
  1003. hub {
  1004. compatible = "usb-hub";
  1005. usb,device-class = <9>;
  1006. #address-cells = <1>;
  1007. #size-cells = <0>;
  1008. hub-emul {
  1009. compatible = "sandbox,usb-hub";
  1010. #address-cells = <1>;
  1011. #size-cells = <0>;
  1012. flash-stick@0 {
  1013. reg = <0>;
  1014. compatible = "sandbox,usb-flash";
  1015. sandbox,filepath = "testflash.bin";
  1016. };
  1017. flash-stick@1 {
  1018. reg = <1>;
  1019. compatible = "sandbox,usb-flash";
  1020. sandbox,filepath = "testflash1.bin";
  1021. };
  1022. flash-stick@2 {
  1023. reg = <2>;
  1024. compatible = "sandbox,usb-flash";
  1025. sandbox,filepath = "testflash2.bin";
  1026. };
  1027. keyb@3 {
  1028. reg = <3>;
  1029. compatible = "sandbox,usb-keyb";
  1030. };
  1031. };
  1032. usbstor@1 {
  1033. reg = <1>;
  1034. };
  1035. usbstor@3 {
  1036. reg = <3>;
  1037. };
  1038. };
  1039. };
  1040. usb_2: usb@2 {
  1041. compatible = "sandbox,usb";
  1042. status = "disabled";
  1043. };
  1044. spmi: spmi@0 {
  1045. compatible = "sandbox,spmi";
  1046. #address-cells = <0x1>;
  1047. #size-cells = <0x1>;
  1048. ranges;
  1049. pm8916@0 {
  1050. compatible = "qcom,spmi-pmic";
  1051. reg = <0x0 0x1>;
  1052. #address-cells = <0x1>;
  1053. #size-cells = <0x1>;
  1054. ranges;
  1055. spmi_gpios: gpios@c000 {
  1056. compatible = "qcom,pm8916-gpio";
  1057. reg = <0xc000 0x400>;
  1058. gpio-controller;
  1059. gpio-count = <4>;
  1060. #gpio-cells = <2>;
  1061. gpio-bank-name="spmi";
  1062. };
  1063. };
  1064. };
  1065. wdt0: wdt@0 {
  1066. compatible = "sandbox,wdt";
  1067. };
  1068. axi: axi@0 {
  1069. compatible = "sandbox,axi";
  1070. #address-cells = <0x1>;
  1071. #size-cells = <0x1>;
  1072. store@0 {
  1073. compatible = "sandbox,sandbox_store";
  1074. reg = <0x0 0x400>;
  1075. };
  1076. };
  1077. chosen {
  1078. #address-cells = <1>;
  1079. #size-cells = <1>;
  1080. setting = "sunrise ohoka";
  1081. other-node = "/some-bus/c-test@5";
  1082. int-values = <0x1937 72993>;
  1083. u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
  1084. chosen-test {
  1085. compatible = "denx,u-boot-fdt-test";
  1086. reg = <9 1>;
  1087. };
  1088. };
  1089. translation-test@8000 {
  1090. compatible = "simple-bus";
  1091. reg = <0x8000 0x4000>;
  1092. #address-cells = <0x2>;
  1093. #size-cells = <0x1>;
  1094. ranges = <0 0x0 0x8000 0x1000
  1095. 1 0x100 0x9000 0x1000
  1096. 2 0x200 0xA000 0x1000
  1097. 3 0x300 0xB000 0x1000
  1098. 4 0x400 0xC000 0x1000
  1099. >;
  1100. dma-ranges = <0 0x000 0x10000000 0x1000
  1101. 1 0x100 0x20000000 0x1000
  1102. >;
  1103. dev@0,0 {
  1104. compatible = "denx,u-boot-fdt-dummy";
  1105. reg = <0 0x0 0x1000>;
  1106. reg-names = "sandbox-dummy-0";
  1107. };
  1108. dev@1,100 {
  1109. compatible = "denx,u-boot-fdt-dummy";
  1110. reg = <1 0x100 0x1000>;
  1111. };
  1112. dev@2,200 {
  1113. compatible = "denx,u-boot-fdt-dummy";
  1114. reg = <2 0x200 0x1000>;
  1115. };
  1116. noxlatebus@3,300 {
  1117. compatible = "simple-bus";
  1118. reg = <3 0x300 0x1000>;
  1119. #address-cells = <0x1>;
  1120. #size-cells = <0x0>;
  1121. dev@42 {
  1122. compatible = "denx,u-boot-fdt-dummy";
  1123. reg = <0x42>;
  1124. };
  1125. };
  1126. xlatebus@4,400 {
  1127. compatible = "sandbox,zero-size-cells-bus";
  1128. reg = <4 0x400 0x1000>;
  1129. #address-cells = <1>;
  1130. #size-cells = <1>;
  1131. ranges = <0 4 0x400 0x1000>;
  1132. devs {
  1133. #address-cells = <1>;
  1134. #size-cells = <0>;
  1135. dev@19 {
  1136. compatible = "denx,u-boot-fdt-dummy";
  1137. reg = <0x19>;
  1138. };
  1139. };
  1140. };
  1141. };
  1142. osd {
  1143. compatible = "sandbox,sandbox_osd";
  1144. };
  1145. sandbox_tee {
  1146. compatible = "sandbox,tee";
  1147. };
  1148. sandbox_virtio1 {
  1149. compatible = "sandbox,virtio1";
  1150. };
  1151. sandbox_virtio2 {
  1152. compatible = "sandbox,virtio2";
  1153. };
  1154. sandbox_scmi {
  1155. compatible = "sandbox,scmi-devices";
  1156. clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>;
  1157. resets = <&reset_scmi0 3>;
  1158. regul0-supply = <&regul0_scmi0>;
  1159. regul1-supply = <&regul1_scmi0>;
  1160. };
  1161. pinctrl {
  1162. compatible = "sandbox,pinctrl";
  1163. pinctrl-names = "default", "alternate";
  1164. pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>;
  1165. pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>;
  1166. pinctrl_gpios: gpios {
  1167. gpio0 {
  1168. pins = "P5";
  1169. function = "GPIO";
  1170. bias-pull-up;
  1171. input-disable;
  1172. };
  1173. gpio1 {
  1174. pins = "P6";
  1175. function = "GPIO";
  1176. output-high;
  1177. drive-open-drain;
  1178. };
  1179. gpio2 {
  1180. pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>;
  1181. bias-pull-down;
  1182. input-enable;
  1183. };
  1184. gpio3 {
  1185. pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>;
  1186. bias-disable;
  1187. };
  1188. };
  1189. pinctrl_i2c: i2c {
  1190. groups {
  1191. groups = "I2C_UART";
  1192. function = "I2C";
  1193. };
  1194. pins {
  1195. pins = "P0", "P1";
  1196. drive-open-drain;
  1197. };
  1198. };
  1199. pinctrl_i2s: i2s {
  1200. groups = "SPI_I2S";
  1201. function = "I2S";
  1202. };
  1203. pinctrl_spi: spi {
  1204. groups = "SPI_I2S";
  1205. function = "SPI";
  1206. cs {
  1207. pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>,
  1208. <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>;
  1209. };
  1210. };
  1211. };
  1212. pinctrl-single-no-width {
  1213. compatible = "pinctrl-single";
  1214. reg = <0x0000 0x238>;
  1215. #pinctrl-cells = <1>;
  1216. pinctrl-single,function-mask = <0x7f>;
  1217. };
  1218. pinctrl-single-pins {
  1219. compatible = "pinctrl-single";
  1220. reg = <0x0000 0x238>;
  1221. #pinctrl-cells = <1>;
  1222. pinctrl-single,register-width = <32>;
  1223. pinctrl-single,function-mask = <0x7f>;
  1224. pinmux_pwm_pins: pinmux_pwm_pins {
  1225. pinctrl-single,pins = < 0x48 0x06 >;
  1226. };
  1227. pinmux_spi0_pins: pinmux_spi0_pins {
  1228. pinctrl-single,pins = <
  1229. 0x190 0x0c
  1230. 0x194 0x0c
  1231. 0x198 0x23
  1232. 0x19c 0x0c
  1233. >;
  1234. };
  1235. pinmux_uart0_pins: pinmux_uart0_pins {
  1236. pinctrl-single,pins = <
  1237. 0x70 0x30
  1238. 0x74 0x00
  1239. >;
  1240. };
  1241. };
  1242. pinctrl-single-bits {
  1243. compatible = "pinctrl-single";
  1244. reg = <0x0000 0x50>;
  1245. #pinctrl-cells = <2>;
  1246. pinctrl-single,bit-per-mux;
  1247. pinctrl-single,register-width = <32>;
  1248. pinctrl-single,function-mask = <0xf>;
  1249. pinmux_i2c0_pins: pinmux_i2c0_pins {
  1250. pinctrl-single,bits = <
  1251. 0x10 0x00002200 0x0000ff00
  1252. >;
  1253. };
  1254. pinmux_lcd_pins: pinmux_lcd_pins {
  1255. pinctrl-single,bits = <
  1256. 0x40 0x22222200 0xffffff00
  1257. 0x44 0x22222222 0xffffffff
  1258. 0x48 0x00000022 0x000000ff
  1259. 0x48 0x02000000 0x0f000000
  1260. 0x4c 0x02000022 0x0f0000ff
  1261. >;
  1262. };
  1263. };
  1264. hwspinlock@0 {
  1265. compatible = "sandbox,hwspinlock";
  1266. };
  1267. dma: dma {
  1268. compatible = "sandbox,dma";
  1269. #dma-cells = <1>;
  1270. dmas = <&dma 0>, <&dma 1>, <&dma 2>;
  1271. dma-names = "m2m", "tx0", "rx0";
  1272. };
  1273. /*
  1274. * keep mdio-mux ahead of mdio so that the mux is removed first at the
  1275. * end of the test. If parent mdio is removed first, clean-up of the
  1276. * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
  1277. * active at the end of the test. That it turn doesn't allow the mdio
  1278. * class to be destroyed, triggering an error.
  1279. */
  1280. mdio-mux-test {
  1281. compatible = "sandbox,mdio-mux";
  1282. #address-cells = <1>;
  1283. #size-cells = <0>;
  1284. mdio-parent-bus = <&mdio>;
  1285. mdio-ch-test@0 {
  1286. reg = <0>;
  1287. };
  1288. mdio-ch-test@1 {
  1289. reg = <1>;
  1290. };
  1291. };
  1292. mdio: mdio-test {
  1293. compatible = "sandbox,mdio";
  1294. };
  1295. pm-bus-test {
  1296. compatible = "simple-pm-bus";
  1297. clocks = <&clk_sandbox 4>;
  1298. power-domains = <&pwrdom 1>;
  1299. };
  1300. resetc2: syscon-reset {
  1301. compatible = "syscon-reset";
  1302. #reset-cells = <1>;
  1303. regmap = <&syscon0>;
  1304. offset = <1>;
  1305. mask = <0x27FFFFFF>;
  1306. assert-high = <0>;
  1307. };
  1308. syscon-reset-test {
  1309. compatible = "sandbox,misc_sandbox";
  1310. resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
  1311. reset-names = "valid", "no_mask", "out_of_range";
  1312. };
  1313. sysinfo {
  1314. compatible = "sandbox,sysinfo-sandbox";
  1315. };
  1316. sysinfo-gpio {
  1317. compatible = "gpio-sysinfo";
  1318. gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>;
  1319. revisions = <19>, <5>;
  1320. names = "rev_a", "foo";
  1321. };
  1322. some_regmapped-bus {
  1323. #address-cells = <0x1>;
  1324. #size-cells = <0x1>;
  1325. ranges = <0x0 0x0 0x10>;
  1326. compatible = "simple-bus";
  1327. regmap-test_0 {
  1328. reg = <0 0x10>;
  1329. compatible = "sandbox,regmap_test";
  1330. };
  1331. };
  1332. };
  1333. #include "sandbox_pmic.dtsi"
  1334. #include "cros-ec-keyboard.dtsi"