config.h 1.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2009-2011 Freescale Semiconductor, Inc.
  4. */
  5. #ifndef _ASM_CONFIG_H_
  6. #define _ASM_CONFIG_H_
  7. #ifdef CONFIG_MPC85xx
  8. #include <asm/config_mpc85xx.h>
  9. #endif
  10. #ifndef HWCONFIG_BUFFER_SIZE
  11. #define HWCONFIG_BUFFER_SIZE 256
  12. #endif
  13. #define CONFIG_SYS_BOOT_RAMDISK_HIGH
  14. #ifndef CONFIG_MAX_MEM_MAPPED
  15. #if defined(CONFIG_E500) || \
  16. defined(CONFIG_MPC86xx) || \
  17. defined(CONFIG_E300)
  18. #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
  19. #else
  20. #define CONFIG_MAX_MEM_MAPPED (256 << 20)
  21. #endif
  22. #endif
  23. /* Check if boards need to enable FSL DMA engine for SDRAM init */
  24. #if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
  25. #if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
  26. ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
  27. !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
  28. #define CONFIG_FSL_DMA
  29. #endif
  30. #endif
  31. /*
  32. * Provide a default boot page translation virtual address that lines up with
  33. * Freescale's default e500 reset page.
  34. */
  35. #if (defined(CONFIG_E500) && defined(CONFIG_MP))
  36. #ifndef CONFIG_BPTR_VIRT_ADDR
  37. #define CONFIG_BPTR_VIRT_ADDR 0xfffff000
  38. #endif
  39. #endif
  40. /* Since so many PPC SOCs have a semi-common LBC, define this here */
  41. #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \
  42. defined(CONFIG_MPC83xx)
  43. #if !defined(CONFIG_FSL_IFC)
  44. #define CONFIG_FSL_LBC
  45. #endif
  46. #endif
  47. /* The TSEC driver uses the PHYLIB infrastructure */
  48. #if defined(CONFIG_TSEC_ENET) && defined(CONFIG_PHYLIB)
  49. #include <config_phylib_all_drivers.h>
  50. #endif /* TSEC_ENET */
  51. /* The FMAN driver uses the PHYLIB infrastructure */
  52. /* All PPC boards must swap IDE bytes */
  53. #define CONFIG_IDE_SWAP_IO
  54. #if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_CLK_MPC83XX)
  55. /*
  56. * TODO: Convert this to a clock driver exists that can give us the UART
  57. * clock here.
  58. */
  59. #define CONFIG_SYS_NS16550_CLK get_serial_clock()
  60. #endif
  61. #endif /* _ASM_CONFIG_H_ */