fdtdec.c 41 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <net.h>
  14. #include <dm/of_extra.h>
  15. #include <env.h>
  16. #include <errno.h>
  17. #include <fdtdec.h>
  18. #include <fdt_support.h>
  19. #include <gzip.h>
  20. #include <mapmem.h>
  21. #include <linux/libfdt.h>
  22. #include <serial.h>
  23. #include <asm/sections.h>
  24. #include <linux/ctype.h>
  25. #include <linux/lzo.h>
  26. DECLARE_GLOBAL_DATA_PTR;
  27. /*
  28. * Here are the type we know about. One day we might allow drivers to
  29. * register. For now we just put them here. The COMPAT macro allows us to
  30. * turn this into a sparse list later, and keeps the ID with the name.
  31. *
  32. * NOTE: This list is basically a TODO list for things that need to be
  33. * converted to driver model. So don't add new things here unless there is a
  34. * good reason why driver-model conversion is infeasible. Examples include
  35. * things which are used before driver model is available.
  36. */
  37. #define COMPAT(id, name) name
  38. static const char * const compat_names[COMPAT_COUNT] = {
  39. COMPAT(UNKNOWN, "<none>"),
  40. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  41. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  42. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  43. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  44. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  45. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  46. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  47. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  48. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  49. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  50. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  51. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  52. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  53. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  54. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  55. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  56. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  57. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  58. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  59. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  60. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  61. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  62. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  63. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  64. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  65. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  72. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  73. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  74. };
  75. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  76. {
  77. /* We allow reading of the 'unknown' ID for testing purposes */
  78. assert(id >= 0 && id < COMPAT_COUNT);
  79. return compat_names[id];
  80. }
  81. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  82. const char *prop_name, int index, int na,
  83. int ns, fdt_size_t *sizep,
  84. bool translate)
  85. {
  86. const fdt32_t *prop, *prop_end;
  87. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  88. int len;
  89. fdt_addr_t addr;
  90. debug("%s: %s: ", __func__, prop_name);
  91. prop = fdt_getprop(blob, node, prop_name, &len);
  92. if (!prop) {
  93. debug("(not found)\n");
  94. return FDT_ADDR_T_NONE;
  95. }
  96. prop_end = prop + (len / sizeof(*prop));
  97. prop_addr = prop + (index * (na + ns));
  98. prop_size = prop_addr + na;
  99. prop_after_size = prop_size + ns;
  100. if (prop_after_size > prop_end) {
  101. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  102. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  103. return FDT_ADDR_T_NONE;
  104. }
  105. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  106. if (translate)
  107. addr = fdt_translate_address(blob, node, prop_addr);
  108. else
  109. #endif
  110. addr = fdtdec_get_number(prop_addr, na);
  111. if (sizep) {
  112. *sizep = fdtdec_get_number(prop_size, ns);
  113. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  114. (unsigned long long)*sizep);
  115. } else {
  116. debug("addr=%08llx\n", (unsigned long long)addr);
  117. }
  118. return addr;
  119. }
  120. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  121. int node, const char *prop_name,
  122. int index, fdt_size_t *sizep,
  123. bool translate)
  124. {
  125. int na, ns;
  126. debug("%s: ", __func__);
  127. na = fdt_address_cells(blob, parent);
  128. if (na < 1) {
  129. debug("(bad #address-cells)\n");
  130. return FDT_ADDR_T_NONE;
  131. }
  132. ns = fdt_size_cells(blob, parent);
  133. if (ns < 0) {
  134. debug("(bad #size-cells)\n");
  135. return FDT_ADDR_T_NONE;
  136. }
  137. debug("na=%d, ns=%d, ", na, ns);
  138. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  139. ns, sizep, translate);
  140. }
  141. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  142. const char *prop_name, int index,
  143. fdt_size_t *sizep,
  144. bool translate)
  145. {
  146. int parent;
  147. debug("%s: ", __func__);
  148. parent = fdt_parent_offset(blob, node);
  149. if (parent < 0) {
  150. debug("(no parent found)\n");
  151. return FDT_ADDR_T_NONE;
  152. }
  153. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  154. index, sizep, translate);
  155. }
  156. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  157. const char *prop_name, fdt_size_t *sizep)
  158. {
  159. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  160. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  161. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  162. ns, sizep, false);
  163. }
  164. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  165. {
  166. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  167. }
  168. #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
  169. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  170. {
  171. const char *list, *end;
  172. int len;
  173. list = fdt_getprop(blob, node, "compatible", &len);
  174. if (!list)
  175. return -ENOENT;
  176. end = list + len;
  177. while (list < end) {
  178. len = strlen(list);
  179. if (len >= strlen("pciVVVV,DDDD")) {
  180. char *s = strstr(list, "pci");
  181. /*
  182. * check if the string is something like pciVVVV,DDDD.RR
  183. * or just pciVVVV,DDDD
  184. */
  185. if (s && s[7] == ',' &&
  186. (s[12] == '.' || s[12] == 0)) {
  187. s += 3;
  188. *vendor = simple_strtol(s, NULL, 16);
  189. s += 5;
  190. *device = simple_strtol(s, NULL, 16);
  191. return 0;
  192. }
  193. }
  194. list += (len + 1);
  195. }
  196. return -ENOENT;
  197. }
  198. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  199. u32 *bar)
  200. {
  201. int barnum;
  202. /* extract the bar number from fdt_pci_addr */
  203. barnum = addr->phys_hi & 0xff;
  204. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  205. return -EINVAL;
  206. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  207. *bar = dm_pci_read_bar32(dev, barnum);
  208. return 0;
  209. }
  210. #endif
  211. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  212. uint64_t default_val)
  213. {
  214. const unaligned_fdt64_t *cell64;
  215. int length;
  216. cell64 = fdt_getprop(blob, node, prop_name, &length);
  217. if (!cell64 || length < sizeof(*cell64))
  218. return default_val;
  219. return fdt64_to_cpu(*cell64);
  220. }
  221. int fdtdec_get_is_enabled(const void *blob, int node)
  222. {
  223. const char *cell;
  224. /*
  225. * It should say "okay", so only allow that. Some fdts use "ok" but
  226. * this is a bug. Please fix your device tree source file. See here
  227. * for discussion:
  228. *
  229. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  230. */
  231. cell = fdt_getprop(blob, node, "status", NULL);
  232. if (cell)
  233. return strcmp(cell, "okay") == 0;
  234. return 1;
  235. }
  236. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  237. {
  238. enum fdt_compat_id id;
  239. /* Search our drivers */
  240. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  241. if (fdt_node_check_compatible(blob, node,
  242. compat_names[id]) == 0)
  243. return id;
  244. return COMPAT_UNKNOWN;
  245. }
  246. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  247. {
  248. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  249. }
  250. int fdtdec_next_compatible_subnode(const void *blob, int node,
  251. enum fdt_compat_id id, int *depthp)
  252. {
  253. do {
  254. node = fdt_next_node(blob, node, depthp);
  255. } while (*depthp > 1);
  256. /* If this is a direct subnode, and compatible, return it */
  257. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  258. blob, node, compat_names[id]))
  259. return node;
  260. return -FDT_ERR_NOTFOUND;
  261. }
  262. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  263. int *upto)
  264. {
  265. #define MAX_STR_LEN 20
  266. char str[MAX_STR_LEN + 20];
  267. int node, err;
  268. /* snprintf() is not available */
  269. assert(strlen(name) < MAX_STR_LEN);
  270. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  271. node = fdt_path_offset(blob, str);
  272. if (node < 0)
  273. return node;
  274. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  275. if (err < 0)
  276. return err;
  277. if (err)
  278. return -FDT_ERR_NOTFOUND;
  279. (*upto)++;
  280. return node;
  281. }
  282. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  283. enum fdt_compat_id id, int *node_list,
  284. int maxcount)
  285. {
  286. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  287. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  288. }
  289. /* TODO: Can we tighten this code up a little? */
  290. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  291. enum fdt_compat_id id, int *node_list,
  292. int maxcount)
  293. {
  294. int name_len = strlen(name);
  295. int nodes[maxcount];
  296. int num_found = 0;
  297. int offset, node;
  298. int alias_node;
  299. int count;
  300. int i, j;
  301. /* find the alias node if present */
  302. alias_node = fdt_path_offset(blob, "/aliases");
  303. /*
  304. * start with nothing, and we can assume that the root node can't
  305. * match
  306. */
  307. memset(nodes, '\0', sizeof(nodes));
  308. /* First find all the compatible nodes */
  309. for (node = count = 0; node >= 0 && count < maxcount;) {
  310. node = fdtdec_next_compatible(blob, node, id);
  311. if (node >= 0)
  312. nodes[count++] = node;
  313. }
  314. if (node >= 0)
  315. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  316. __func__, name);
  317. /* Now find all the aliases */
  318. for (offset = fdt_first_property_offset(blob, alias_node);
  319. offset > 0;
  320. offset = fdt_next_property_offset(blob, offset)) {
  321. const struct fdt_property *prop;
  322. const char *path;
  323. int number;
  324. int found;
  325. node = 0;
  326. prop = fdt_get_property_by_offset(blob, offset, NULL);
  327. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  328. if (prop->len && 0 == strncmp(path, name, name_len))
  329. node = fdt_path_offset(blob, prop->data);
  330. if (node <= 0)
  331. continue;
  332. /* Get the alias number */
  333. number = simple_strtoul(path + name_len, NULL, 10);
  334. if (number < 0 || number >= maxcount) {
  335. debug("%s: warning: alias '%s' is out of range\n",
  336. __func__, path);
  337. continue;
  338. }
  339. /* Make sure the node we found is actually in our list! */
  340. found = -1;
  341. for (j = 0; j < count; j++)
  342. if (nodes[j] == node) {
  343. found = j;
  344. break;
  345. }
  346. if (found == -1) {
  347. debug("%s: warning: alias '%s' points to a node "
  348. "'%s' that is missing or is not compatible "
  349. " with '%s'\n", __func__, path,
  350. fdt_get_name(blob, node, NULL),
  351. compat_names[id]);
  352. continue;
  353. }
  354. /*
  355. * Add this node to our list in the right place, and mark
  356. * it as done.
  357. */
  358. if (fdtdec_get_is_enabled(blob, node)) {
  359. if (node_list[number]) {
  360. debug("%s: warning: alias '%s' requires that "
  361. "a node be placed in the list in a "
  362. "position which is already filled by "
  363. "node '%s'\n", __func__, path,
  364. fdt_get_name(blob, node, NULL));
  365. continue;
  366. }
  367. node_list[number] = node;
  368. if (number >= num_found)
  369. num_found = number + 1;
  370. }
  371. nodes[found] = 0;
  372. }
  373. /* Add any nodes not mentioned by an alias */
  374. for (i = j = 0; i < maxcount; i++) {
  375. if (!node_list[i]) {
  376. for (; j < maxcount; j++)
  377. if (nodes[j] &&
  378. fdtdec_get_is_enabled(blob, nodes[j]))
  379. break;
  380. /* Have we run out of nodes to add? */
  381. if (j == maxcount)
  382. break;
  383. assert(!node_list[i]);
  384. node_list[i] = nodes[j++];
  385. if (i >= num_found)
  386. num_found = i + 1;
  387. }
  388. }
  389. return num_found;
  390. }
  391. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  392. int *seqp)
  393. {
  394. int base_len = strlen(base);
  395. const char *find_name;
  396. int find_namelen;
  397. int prop_offset;
  398. int aliases;
  399. find_name = fdt_get_name(blob, offset, &find_namelen);
  400. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  401. aliases = fdt_path_offset(blob, "/aliases");
  402. for (prop_offset = fdt_first_property_offset(blob, aliases);
  403. prop_offset > 0;
  404. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  405. const char *prop;
  406. const char *name;
  407. const char *slash;
  408. int len, val;
  409. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  410. debug(" - %s, %s\n", name, prop);
  411. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  412. strncmp(name, base, base_len))
  413. continue;
  414. slash = strrchr(prop, '/');
  415. if (strcmp(slash + 1, find_name))
  416. continue;
  417. val = trailing_strtol(name);
  418. if (val != -1) {
  419. *seqp = val;
  420. debug("Found seq %d\n", *seqp);
  421. return 0;
  422. }
  423. }
  424. debug("Not found\n");
  425. return -ENOENT;
  426. }
  427. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  428. {
  429. int base_len = strlen(base);
  430. int prop_offset;
  431. int aliases;
  432. int max = -1;
  433. debug("Looking for highest alias id for '%s'\n", base);
  434. aliases = fdt_path_offset(blob, "/aliases");
  435. for (prop_offset = fdt_first_property_offset(blob, aliases);
  436. prop_offset > 0;
  437. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  438. const char *prop;
  439. const char *name;
  440. int len, val;
  441. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  442. debug(" - %s, %s\n", name, prop);
  443. if (*prop != '/' || prop[len - 1] ||
  444. strncmp(name, base, base_len))
  445. continue;
  446. val = trailing_strtol(name);
  447. if (val > max) {
  448. debug("Found seq %d\n", val);
  449. max = val;
  450. }
  451. }
  452. return max;
  453. }
  454. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  455. {
  456. int chosen_node;
  457. if (!blob)
  458. return NULL;
  459. chosen_node = fdt_path_offset(blob, "/chosen");
  460. return fdt_getprop(blob, chosen_node, name, NULL);
  461. }
  462. int fdtdec_get_chosen_node(const void *blob, const char *name)
  463. {
  464. const char *prop;
  465. prop = fdtdec_get_chosen_prop(blob, name);
  466. if (!prop)
  467. return -FDT_ERR_NOTFOUND;
  468. return fdt_path_offset(blob, prop);
  469. }
  470. int fdtdec_check_fdt(void)
  471. {
  472. /*
  473. * We must have an FDT, but we cannot panic() yet since the console
  474. * is not ready. So for now, just assert(). Boards which need an early
  475. * FDT (prior to console ready) will need to make their own
  476. * arrangements and do their own checks.
  477. */
  478. assert(!fdtdec_prepare_fdt());
  479. return 0;
  480. }
  481. /*
  482. * This function is a little odd in that it accesses global data. At some
  483. * point if the architecture board.c files merge this will make more sense.
  484. * Even now, it is common code.
  485. */
  486. int fdtdec_prepare_fdt(void)
  487. {
  488. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  489. fdt_check_header(gd->fdt_blob)) {
  490. #ifdef CONFIG_SPL_BUILD
  491. puts("Missing DTB\n");
  492. #else
  493. puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
  494. # ifdef DEBUG
  495. if (gd->fdt_blob) {
  496. printf("fdt_blob=%p\n", gd->fdt_blob);
  497. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  498. 32, 0);
  499. }
  500. # endif
  501. #endif
  502. return -1;
  503. }
  504. return 0;
  505. }
  506. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  507. {
  508. const u32 *phandle;
  509. int lookup;
  510. debug("%s: %s\n", __func__, prop_name);
  511. phandle = fdt_getprop(blob, node, prop_name, NULL);
  512. if (!phandle)
  513. return -FDT_ERR_NOTFOUND;
  514. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  515. return lookup;
  516. }
  517. /**
  518. * Look up a property in a node and check that it has a minimum length.
  519. *
  520. * @param blob FDT blob
  521. * @param node node to examine
  522. * @param prop_name name of property to find
  523. * @param min_len minimum property length in bytes
  524. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  525. found, or -FDT_ERR_BADLAYOUT if not enough data
  526. * @return pointer to cell, which is only valid if err == 0
  527. */
  528. static const void *get_prop_check_min_len(const void *blob, int node,
  529. const char *prop_name, int min_len,
  530. int *err)
  531. {
  532. const void *cell;
  533. int len;
  534. debug("%s: %s\n", __func__, prop_name);
  535. cell = fdt_getprop(blob, node, prop_name, &len);
  536. if (!cell)
  537. *err = -FDT_ERR_NOTFOUND;
  538. else if (len < min_len)
  539. *err = -FDT_ERR_BADLAYOUT;
  540. else
  541. *err = 0;
  542. return cell;
  543. }
  544. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  545. u32 *array, int count)
  546. {
  547. const u32 *cell;
  548. int err = 0;
  549. debug("%s: %s\n", __func__, prop_name);
  550. cell = get_prop_check_min_len(blob, node, prop_name,
  551. sizeof(u32) * count, &err);
  552. if (!err) {
  553. int i;
  554. for (i = 0; i < count; i++)
  555. array[i] = fdt32_to_cpu(cell[i]);
  556. }
  557. return err;
  558. }
  559. int fdtdec_get_int_array_count(const void *blob, int node,
  560. const char *prop_name, u32 *array, int count)
  561. {
  562. const u32 *cell;
  563. int len, elems;
  564. int i;
  565. debug("%s: %s\n", __func__, prop_name);
  566. cell = fdt_getprop(blob, node, prop_name, &len);
  567. if (!cell)
  568. return -FDT_ERR_NOTFOUND;
  569. elems = len / sizeof(u32);
  570. if (count > elems)
  571. count = elems;
  572. for (i = 0; i < count; i++)
  573. array[i] = fdt32_to_cpu(cell[i]);
  574. return count;
  575. }
  576. const u32 *fdtdec_locate_array(const void *blob, int node,
  577. const char *prop_name, int count)
  578. {
  579. const u32 *cell;
  580. int err;
  581. cell = get_prop_check_min_len(blob, node, prop_name,
  582. sizeof(u32) * count, &err);
  583. return err ? NULL : cell;
  584. }
  585. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  586. {
  587. const s32 *cell;
  588. int len;
  589. debug("%s: %s\n", __func__, prop_name);
  590. cell = fdt_getprop(blob, node, prop_name, &len);
  591. return cell != NULL;
  592. }
  593. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  594. const char *list_name,
  595. const char *cells_name,
  596. int cell_count, int index,
  597. struct fdtdec_phandle_args *out_args)
  598. {
  599. const __be32 *list, *list_end;
  600. int rc = 0, size, cur_index = 0;
  601. uint32_t count = 0;
  602. int node = -1;
  603. int phandle;
  604. /* Retrieve the phandle list property */
  605. list = fdt_getprop(blob, src_node, list_name, &size);
  606. if (!list)
  607. return -ENOENT;
  608. list_end = list + size / sizeof(*list);
  609. /* Loop over the phandles until all the requested entry is found */
  610. while (list < list_end) {
  611. rc = -EINVAL;
  612. count = 0;
  613. /*
  614. * If phandle is 0, then it is an empty entry with no
  615. * arguments. Skip forward to the next entry.
  616. */
  617. phandle = be32_to_cpup(list++);
  618. if (phandle) {
  619. /*
  620. * Find the provider node and parse the #*-cells
  621. * property to determine the argument length.
  622. *
  623. * This is not needed if the cell count is hard-coded
  624. * (i.e. cells_name not set, but cell_count is set),
  625. * except when we're going to return the found node
  626. * below.
  627. */
  628. if (cells_name || cur_index == index) {
  629. node = fdt_node_offset_by_phandle(blob,
  630. phandle);
  631. if (!node) {
  632. debug("%s: could not find phandle\n",
  633. fdt_get_name(blob, src_node,
  634. NULL));
  635. goto err;
  636. }
  637. }
  638. if (cells_name) {
  639. count = fdtdec_get_int(blob, node, cells_name,
  640. -1);
  641. if (count == -1) {
  642. debug("%s: could not get %s for %s\n",
  643. fdt_get_name(blob, src_node,
  644. NULL),
  645. cells_name,
  646. fdt_get_name(blob, node,
  647. NULL));
  648. goto err;
  649. }
  650. } else {
  651. count = cell_count;
  652. }
  653. /*
  654. * Make sure that the arguments actually fit in the
  655. * remaining property data length
  656. */
  657. if (list + count > list_end) {
  658. debug("%s: arguments longer than property\n",
  659. fdt_get_name(blob, src_node, NULL));
  660. goto err;
  661. }
  662. }
  663. /*
  664. * All of the error cases above bail out of the loop, so at
  665. * this point, the parsing is successful. If the requested
  666. * index matches, then fill the out_args structure and return,
  667. * or return -ENOENT for an empty entry.
  668. */
  669. rc = -ENOENT;
  670. if (cur_index == index) {
  671. if (!phandle)
  672. goto err;
  673. if (out_args) {
  674. int i;
  675. if (count > MAX_PHANDLE_ARGS) {
  676. debug("%s: too many arguments %d\n",
  677. fdt_get_name(blob, src_node,
  678. NULL), count);
  679. count = MAX_PHANDLE_ARGS;
  680. }
  681. out_args->node = node;
  682. out_args->args_count = count;
  683. for (i = 0; i < count; i++) {
  684. out_args->args[i] =
  685. be32_to_cpup(list++);
  686. }
  687. }
  688. /* Found it! return success */
  689. return 0;
  690. }
  691. node = -1;
  692. list += count;
  693. cur_index++;
  694. }
  695. /*
  696. * Result will be one of:
  697. * -ENOENT : index is for empty phandle
  698. * -EINVAL : parsing error on data
  699. * [1..n] : Number of phandle (count mode; when index = -1)
  700. */
  701. rc = index < 0 ? cur_index : -ENOENT;
  702. err:
  703. return rc;
  704. }
  705. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  706. u8 *array, int count)
  707. {
  708. const u8 *cell;
  709. int err;
  710. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  711. if (!err)
  712. memcpy(array, cell, count);
  713. return err;
  714. }
  715. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  716. const char *prop_name, int count)
  717. {
  718. const u8 *cell;
  719. int err;
  720. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  721. if (err)
  722. return NULL;
  723. return cell;
  724. }
  725. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  726. int default_val)
  727. {
  728. int config_node;
  729. debug("%s: %s\n", __func__, prop_name);
  730. config_node = fdt_path_offset(blob, "/config");
  731. if (config_node < 0)
  732. return default_val;
  733. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  734. }
  735. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  736. {
  737. int config_node;
  738. const void *prop;
  739. debug("%s: %s\n", __func__, prop_name);
  740. config_node = fdt_path_offset(blob, "/config");
  741. if (config_node < 0)
  742. return 0;
  743. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  744. return prop != NULL;
  745. }
  746. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  747. {
  748. const char *nodep;
  749. int nodeoffset;
  750. int len;
  751. debug("%s: %s\n", __func__, prop_name);
  752. nodeoffset = fdt_path_offset(blob, "/config");
  753. if (nodeoffset < 0)
  754. return NULL;
  755. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  756. if (!nodep)
  757. return NULL;
  758. return (char *)nodep;
  759. }
  760. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  761. {
  762. u64 number = 0;
  763. while (cells--)
  764. number = (number << 32) | fdt32_to_cpu(*ptr++);
  765. return number;
  766. }
  767. int fdt_get_resource(const void *fdt, int node, const char *property,
  768. unsigned int index, struct fdt_resource *res)
  769. {
  770. const fdt32_t *ptr, *end;
  771. int na, ns, len, parent;
  772. unsigned int i = 0;
  773. parent = fdt_parent_offset(fdt, node);
  774. if (parent < 0)
  775. return parent;
  776. na = fdt_address_cells(fdt, parent);
  777. ns = fdt_size_cells(fdt, parent);
  778. ptr = fdt_getprop(fdt, node, property, &len);
  779. if (!ptr)
  780. return len;
  781. end = ptr + len / sizeof(*ptr);
  782. while (ptr + na + ns <= end) {
  783. if (i == index) {
  784. res->start = fdtdec_get_number(ptr, na);
  785. res->end = res->start;
  786. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  787. return 0;
  788. }
  789. ptr += na + ns;
  790. i++;
  791. }
  792. return -FDT_ERR_NOTFOUND;
  793. }
  794. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  795. const char *prop_names, const char *name,
  796. struct fdt_resource *res)
  797. {
  798. int index;
  799. index = fdt_stringlist_search(fdt, node, prop_names, name);
  800. if (index < 0)
  801. return index;
  802. return fdt_get_resource(fdt, node, property, index, res);
  803. }
  804. static int decode_timing_property(const void *blob, int node, const char *name,
  805. struct timing_entry *result)
  806. {
  807. int length, ret = 0;
  808. const u32 *prop;
  809. prop = fdt_getprop(blob, node, name, &length);
  810. if (!prop) {
  811. debug("%s: could not find property %s\n",
  812. fdt_get_name(blob, node, NULL), name);
  813. return length;
  814. }
  815. if (length == sizeof(u32)) {
  816. result->typ = fdtdec_get_int(blob, node, name, 0);
  817. result->min = result->typ;
  818. result->max = result->typ;
  819. } else {
  820. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  821. }
  822. return ret;
  823. }
  824. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  825. struct display_timing *dt)
  826. {
  827. int i, node, timings_node;
  828. u32 val = 0;
  829. int ret = 0;
  830. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  831. if (timings_node < 0)
  832. return timings_node;
  833. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  834. node > 0 && i != index;
  835. node = fdt_next_subnode(blob, node))
  836. i++;
  837. if (node < 0)
  838. return node;
  839. memset(dt, 0, sizeof(*dt));
  840. ret |= decode_timing_property(blob, node, "hback-porch",
  841. &dt->hback_porch);
  842. ret |= decode_timing_property(blob, node, "hfront-porch",
  843. &dt->hfront_porch);
  844. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  845. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  846. ret |= decode_timing_property(blob, node, "vback-porch",
  847. &dt->vback_porch);
  848. ret |= decode_timing_property(blob, node, "vfront-porch",
  849. &dt->vfront_porch);
  850. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  851. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  852. ret |= decode_timing_property(blob, node, "clock-frequency",
  853. &dt->pixelclock);
  854. dt->flags = 0;
  855. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  856. if (val != -1) {
  857. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  858. DISPLAY_FLAGS_VSYNC_LOW;
  859. }
  860. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  861. if (val != -1) {
  862. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  863. DISPLAY_FLAGS_HSYNC_LOW;
  864. }
  865. val = fdtdec_get_int(blob, node, "de-active", -1);
  866. if (val != -1) {
  867. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  868. DISPLAY_FLAGS_DE_LOW;
  869. }
  870. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  871. if (val != -1) {
  872. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  873. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  874. }
  875. if (fdtdec_get_bool(blob, node, "interlaced"))
  876. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  877. if (fdtdec_get_bool(blob, node, "doublescan"))
  878. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  879. if (fdtdec_get_bool(blob, node, "doubleclk"))
  880. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  881. return ret;
  882. }
  883. int fdtdec_setup_mem_size_base_fdt(const void *blob)
  884. {
  885. int ret, mem;
  886. struct fdt_resource res;
  887. mem = fdt_path_offset(blob, "/memory");
  888. if (mem < 0) {
  889. debug("%s: Missing /memory node\n", __func__);
  890. return -EINVAL;
  891. }
  892. ret = fdt_get_resource(blob, mem, "reg", 0, &res);
  893. if (ret != 0) {
  894. debug("%s: Unable to decode first memory bank\n", __func__);
  895. return -EINVAL;
  896. }
  897. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  898. gd->ram_base = (unsigned long)res.start;
  899. debug("%s: Initial DRAM size %llx\n", __func__,
  900. (unsigned long long)gd->ram_size);
  901. return 0;
  902. }
  903. int fdtdec_setup_mem_size_base(void)
  904. {
  905. return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
  906. }
  907. #if defined(CONFIG_NR_DRAM_BANKS)
  908. static int get_next_memory_node(const void *blob, int mem)
  909. {
  910. do {
  911. mem = fdt_node_offset_by_prop_value(blob, mem,
  912. "device_type", "memory", 7);
  913. } while (!fdtdec_get_is_enabled(blob, mem));
  914. return mem;
  915. }
  916. int fdtdec_setup_memory_banksize_fdt(const void *blob)
  917. {
  918. int bank, ret, mem, reg = 0;
  919. struct fdt_resource res;
  920. mem = get_next_memory_node(blob, -1);
  921. if (mem < 0) {
  922. debug("%s: Missing /memory node\n", __func__);
  923. return -EINVAL;
  924. }
  925. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  926. ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
  927. if (ret == -FDT_ERR_NOTFOUND) {
  928. reg = 0;
  929. mem = get_next_memory_node(blob, mem);
  930. if (mem == -FDT_ERR_NOTFOUND)
  931. break;
  932. ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
  933. if (ret == -FDT_ERR_NOTFOUND)
  934. break;
  935. }
  936. if (ret != 0) {
  937. return -EINVAL;
  938. }
  939. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  940. gd->bd->bi_dram[bank].size =
  941. (phys_size_t)(res.end - res.start + 1);
  942. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  943. __func__, bank,
  944. (unsigned long long)gd->bd->bi_dram[bank].start,
  945. (unsigned long long)gd->bd->bi_dram[bank].size);
  946. }
  947. return 0;
  948. }
  949. int fdtdec_setup_memory_banksize(void)
  950. {
  951. return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
  952. }
  953. #endif
  954. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  955. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  956. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  957. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  958. {
  959. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  960. bool gzip = 0, lzo = 0;
  961. ulong sz_in = sz_src;
  962. void *dst;
  963. int rc;
  964. if (CONFIG_IS_ENABLED(GZIP))
  965. if (gzip_parse_header(src, sz_in) >= 0)
  966. gzip = 1;
  967. if (CONFIG_IS_ENABLED(LZO))
  968. if (!gzip && lzop_is_valid_header(src))
  969. lzo = 1;
  970. if (!gzip && !lzo)
  971. return -EBADMSG;
  972. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  973. dst = malloc(sz_out);
  974. if (!dst) {
  975. puts("uncompress_blob: Unable to allocate memory\n");
  976. return -ENOMEM;
  977. }
  978. } else {
  979. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  980. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  981. # else
  982. return -ENOTSUPP;
  983. # endif
  984. }
  985. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  986. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  987. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  988. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  989. else
  990. hang();
  991. if (rc < 0) {
  992. /* not a valid compressed blob */
  993. puts("uncompress_blob: Unable to uncompress\n");
  994. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  995. free(dst);
  996. return -EBADMSG;
  997. }
  998. *dstp = dst;
  999. return 0;
  1000. }
  1001. # else
  1002. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1003. {
  1004. *dstp = (void *)src;
  1005. return 0;
  1006. }
  1007. # endif
  1008. #endif
  1009. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1010. /*
  1011. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1012. * provide and/or fixup the fdt.
  1013. */
  1014. __weak void *board_fdt_blob_setup(void)
  1015. {
  1016. void *fdt_blob = NULL;
  1017. #ifdef CONFIG_SPL_BUILD
  1018. /* FDT is at end of BSS unless it is in a different memory region */
  1019. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1020. fdt_blob = (ulong *)&_image_binary_end;
  1021. else
  1022. fdt_blob = (ulong *)&__bss_end;
  1023. #else
  1024. /* FDT is at end of image */
  1025. fdt_blob = (ulong *)&_end;
  1026. #endif
  1027. return fdt_blob;
  1028. }
  1029. #endif
  1030. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1031. {
  1032. const char *path;
  1033. int offset, err;
  1034. if (!is_valid_ethaddr(mac))
  1035. return -EINVAL;
  1036. path = fdt_get_alias(fdt, "ethernet");
  1037. if (!path)
  1038. return 0;
  1039. debug("ethernet alias found: %s\n", path);
  1040. offset = fdt_path_offset(fdt, path);
  1041. if (offset < 0) {
  1042. debug("ethernet alias points to absent node %s\n", path);
  1043. return -ENOENT;
  1044. }
  1045. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1046. if (err < 0)
  1047. return err;
  1048. debug("MAC address: %pM\n", mac);
  1049. return 0;
  1050. }
  1051. static int fdtdec_init_reserved_memory(void *blob)
  1052. {
  1053. int na, ns, node, err;
  1054. fdt32_t value;
  1055. /* inherit #address-cells and #size-cells from the root node */
  1056. na = fdt_address_cells(blob, 0);
  1057. ns = fdt_size_cells(blob, 0);
  1058. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1059. if (node < 0)
  1060. return node;
  1061. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1062. if (err < 0)
  1063. return err;
  1064. value = cpu_to_fdt32(ns);
  1065. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1066. if (err < 0)
  1067. return err;
  1068. value = cpu_to_fdt32(na);
  1069. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1070. if (err < 0)
  1071. return err;
  1072. return node;
  1073. }
  1074. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1075. const struct fdt_memory *carveout,
  1076. uint32_t *phandlep)
  1077. {
  1078. fdt32_t cells[4] = {}, *ptr = cells;
  1079. uint32_t upper, lower, phandle;
  1080. int parent, node, na, ns, err;
  1081. fdt_size_t size;
  1082. char name[64];
  1083. /* create an empty /reserved-memory node if one doesn't exist */
  1084. parent = fdt_path_offset(blob, "/reserved-memory");
  1085. if (parent < 0) {
  1086. parent = fdtdec_init_reserved_memory(blob);
  1087. if (parent < 0)
  1088. return parent;
  1089. }
  1090. /* only 1 or 2 #address-cells and #size-cells are supported */
  1091. na = fdt_address_cells(blob, parent);
  1092. if (na < 1 || na > 2)
  1093. return -FDT_ERR_BADNCELLS;
  1094. ns = fdt_size_cells(blob, parent);
  1095. if (ns < 1 || ns > 2)
  1096. return -FDT_ERR_BADNCELLS;
  1097. /* find a matching node and return the phandle to that */
  1098. fdt_for_each_subnode(node, blob, parent) {
  1099. const char *name = fdt_get_name(blob, node, NULL);
  1100. fdt_addr_t addr;
  1101. fdt_size_t size;
  1102. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1103. &size, false);
  1104. if (addr == FDT_ADDR_T_NONE) {
  1105. debug("failed to read address/size for %s\n", name);
  1106. continue;
  1107. }
  1108. if (addr == carveout->start && (addr + size - 1) ==
  1109. carveout->end) {
  1110. if (phandlep)
  1111. *phandlep = fdt_get_phandle(blob, node);
  1112. return 0;
  1113. }
  1114. }
  1115. /*
  1116. * Unpack the start address and generate the name of the new node
  1117. * base on the basename and the unit-address.
  1118. */
  1119. upper = upper_32_bits(carveout->start);
  1120. lower = lower_32_bits(carveout->start);
  1121. if (na > 1 && upper > 0)
  1122. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1123. lower);
  1124. else {
  1125. if (upper > 0) {
  1126. debug("address %08x:%08x exceeds addressable space\n",
  1127. upper, lower);
  1128. return -FDT_ERR_BADVALUE;
  1129. }
  1130. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1131. }
  1132. node = fdt_add_subnode(blob, parent, name);
  1133. if (node < 0)
  1134. return node;
  1135. if (phandlep) {
  1136. err = fdt_generate_phandle(blob, &phandle);
  1137. if (err < 0)
  1138. return err;
  1139. err = fdtdec_set_phandle(blob, node, phandle);
  1140. if (err < 0)
  1141. return err;
  1142. }
  1143. /* store one or two address cells */
  1144. if (na > 1)
  1145. *ptr++ = cpu_to_fdt32(upper);
  1146. *ptr++ = cpu_to_fdt32(lower);
  1147. /* store one or two size cells */
  1148. size = carveout->end - carveout->start + 1;
  1149. upper = upper_32_bits(size);
  1150. lower = lower_32_bits(size);
  1151. if (ns > 1)
  1152. *ptr++ = cpu_to_fdt32(upper);
  1153. *ptr++ = cpu_to_fdt32(lower);
  1154. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1155. if (err < 0)
  1156. return err;
  1157. /* return the phandle for the new node for the caller to use */
  1158. if (phandlep)
  1159. *phandlep = phandle;
  1160. return 0;
  1161. }
  1162. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1163. unsigned int index, struct fdt_memory *carveout)
  1164. {
  1165. const fdt32_t *prop;
  1166. uint32_t phandle;
  1167. int offset, len;
  1168. fdt_size_t size;
  1169. offset = fdt_path_offset(blob, node);
  1170. if (offset < 0)
  1171. return offset;
  1172. prop = fdt_getprop(blob, offset, name, &len);
  1173. if (!prop) {
  1174. debug("failed to get %s for %s\n", name, node);
  1175. return -FDT_ERR_NOTFOUND;
  1176. }
  1177. if ((len % sizeof(phandle)) != 0) {
  1178. debug("invalid phandle property\n");
  1179. return -FDT_ERR_BADPHANDLE;
  1180. }
  1181. if (len < (sizeof(phandle) * (index + 1))) {
  1182. debug("invalid phandle index\n");
  1183. return -FDT_ERR_BADPHANDLE;
  1184. }
  1185. phandle = fdt32_to_cpu(prop[index]);
  1186. offset = fdt_node_offset_by_phandle(blob, phandle);
  1187. if (offset < 0) {
  1188. debug("failed to find node for phandle %u\n", phandle);
  1189. return offset;
  1190. }
  1191. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1192. "reg", 0, &size,
  1193. true);
  1194. if (carveout->start == FDT_ADDR_T_NONE) {
  1195. debug("failed to read address/size from \"reg\" property\n");
  1196. return -FDT_ERR_NOTFOUND;
  1197. }
  1198. carveout->end = carveout->start + size - 1;
  1199. return 0;
  1200. }
  1201. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1202. unsigned int index, const char *name,
  1203. const struct fdt_memory *carveout)
  1204. {
  1205. uint32_t phandle;
  1206. int err, offset, len;
  1207. fdt32_t value;
  1208. void *prop;
  1209. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
  1210. if (err < 0) {
  1211. debug("failed to add reserved memory: %d\n", err);
  1212. return err;
  1213. }
  1214. offset = fdt_path_offset(blob, node);
  1215. if (offset < 0) {
  1216. debug("failed to find offset for node %s: %d\n", node, offset);
  1217. return offset;
  1218. }
  1219. value = cpu_to_fdt32(phandle);
  1220. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1221. if (len == -FDT_ERR_NOTFOUND)
  1222. len = 0;
  1223. else
  1224. return len;
  1225. }
  1226. if ((index + 1) * sizeof(value) > len) {
  1227. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1228. (index + 1) * sizeof(value),
  1229. &prop);
  1230. if (err < 0) {
  1231. debug("failed to resize reserved memory property: %s\n",
  1232. fdt_strerror(err));
  1233. return err;
  1234. }
  1235. }
  1236. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1237. strlen(prop_name),
  1238. index * sizeof(value),
  1239. &value, sizeof(value));
  1240. if (err < 0) {
  1241. debug("failed to update %s property for node %s: %s\n",
  1242. prop_name, node, fdt_strerror(err));
  1243. return err;
  1244. }
  1245. return 0;
  1246. }
  1247. __weak int fdtdec_board_setup(const void *fdt_blob)
  1248. {
  1249. return 0;
  1250. }
  1251. int fdtdec_setup(void)
  1252. {
  1253. int ret;
  1254. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1255. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1256. void *fdt_blob;
  1257. # endif
  1258. # ifdef CONFIG_OF_EMBED
  1259. /* Get a pointer to the FDT */
  1260. # ifdef CONFIG_SPL_BUILD
  1261. gd->fdt_blob = __dtb_dt_spl_begin;
  1262. # else
  1263. gd->fdt_blob = __dtb_dt_begin;
  1264. # endif
  1265. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1266. /* Allow the board to override the fdt address. */
  1267. gd->fdt_blob = board_fdt_blob_setup();
  1268. # elif defined(CONFIG_OF_HOSTFILE)
  1269. if (sandbox_read_fdt_from_file()) {
  1270. puts("Failed to read control FDT\n");
  1271. return -1;
  1272. }
  1273. # elif defined(CONFIG_OF_PRIOR_STAGE)
  1274. gd->fdt_blob = (void *)prior_stage_fdt_address;
  1275. # endif
  1276. # ifndef CONFIG_SPL_BUILD
  1277. /* Allow the early environment to override the fdt address */
  1278. gd->fdt_blob = map_sysmem
  1279. (env_get_ulong("fdtcontroladdr", 16,
  1280. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1281. # endif
  1282. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1283. /*
  1284. * Try and uncompress the blob.
  1285. * Unfortunately there is no way to know how big the input blob really
  1286. * is. So let us set the maximum input size arbitrarily high. 16MB
  1287. * ought to be more than enough for packed DTBs.
  1288. */
  1289. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1290. gd->fdt_blob = fdt_blob;
  1291. /*
  1292. * Check if blob is a FIT images containings DTBs.
  1293. * If so, pick the most relevant
  1294. */
  1295. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1296. if (fdt_blob) {
  1297. gd->multi_dtb_fit = gd->fdt_blob;
  1298. gd->fdt_blob = fdt_blob;
  1299. }
  1300. # endif
  1301. #endif
  1302. ret = fdtdec_prepare_fdt();
  1303. if (!ret)
  1304. ret = fdtdec_board_setup(gd->fdt_blob);
  1305. return ret;
  1306. }
  1307. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1308. int fdtdec_resetup(int *rescan)
  1309. {
  1310. void *fdt_blob;
  1311. /*
  1312. * If the current DTB is part of a compressed FIT image,
  1313. * try to locate the best match from the uncompressed
  1314. * FIT image stillpresent there. Save the time and space
  1315. * required to uncompress it again.
  1316. */
  1317. if (gd->multi_dtb_fit) {
  1318. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1319. if (fdt_blob == gd->fdt_blob) {
  1320. /*
  1321. * The best match did not change. no need to tear down
  1322. * the DM and rescan the fdt.
  1323. */
  1324. *rescan = 0;
  1325. return 0;
  1326. }
  1327. *rescan = 1;
  1328. gd->fdt_blob = fdt_blob;
  1329. return fdtdec_prepare_fdt();
  1330. }
  1331. /*
  1332. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1333. * not a FIT image containings DTB, but a single DTB. There is no need
  1334. * to teard down DM and rescan the DT in this case.
  1335. */
  1336. *rescan = 0;
  1337. return 0;
  1338. }
  1339. #endif
  1340. #ifdef CONFIG_NR_DRAM_BANKS
  1341. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1342. phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
  1343. {
  1344. int addr_cells, size_cells;
  1345. const u32 *cell, *end;
  1346. u64 total_size, size, addr;
  1347. int node, child;
  1348. bool auto_size;
  1349. int bank;
  1350. int len;
  1351. debug("%s: board_id=%d\n", __func__, board_id);
  1352. if (!area)
  1353. area = "/memory";
  1354. node = fdt_path_offset(blob, area);
  1355. if (node < 0) {
  1356. debug("No %s node found\n", area);
  1357. return -ENOENT;
  1358. }
  1359. cell = fdt_getprop(blob, node, "reg", &len);
  1360. if (!cell) {
  1361. debug("No reg property found\n");
  1362. return -ENOENT;
  1363. }
  1364. addr_cells = fdt_address_cells(blob, node);
  1365. size_cells = fdt_size_cells(blob, node);
  1366. /* Check the board id and mask */
  1367. for (child = fdt_first_subnode(blob, node);
  1368. child >= 0;
  1369. child = fdt_next_subnode(blob, child)) {
  1370. int match_mask, match_value;
  1371. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1372. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1373. if (match_value >= 0 &&
  1374. ((board_id & match_mask) == match_value)) {
  1375. /* Found matching mask */
  1376. debug("Found matching mask %d\n", match_mask);
  1377. node = child;
  1378. cell = fdt_getprop(blob, node, "reg", &len);
  1379. if (!cell) {
  1380. debug("No memory-banks property found\n");
  1381. return -EINVAL;
  1382. }
  1383. break;
  1384. }
  1385. }
  1386. /* Note: if no matching subnode was found we use the parent node */
  1387. if (bd) {
  1388. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1389. CONFIG_NR_DRAM_BANKS);
  1390. }
  1391. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1392. total_size = 0;
  1393. end = cell + len / 4 - addr_cells - size_cells;
  1394. debug("cell at %p, end %p\n", cell, end);
  1395. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1396. if (cell > end)
  1397. break;
  1398. addr = 0;
  1399. if (addr_cells == 2)
  1400. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1401. addr += fdt32_to_cpu(*cell++);
  1402. if (bd)
  1403. bd->bi_dram[bank].start = addr;
  1404. if (basep && !bank)
  1405. *basep = (phys_addr_t)addr;
  1406. size = 0;
  1407. if (size_cells == 2)
  1408. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1409. size += fdt32_to_cpu(*cell++);
  1410. if (auto_size) {
  1411. u64 new_size;
  1412. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1413. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1414. if (new_size == size) {
  1415. debug("OK\n");
  1416. } else {
  1417. debug("sized to %llx\n", new_size);
  1418. size = new_size;
  1419. }
  1420. }
  1421. if (bd)
  1422. bd->bi_dram[bank].size = size;
  1423. total_size += size;
  1424. }
  1425. debug("Memory size %llu\n", total_size);
  1426. if (sizep)
  1427. *sizep = (phys_size_t)total_size;
  1428. return 0;
  1429. }
  1430. #endif /* CONFIG_NR_DRAM_BANKS */
  1431. #endif /* !USE_HOSTCC */