dw-apb-timer.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Designware APB Timer driver
  4. *
  5. * Copyright (C) 2018 Marek Vasut <marex@denx.de>
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <clk.h>
  10. #include <malloc.h>
  11. #include <reset.h>
  12. #include <timer.h>
  13. #include <dm/device_compat.h>
  14. #include <asm/io.h>
  15. #include <asm/arch/timer.h>
  16. #define DW_APB_LOAD_VAL 0x0
  17. #define DW_APB_CURR_VAL 0x4
  18. #define DW_APB_CTRL 0x8
  19. struct dw_apb_timer_priv {
  20. fdt_addr_t regs;
  21. struct reset_ctl_bulk resets;
  22. };
  23. static int dw_apb_timer_get_count(struct udevice *dev, u64 *count)
  24. {
  25. struct dw_apb_timer_priv *priv = dev_get_priv(dev);
  26. /*
  27. * The DW APB counter counts down, but this function
  28. * requires the count to be incrementing. Invert the
  29. * result.
  30. */
  31. *count = timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL));
  32. return 0;
  33. }
  34. static int dw_apb_timer_probe(struct udevice *dev)
  35. {
  36. struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  37. struct dw_apb_timer_priv *priv = dev_get_priv(dev);
  38. struct clk clk;
  39. int ret;
  40. ret = reset_get_bulk(dev, &priv->resets);
  41. if (ret)
  42. dev_warn(dev, "Can't get reset: %d\n", ret);
  43. else
  44. reset_deassert_bulk(&priv->resets);
  45. ret = clk_get_by_index(dev, 0, &clk);
  46. if (ret)
  47. return ret;
  48. uc_priv->clock_rate = clk_get_rate(&clk);
  49. clk_free(&clk);
  50. /* init timer */
  51. writel(0xffffffff, priv->regs + DW_APB_LOAD_VAL);
  52. writel(0xffffffff, priv->regs + DW_APB_CURR_VAL);
  53. setbits_le32(priv->regs + DW_APB_CTRL, 0x3);
  54. return 0;
  55. }
  56. static int dw_apb_timer_ofdata_to_platdata(struct udevice *dev)
  57. {
  58. struct dw_apb_timer_priv *priv = dev_get_priv(dev);
  59. priv->regs = dev_read_addr(dev);
  60. return 0;
  61. }
  62. static int dw_apb_timer_remove(struct udevice *dev)
  63. {
  64. struct dw_apb_timer_priv *priv = dev_get_priv(dev);
  65. return reset_release_bulk(&priv->resets);
  66. }
  67. static const struct timer_ops dw_apb_timer_ops = {
  68. .get_count = dw_apb_timer_get_count,
  69. };
  70. static const struct udevice_id dw_apb_timer_ids[] = {
  71. { .compatible = "snps,dw-apb-timer" },
  72. {}
  73. };
  74. U_BOOT_DRIVER(dw_apb_timer) = {
  75. .name = "dw_apb_timer",
  76. .id = UCLASS_TIMER,
  77. .ops = &dw_apb_timer_ops,
  78. .probe = dw_apb_timer_probe,
  79. .of_match = dw_apb_timer_ids,
  80. .ofdata_to_platdata = dw_apb_timer_ofdata_to_platdata,
  81. .remove = dw_apb_timer_remove,
  82. .priv_auto_alloc_size = sizeof(struct dw_apb_timer_priv),
  83. };