clk-uclass.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015 Google, Inc
  4. * Written by Simon Glass <sjg@chromium.org>
  5. * Copyright (c) 2016, NVIDIA CORPORATION.
  6. * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
  7. */
  8. #include <common.h>
  9. #include <clk.h>
  10. #include <clk-uclass.h>
  11. #include <dm.h>
  12. #include <dt-structs.h>
  13. #include <errno.h>
  14. #include <log.h>
  15. #include <malloc.h>
  16. #include <dm/devres.h>
  17. #include <dm/read.h>
  18. #include <linux/bug.h>
  19. #include <linux/clk-provider.h>
  20. #include <linux/err.h>
  21. static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
  22. {
  23. return (const struct clk_ops *)dev->driver->ops;
  24. }
  25. #if CONFIG_IS_ENABLED(OF_CONTROL)
  26. # if CONFIG_IS_ENABLED(OF_PLATDATA)
  27. int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
  28. struct clk *clk)
  29. {
  30. int ret;
  31. ret = device_get_by_driver_info((struct driver_info *)cells->node,
  32. &clk->dev);
  33. if (ret)
  34. return ret;
  35. clk->id = cells->arg[0];
  36. return 0;
  37. }
  38. # else
  39. static int clk_of_xlate_default(struct clk *clk,
  40. struct ofnode_phandle_args *args)
  41. {
  42. debug("%s(clk=%p)\n", __func__, clk);
  43. if (args->args_count > 1) {
  44. debug("Invaild args_count: %d\n", args->args_count);
  45. return -EINVAL;
  46. }
  47. if (args->args_count)
  48. clk->id = args->args[0];
  49. else
  50. clk->id = 0;
  51. clk->data = 0;
  52. return 0;
  53. }
  54. static int clk_get_by_index_tail(int ret, ofnode node,
  55. struct ofnode_phandle_args *args,
  56. const char *list_name, int index,
  57. struct clk *clk)
  58. {
  59. struct udevice *dev_clk;
  60. const struct clk_ops *ops;
  61. assert(clk);
  62. clk->dev = NULL;
  63. if (ret)
  64. goto err;
  65. ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
  66. if (ret) {
  67. debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
  68. __func__, ret);
  69. return ret;
  70. }
  71. clk->dev = dev_clk;
  72. ops = clk_dev_ops(dev_clk);
  73. if (ops->of_xlate)
  74. ret = ops->of_xlate(clk, args);
  75. else
  76. ret = clk_of_xlate_default(clk, args);
  77. if (ret) {
  78. debug("of_xlate() failed: %d\n", ret);
  79. return ret;
  80. }
  81. return clk_request(dev_clk, clk);
  82. err:
  83. debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
  84. __func__, ofnode_get_name(node), list_name, index, ret);
  85. return ret;
  86. }
  87. static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
  88. int index, struct clk *clk)
  89. {
  90. int ret;
  91. struct ofnode_phandle_args args;
  92. debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
  93. assert(clk);
  94. clk->dev = NULL;
  95. ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
  96. index, &args);
  97. if (ret) {
  98. debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
  99. __func__, ret);
  100. return ret;
  101. }
  102. return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
  103. index, clk);
  104. }
  105. int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
  106. {
  107. struct ofnode_phandle_args args;
  108. int ret;
  109. ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
  110. index, &args);
  111. return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
  112. index, clk);
  113. }
  114. int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
  115. {
  116. struct ofnode_phandle_args args;
  117. int ret;
  118. ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
  119. index, &args);
  120. return clk_get_by_index_tail(ret, node, &args, "clocks",
  121. index, clk);
  122. }
  123. int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
  124. {
  125. int i, ret, err, count;
  126. bulk->count = 0;
  127. count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
  128. if (count < 1)
  129. return count;
  130. bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
  131. if (!bulk->clks)
  132. return -ENOMEM;
  133. for (i = 0; i < count; i++) {
  134. ret = clk_get_by_index(dev, i, &bulk->clks[i]);
  135. if (ret < 0)
  136. goto bulk_get_err;
  137. ++bulk->count;
  138. }
  139. return 0;
  140. bulk_get_err:
  141. err = clk_release_all(bulk->clks, bulk->count);
  142. if (err)
  143. debug("%s: could release all clocks for %p\n",
  144. __func__, dev);
  145. return ret;
  146. }
  147. static int clk_set_default_parents(struct udevice *dev, int stage)
  148. {
  149. struct clk clk, parent_clk;
  150. int index;
  151. int num_parents;
  152. int ret;
  153. num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
  154. "#clock-cells");
  155. if (num_parents < 0) {
  156. debug("%s: could not read assigned-clock-parents for %p\n",
  157. __func__, dev);
  158. return 0;
  159. }
  160. for (index = 0; index < num_parents; index++) {
  161. ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
  162. index, &parent_clk);
  163. /* If -ENOENT, this is a no-op entry */
  164. if (ret == -ENOENT)
  165. continue;
  166. if (ret) {
  167. debug("%s: could not get parent clock %d for %s\n",
  168. __func__, index, dev_read_name(dev));
  169. return ret;
  170. }
  171. ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
  172. index, &clk);
  173. if (ret) {
  174. debug("%s: could not get assigned clock %d for %s\n",
  175. __func__, index, dev_read_name(dev));
  176. return ret;
  177. }
  178. /* This is clk provider device trying to reparent itself
  179. * It cannot be done right now but need to wait after the
  180. * device is probed
  181. */
  182. if (stage == 0 && clk.dev == dev)
  183. continue;
  184. if (stage > 0 && clk.dev != dev)
  185. /* do not setup twice the parent clocks */
  186. continue;
  187. ret = clk_set_parent(&clk, &parent_clk);
  188. /*
  189. * Not all drivers may support clock-reparenting (as of now).
  190. * Ignore errors due to this.
  191. */
  192. if (ret == -ENOSYS)
  193. continue;
  194. if (ret < 0) {
  195. debug("%s: failed to reparent clock %d for %s\n",
  196. __func__, index, dev_read_name(dev));
  197. return ret;
  198. }
  199. }
  200. return 0;
  201. }
  202. static int clk_set_default_rates(struct udevice *dev, int stage)
  203. {
  204. struct clk clk;
  205. int index;
  206. int num_rates;
  207. int size;
  208. int ret = 0;
  209. u32 *rates = NULL;
  210. size = dev_read_size(dev, "assigned-clock-rates");
  211. if (size < 0)
  212. return 0;
  213. num_rates = size / sizeof(u32);
  214. rates = calloc(num_rates, sizeof(u32));
  215. if (!rates)
  216. return -ENOMEM;
  217. ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
  218. if (ret)
  219. goto fail;
  220. for (index = 0; index < num_rates; index++) {
  221. /* If 0 is passed, this is a no-op */
  222. if (!rates[index])
  223. continue;
  224. ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
  225. index, &clk);
  226. if (ret) {
  227. debug("%s: could not get assigned clock %d for %s\n",
  228. __func__, index, dev_read_name(dev));
  229. continue;
  230. }
  231. /* This is clk provider device trying to program itself
  232. * It cannot be done right now but need to wait after the
  233. * device is probed
  234. */
  235. if (stage == 0 && clk.dev == dev)
  236. continue;
  237. if (stage > 0 && clk.dev != dev)
  238. /* do not setup twice the parent clocks */
  239. continue;
  240. ret = clk_set_rate(&clk, rates[index]);
  241. if (ret < 0) {
  242. debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
  243. __func__, index, clk.id, dev_read_name(dev));
  244. break;
  245. }
  246. }
  247. fail:
  248. free(rates);
  249. return ret;
  250. }
  251. int clk_set_defaults(struct udevice *dev, int stage)
  252. {
  253. int ret;
  254. if (!dev_of_valid(dev))
  255. return 0;
  256. /* If this not in SPL and pre-reloc state, don't take any action. */
  257. if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
  258. return 0;
  259. debug("%s(%s)\n", __func__, dev_read_name(dev));
  260. ret = clk_set_default_parents(dev, stage);
  261. if (ret)
  262. return ret;
  263. ret = clk_set_default_rates(dev, stage);
  264. if (ret < 0)
  265. return ret;
  266. return 0;
  267. }
  268. int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
  269. {
  270. int index;
  271. debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
  272. clk->dev = NULL;
  273. index = dev_read_stringlist_search(dev, "clock-names", name);
  274. if (index < 0) {
  275. debug("fdt_stringlist_search() failed: %d\n", index);
  276. return index;
  277. }
  278. return clk_get_by_index(dev, index, clk);
  279. }
  280. # endif /* OF_PLATDATA */
  281. int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
  282. {
  283. int index;
  284. debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
  285. ofnode_get_name(node), name, clk);
  286. clk->dev = NULL;
  287. index = ofnode_stringlist_search(node, "clock-names", name);
  288. if (index < 0) {
  289. debug("fdt_stringlist_search() failed: %d\n", index);
  290. return index;
  291. }
  292. return clk_get_by_index_nodev(node, index, clk);
  293. }
  294. int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
  295. {
  296. int ret;
  297. ret = clk_get_by_name_nodev(node, name, clk);
  298. if (ret == -ENODATA)
  299. return 0;
  300. return ret;
  301. }
  302. int clk_release_all(struct clk *clk, int count)
  303. {
  304. int i, ret;
  305. for (i = 0; i < count; i++) {
  306. debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
  307. /* check if clock has been previously requested */
  308. if (!clk[i].dev)
  309. continue;
  310. ret = clk_disable(&clk[i]);
  311. if (ret && ret != -ENOSYS)
  312. return ret;
  313. ret = clk_free(&clk[i]);
  314. if (ret && ret != -ENOSYS)
  315. return ret;
  316. }
  317. return 0;
  318. }
  319. #endif /* OF_CONTROL */
  320. int clk_request(struct udevice *dev, struct clk *clk)
  321. {
  322. const struct clk_ops *ops;
  323. debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
  324. if (!clk)
  325. return 0;
  326. ops = clk_dev_ops(dev);
  327. clk->dev = dev;
  328. if (!ops->request)
  329. return 0;
  330. return ops->request(clk);
  331. }
  332. int clk_free(struct clk *clk)
  333. {
  334. const struct clk_ops *ops;
  335. debug("%s(clk=%p)\n", __func__, clk);
  336. if (!clk_valid(clk))
  337. return 0;
  338. ops = clk_dev_ops(clk->dev);
  339. if (!ops->rfree)
  340. return 0;
  341. return ops->rfree(clk);
  342. }
  343. ulong clk_get_rate(struct clk *clk)
  344. {
  345. const struct clk_ops *ops;
  346. debug("%s(clk=%p)\n", __func__, clk);
  347. if (!clk_valid(clk))
  348. return 0;
  349. ops = clk_dev_ops(clk->dev);
  350. if (!ops->get_rate)
  351. return -ENOSYS;
  352. return ops->get_rate(clk);
  353. }
  354. struct clk *clk_get_parent(struct clk *clk)
  355. {
  356. struct udevice *pdev;
  357. struct clk *pclk;
  358. debug("%s(clk=%p)\n", __func__, clk);
  359. if (!clk_valid(clk))
  360. return NULL;
  361. pdev = dev_get_parent(clk->dev);
  362. pclk = dev_get_clk_ptr(pdev);
  363. if (!pclk)
  364. return ERR_PTR(-ENODEV);
  365. return pclk;
  366. }
  367. long long clk_get_parent_rate(struct clk *clk)
  368. {
  369. const struct clk_ops *ops;
  370. struct clk *pclk;
  371. debug("%s(clk=%p)\n", __func__, clk);
  372. if (!clk_valid(clk))
  373. return 0;
  374. pclk = clk_get_parent(clk);
  375. if (IS_ERR(pclk))
  376. return -ENODEV;
  377. ops = clk_dev_ops(pclk->dev);
  378. if (!ops->get_rate)
  379. return -ENOSYS;
  380. /* Read the 'rate' if not already set or if proper flag set*/
  381. if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
  382. pclk->rate = clk_get_rate(pclk);
  383. return pclk->rate;
  384. }
  385. ulong clk_set_rate(struct clk *clk, ulong rate)
  386. {
  387. const struct clk_ops *ops;
  388. debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
  389. if (!clk_valid(clk))
  390. return 0;
  391. ops = clk_dev_ops(clk->dev);
  392. if (!ops->set_rate)
  393. return -ENOSYS;
  394. return ops->set_rate(clk, rate);
  395. }
  396. int clk_set_parent(struct clk *clk, struct clk *parent)
  397. {
  398. const struct clk_ops *ops;
  399. debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
  400. if (!clk_valid(clk))
  401. return 0;
  402. ops = clk_dev_ops(clk->dev);
  403. if (!ops->set_parent)
  404. return -ENOSYS;
  405. return ops->set_parent(clk, parent);
  406. }
  407. int clk_enable(struct clk *clk)
  408. {
  409. const struct clk_ops *ops;
  410. struct clk *clkp = NULL;
  411. int ret;
  412. debug("%s(clk=%p)\n", __func__, clk);
  413. if (!clk_valid(clk))
  414. return 0;
  415. ops = clk_dev_ops(clk->dev);
  416. if (CONFIG_IS_ENABLED(CLK_CCF)) {
  417. /* Take id 0 as a non-valid clk, such as dummy */
  418. if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
  419. if (clkp->enable_count) {
  420. clkp->enable_count++;
  421. return 0;
  422. }
  423. if (clkp->dev->parent &&
  424. device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
  425. ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
  426. if (ret) {
  427. printf("Enable %s failed\n",
  428. clkp->dev->parent->name);
  429. return ret;
  430. }
  431. }
  432. }
  433. if (ops->enable) {
  434. ret = ops->enable(clk);
  435. if (ret) {
  436. printf("Enable %s failed\n", clk->dev->name);
  437. return ret;
  438. }
  439. }
  440. if (clkp)
  441. clkp->enable_count++;
  442. } else {
  443. if (!ops->enable)
  444. return -ENOSYS;
  445. return ops->enable(clk);
  446. }
  447. return 0;
  448. }
  449. int clk_enable_bulk(struct clk_bulk *bulk)
  450. {
  451. int i, ret;
  452. for (i = 0; i < bulk->count; i++) {
  453. ret = clk_enable(&bulk->clks[i]);
  454. if (ret < 0 && ret != -ENOSYS)
  455. return ret;
  456. }
  457. return 0;
  458. }
  459. int clk_disable(struct clk *clk)
  460. {
  461. const struct clk_ops *ops;
  462. struct clk *clkp = NULL;
  463. int ret;
  464. debug("%s(clk=%p)\n", __func__, clk);
  465. if (!clk_valid(clk))
  466. return 0;
  467. ops = clk_dev_ops(clk->dev);
  468. if (CONFIG_IS_ENABLED(CLK_CCF)) {
  469. if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
  470. if (clkp->enable_count == 0) {
  471. printf("clk %s already disabled\n",
  472. clkp->dev->name);
  473. return 0;
  474. }
  475. if (--clkp->enable_count > 0)
  476. return 0;
  477. }
  478. if (ops->disable) {
  479. ret = ops->disable(clk);
  480. if (ret)
  481. return ret;
  482. }
  483. if (clkp && clkp->dev->parent &&
  484. device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
  485. ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
  486. if (ret) {
  487. printf("Disable %s failed\n",
  488. clkp->dev->parent->name);
  489. return ret;
  490. }
  491. }
  492. } else {
  493. if (!ops->disable)
  494. return -ENOSYS;
  495. return ops->disable(clk);
  496. }
  497. return 0;
  498. }
  499. int clk_disable_bulk(struct clk_bulk *bulk)
  500. {
  501. int i, ret;
  502. for (i = 0; i < bulk->count; i++) {
  503. ret = clk_disable(&bulk->clks[i]);
  504. if (ret < 0 && ret != -ENOSYS)
  505. return ret;
  506. }
  507. return 0;
  508. }
  509. int clk_get_by_id(ulong id, struct clk **clkp)
  510. {
  511. struct udevice *dev;
  512. struct uclass *uc;
  513. int ret;
  514. ret = uclass_get(UCLASS_CLK, &uc);
  515. if (ret)
  516. return ret;
  517. uclass_foreach_dev(dev, uc) {
  518. struct clk *clk = dev_get_clk_ptr(dev);
  519. if (clk && clk->id == id) {
  520. *clkp = clk;
  521. return 0;
  522. }
  523. }
  524. return -ENOENT;
  525. }
  526. bool clk_is_match(const struct clk *p, const struct clk *q)
  527. {
  528. /* trivial case: identical struct clk's or both NULL */
  529. if (p == q)
  530. return true;
  531. /* trivial case #2: on the clk pointer is NULL */
  532. if (!p || !q)
  533. return false;
  534. /* same device, id and data */
  535. if (p->dev == q->dev && p->id == q->id && p->data == q->data)
  536. return true;
  537. return false;
  538. }
  539. static void devm_clk_release(struct udevice *dev, void *res)
  540. {
  541. clk_free(res);
  542. }
  543. static int devm_clk_match(struct udevice *dev, void *res, void *data)
  544. {
  545. return res == data;
  546. }
  547. struct clk *devm_clk_get(struct udevice *dev, const char *id)
  548. {
  549. int rc;
  550. struct clk *clk;
  551. clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
  552. if (unlikely(!clk))
  553. return ERR_PTR(-ENOMEM);
  554. rc = clk_get_by_name(dev, id, clk);
  555. if (rc)
  556. return ERR_PTR(rc);
  557. devres_add(dev, clk);
  558. return clk;
  559. }
  560. struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
  561. {
  562. struct clk *clk = devm_clk_get(dev, id);
  563. if (PTR_ERR(clk) == -ENODATA)
  564. return NULL;
  565. return clk;
  566. }
  567. void devm_clk_put(struct udevice *dev, struct clk *clk)
  568. {
  569. int rc;
  570. if (!clk)
  571. return;
  572. rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
  573. WARN_ON(rc);
  574. }
  575. int clk_uclass_post_probe(struct udevice *dev)
  576. {
  577. /*
  578. * when a clock provider is probed. Call clk_set_defaults()
  579. * also after the device is probed. This takes care of cases
  580. * where the DT is used to setup default parents and rates
  581. * using assigned-clocks
  582. */
  583. clk_set_defaults(dev, 1);
  584. return 0;
  585. }
  586. UCLASS_DRIVER(clk) = {
  587. .id = UCLASS_CLK,
  588. .name = "clk",
  589. .post_probe = clk_uclass_post_probe,
  590. };