cvmx-pko3-queue.h 6.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2020 Marvell International Ltd.
  4. */
  5. #ifndef __CVMX_PKO3_QUEUE_H__
  6. #define __CVMX_PKO3_QUEUE_H__
  7. /**
  8. * @INTERNAL
  9. *
  10. * Find or allocate global port/dq map table
  11. * which is a named table, contains entries for
  12. * all possible OCI nodes.
  13. *
  14. * The table global pointer is stored in core-local variable
  15. * so that every core will call this function once, on first use.
  16. */
  17. int __cvmx_pko3_dq_table_setup(void);
  18. /*
  19. * Get the base Descriptor Queue number for an IPD port on the local node
  20. */
  21. int cvmx_pko3_get_queue_base(int ipd_port);
  22. /*
  23. * Get the number of Descriptor Queues assigned for an IPD port
  24. */
  25. int cvmx_pko3_get_queue_num(int ipd_port);
  26. /**
  27. * Get L1/Port Queue number assigned to interface port.
  28. *
  29. * @param xiface is interface number.
  30. * @param index is port index.
  31. */
  32. int cvmx_pko3_get_port_queue(int xiface, int index);
  33. /*
  34. * Configure L3 through L5 Scheduler Queues and Descriptor Queues
  35. *
  36. * The Scheduler Queues in Levels 3 to 5 and Descriptor Queues are
  37. * configured one-to-one or many-to-one to a single parent Scheduler
  38. * Queues. The level of the parent SQ is specified in an argument,
  39. * as well as the number of children to attach to the specific parent.
  40. * The children can have fair round-robin or priority-based scheduling
  41. * when multiple children are assigned a single parent.
  42. *
  43. * @param node is the OCI node location for the queues to be configured
  44. * @param parent_level is the level of the parent queue, 2 to 5.
  45. * @param parent_queue is the number of the parent Scheduler Queue
  46. * @param child_base is the number of the first child SQ or DQ to assign to
  47. * @param parent
  48. * @param child_count is the number of consecutive children to assign
  49. * @param stat_prio_count is the priority setting for the children L2 SQs
  50. *
  51. * If <stat_prio_count> is -1, the Ln children will have equal Round-Robin
  52. * relationship with eachother. If <stat_prio_count> is 0, all Ln children
  53. * will be arranged in Weighted-Round-Robin, with the first having the most
  54. * precedence. If <stat_prio_count> is between 1 and 8, it indicates how
  55. * many children will have static priority settings (with the first having
  56. * the most precedence), with the remaining Ln children having WRR scheduling.
  57. *
  58. * @returns 0 on success, -1 on failure.
  59. *
  60. * Note: this function supports the configuration of node-local unit.
  61. */
  62. int cvmx_pko3_sq_config_children(unsigned int node, unsigned int parent_level,
  63. unsigned int parent_queue, unsigned int child_base,
  64. unsigned int child_count, int stat_prio_count);
  65. /*
  66. * @INTERNAL
  67. * Register a range of Descriptor Queues wth an interface port
  68. *
  69. * This function poulates the DQ-to-IPD translation table
  70. * used by the application to retrieve the DQ range (typically ordered
  71. * by priority) for a given IPD-port, which is either a physical port,
  72. * or a channel on a channelized interface (i.e. ILK).
  73. *
  74. * @param xiface is the physical interface number
  75. * @param index is either a physical port on an interface
  76. * @param or a channel of an ILK interface
  77. * @param dq_base is the first Descriptor Queue number in a consecutive range
  78. * @param dq_count is the number of consecutive Descriptor Queues leading
  79. * @param the same channel or port.
  80. *
  81. * Only a consecurive range of Descriptor Queues can be associated with any
  82. * given channel/port, and usually they are ordered from most to least
  83. * in terms of scheduling priority.
  84. *
  85. * Note: thus function only populates the node-local translation table.
  86. *
  87. * @returns 0 on success, -1 on failure.
  88. */
  89. int __cvmx_pko3_ipd_dq_register(int xiface, int index, unsigned int dq_base, unsigned int dq_count);
  90. /**
  91. * @INTERNAL
  92. *
  93. * Unregister DQs associated with CHAN_E (IPD port)
  94. */
  95. int __cvmx_pko3_ipd_dq_unregister(int xiface, int index);
  96. /*
  97. * Map channel number in PKO
  98. *
  99. * @param node is to specify the node to which this configuration is applied.
  100. * @param pq_num specifies the Port Queue (i.e. L1) queue number.
  101. * @param l2_l3_q_num specifies L2/L3 queue number.
  102. * @param channel specifies the channel number to map to the queue.
  103. *
  104. * The channel assignment applies to L2 or L3 Shaper Queues depending
  105. * on the setting of channel credit level.
  106. *
  107. * Return: returns none.
  108. */
  109. void cvmx_pko3_map_channel(unsigned int node, unsigned int pq_num, unsigned int l2_l3_q_num,
  110. u16 channel);
  111. int cvmx_pko3_pq_config(unsigned int node, unsigned int mac_num, unsigned int pq_num);
  112. int cvmx_pko3_port_cir_set(unsigned int node, unsigned int pq_num, unsigned long rate_kbips,
  113. unsigned int burst_bytes, int adj_bytes);
  114. int cvmx_pko3_dq_cir_set(unsigned int node, unsigned int pq_num, unsigned long rate_kbips,
  115. unsigned int burst_bytes);
  116. int cvmx_pko3_dq_pir_set(unsigned int node, unsigned int pq_num, unsigned long rate_kbips,
  117. unsigned int burst_bytes);
  118. typedef enum {
  119. CVMX_PKO3_SHAPE_RED_STALL,
  120. CVMX_PKO3_SHAPE_RED_DISCARD,
  121. CVMX_PKO3_SHAPE_RED_PASS
  122. } red_action_t;
  123. void cvmx_pko3_dq_red(unsigned int node, unsigned int dq_num, red_action_t red_act,
  124. int8_t len_adjust);
  125. /**
  126. * Macros to deal with short floating point numbers,
  127. * where unsigned exponent, and an unsigned normalized
  128. * mantissa are represented each with a defined field width.
  129. *
  130. */
  131. #define CVMX_SHOFT_MANT_BITS 8
  132. #define CVMX_SHOFT_EXP_BITS 4
  133. /**
  134. * Convert short-float to an unsigned integer
  135. * Note that it will lose precision.
  136. */
  137. #define CVMX_SHOFT_TO_U64(m, e) \
  138. ((((1ull << CVMX_SHOFT_MANT_BITS) | (m)) << (e)) >> CVMX_SHOFT_MANT_BITS)
  139. /**
  140. * Convert to short-float from an unsigned integer
  141. */
  142. #define CVMX_SHOFT_FROM_U64(ui, m, e) \
  143. do { \
  144. unsigned long long u; \
  145. unsigned int k; \
  146. k = (1ull << (CVMX_SHOFT_MANT_BITS + 1)) - 1; \
  147. (e) = 0; \
  148. u = (ui) << CVMX_SHOFT_MANT_BITS; \
  149. while ((u) > k) { \
  150. u >>= 1; \
  151. (e)++; \
  152. } \
  153. (m) = u & (k >> 1); \
  154. } while (0);
  155. #define CVMX_SHOFT_MAX() \
  156. CVMX_SHOFT_TO_U64((1 << CVMX_SHOFT_MANT_BITS) - 1, (1 << CVMX_SHOFT_EXP_BITS) - 1)
  157. #define CVMX_SHOFT_MIN() CVMX_SHOFT_TO_U64(0, 0)
  158. #endif /* __CVMX_PKO3_QUEUE_H__ */