cvmx-helper-gpio.h 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2020 Marvell International Ltd.
  4. *
  5. * Defines some GPIO information used in multiple places
  6. */
  7. #ifndef __CVMX_HELPER_GPIO_H__
  8. #define __CVMX_HELPER_GPIO_H__
  9. #define CVMX_GPIO_NAME_LEN 32 /** Length of name */
  10. enum cvmx_gpio_type {
  11. CVMX_GPIO_PIN_OCTEON, /** GPIO pin is directly connected to OCTEON */
  12. CVMX_GPIO_PIN_PCA953X, /** GPIO pin is NXP PCA953X compat chip */
  13. CVMX_GPIO_PIN_PCA957X,
  14. CVMX_GPIO_PIN_PCF857X, /** GPIO pin is NXP PCF857X compat chip */
  15. CVMX_GPIO_PIN_PCA9698, /** GPIO pin is NXP PCA9698 compat chip */
  16. CVMX_GPIO_PIN_CS4343, /** Inphi/Cortina CS4343 GPIO pins */
  17. CVMX_GPIO_PIN_OTHER, /** GPIO pin is something else */
  18. };
  19. enum cvmx_gpio_operation {
  20. CVMX_GPIO_OP_CONFIG, /** Initial configuration of the GPIO pin */
  21. CVMX_GPIO_OP_SET, /** Set pin */
  22. CVMX_GPIO_OP_CLEAR, /** Clear pin */
  23. CVMX_GPIO_OP_READ, /** Read pin */
  24. CVMX_GPIO_OP_TOGGLE, /** Toggle pin */
  25. CVMX_GPIO_OP_BLINK_START, /** Put in blink mode (if supported) */
  26. CVMX_GPIO_OP_BLINK_STOP, /** Takes the pin out of blink mode */
  27. CVMX_GPIO_OP_SET_LINK, /** Put in link monitoring mode */
  28. CVMX_GPIO_OP_SET_ACT, /** Put in RX activity mode */
  29. };
  30. /**
  31. * Inphi CS4343 output source select values for the GPIO_GPIOX output_src_sel.
  32. */
  33. enum cvmx_inphi_cs4343_gpio_gpio_output_src_sel {
  34. GPIO_SEL_DRIVE = 0, /** Value of GPIOX_DRIVE */
  35. GPIO_SEL_DELAY = 1, /** Drive delayed */
  36. GPIO_SEL_TOGGLE = 2, /** Used for blinking */
  37. GPIO_SEL_EXT = 3, /** External function */
  38. GPIO_SEL_EXT_DELAY = 4, /** External function delayed */
  39. };
  40. /** Inphi GPIO_GPIOX configuration register */
  41. union cvmx_inphi_cs4343_gpio_cfg_reg {
  42. u16 u;
  43. struct {
  44. u16: 4;
  45. /** Data source for the GPIO output */
  46. u16 output_src_sel : 3;
  47. /** 1 = GPIO output is inverted before being output */
  48. u16 invert_output : 1;
  49. /** 1 = GPIO input is inverted before being processed */
  50. u16 invert_input : 1;
  51. /** 0 = 2.5v/1.8v signalling, 1 = 1.2v signalling */
  52. u16 iovddsel_1v2 : 1;
  53. /**
  54. * 0 = output selected by outen bit
  55. * 1 = output controlled by selected GPIO output source
  56. */
  57. u16 outen_ovr : 1;
  58. /** 0 = GPIO is input only, 1 = GPIO output driver enabled */
  59. u16 outen : 1;
  60. u16: 2;
  61. u16 pullup_1k; /** 1 = enable 1K pad pullup */
  62. u16 pullup_10k; /** 1 = enable 10K pad pullup */
  63. } s;
  64. };
  65. #define CVMX_INPHI_CS4343_GPIO_CFG_OFFSET 0x0
  66. /**
  67. * This selects which port the GPIO gets its signals from when configured
  68. * as an output.
  69. */
  70. enum cvmx_inphi_cs4343_gpio_output_cfg_port {
  71. PORT_0_HOST_RX = 0, /** Port pair 0 host RX */
  72. PORT_0_LINE_RX = 1, /** Port pair 0 line RX */
  73. PORT_1_HOST_RX = 2, /** Port pair 1 host RX */
  74. PORT_1_LINE_RX = 3, /** Port pair 1 line RX */
  75. PORT_3_HOST_RX = 4, /** Port pair 3 host RX */
  76. PORT_3_LINE_RX = 5, /** Port pair 3 line RX */
  77. PORT_2_HOST_RX = 6, /** Port pair 2 host RX */
  78. PORT_2_LINE_RX = 7, /** Port pair 2 line RX */
  79. COMMON = 8, /** Common */
  80. };
  81. enum cvmx_inphi_cs4343_gpio_output_cfg_function {
  82. RX_LOS = 0, /** Port - 1 = Receive LOS (from DSP) */
  83. RX_LOL = 1, /** Port - 1 = Receive LOL (inverted from MSEQ) */
  84. EDC_CONVERGED = 2, /** Port - 1 = EDC converged (from DSP) */
  85. /** Port - 1 = PRBS checker in sync (inverted from SDS) */
  86. RX_PRBS_SYNC = 3,
  87. COMMON_LOGIC_0 = 0, /** Common - Logic 0 */
  88. COMMON_GPIO1_INPUT = 1, /** Common - GPIO 1 input */
  89. COMMON_GPIO2_INPUT = 2, /** Common - GPIO 2 input */
  90. COMMON_GPIO3_INPUT = 3, /** Common - GPIO 3 input */
  91. COMMON_GPIO4_INPUT = 4, /** Common - GPIO 4 input */
  92. COMMON_INTERR_INPUT = 5, /** Common - INTERR input */
  93. /** Common - Interrupt output from GLOBAL_INT register */
  94. COMMON_GLOBAL_INT = 6,
  95. /** Common - Interrupt output from GPIO_INT register */
  96. COMMON_GPIO_INT = 7,
  97. /** Common - Temp/voltage monitor interrupt */
  98. COMMON_MONITOR_INT = 8,
  99. /** Common - Selected clock output of global clock monitor */
  100. COMMON_GBL_CLKMON_CLK = 9,
  101. };
  102. union cvmx_inphi_cs4343_gpio_output_cfg {
  103. u16 u;
  104. struct {
  105. u16: 8;
  106. u16 port : 4; /** port */
  107. u16 function : 4; /** function */
  108. } s;
  109. };
  110. #define CVMX_INPHI_CS4343_GPIO_OUTPUT_CFG_OFFSET 0x1
  111. union cvmx_inphi_cs4343_gpio_drive {
  112. u16 u;
  113. struct {
  114. u16: 15;
  115. u16 value : 1; /** output value */
  116. } s;
  117. };
  118. #define CVMX_INPHI_CS4343_GPIO_DRIVE_OFFSET 0x2
  119. union cvmx_inphi_cs4343_gpio_value {
  120. u16 u;
  121. struct {
  122. u16: 15;
  123. u16 value : 1; /** input value (read-only) */
  124. } s;
  125. };
  126. #define CVMX_INPHI_CS4343_GPIO_VALUE_OFFSET 0x3
  127. union cvmx_inphi_cs4343_gpio_toggle {
  128. u16 u;
  129. struct {
  130. /** Toggle rate in ms, multiply by 2 to get period in ms */
  131. u16 rate : 16;
  132. } s;
  133. };
  134. #define CVMX_INPHI_CS4343_GPIO_TOGGLE_OFFSET 0x4
  135. union cvmx_inphi_cs4343_gpio_delay {
  136. u16 u;
  137. struct {
  138. /** On delay for GPIO output in ms when enabled */
  139. u16 on_delay : 16;
  140. } s;
  141. };
  142. #define CVMX_INPHI_CS4343_GPIO_DELAY_OFFSET 0x5
  143. /**
  144. * GPIO flags associated with a GPIO pin (can be combined)
  145. */
  146. enum cvmx_gpio_flags {
  147. CVMX_GPIO_ACTIVE_HIGH = 0, /** Active high (default) */
  148. CVMX_GPIO_ACTIVE_LOW = 1, /** Active low (inverted) */
  149. CVMX_GPIO_OPEN_COLLECTOR = 2, /** Output is open-collector */
  150. };
  151. /** Default timer number to use for outputting a frequency [0..3] */
  152. #define CVMX_GPIO_DEFAULT_TIMER 3
  153. /** Configuration data for native Octeon GPIO pins */
  154. struct cvmx_octeon_gpio_data {
  155. int cpu_node; /** CPU node for GPIO pin */
  156. int timer; /** Timer number used when in toggle mode, 0-3 */
  157. };
  158. struct cvmx_pcf857x_gpio_data {
  159. unsigned int latch_out;
  160. };
  161. #define CVMX_INPHI_CS4343_EFUSE_PDF_SKU_REG 0x19f
  162. #define CVMX_INPHI_CS4343_SKU_CS4223 0x10
  163. #define CVMX_INPHI_CS4343_SKU_CS4224 0x11
  164. #define CVMX_INPHI_CS4343_SKU_CS4343 0x12
  165. #define CVMX_INPHI_CS4343_SKU_CS4221 0x13
  166. #define CVMX_INPHI_CS4343_SKU_CS4227 0x14
  167. #define CVMX_INPHI_CS4343_SKU_CS4341 0x16
  168. struct cvmx_cs4343_gpio_data {
  169. int reg_offset; /** Base register address for GPIO */
  170. enum cvmx_gpio_operation last_op;
  171. u8 link_port; /** Link port number for link status */
  172. u16 sku; /** Value from CS4224_EFUSE_PDF_SKU register */
  173. u8 out_src_sel;
  174. u8 field_func;
  175. bool out_en;
  176. bool is_cs4343; /** True if dual package */
  177. struct phy_device *phydev;
  178. };
  179. struct cvmx_fdt_gpio_info;
  180. /** Function called for GPIO operations */
  181. typedef int (*cvmx_fdt_gpio_op_func_t)(struct cvmx_fdt_gpio_info *, enum cvmx_gpio_operation);
  182. /**
  183. * GPIO descriptor
  184. */
  185. struct cvmx_fdt_gpio_info {
  186. struct cvmx_fdt_gpio_info *next; /** For list of GPIOs */
  187. char name[CVMX_GPIO_NAME_LEN]; /** Name of GPIO */
  188. int pin; /** GPIO pin number */
  189. enum cvmx_gpio_type gpio_type; /** Type of GPIO controller */
  190. int of_offset; /** Offset in device tree */
  191. int phandle;
  192. struct cvmx_fdt_i2c_bus_info *i2c_bus; /** I2C bus descriptor */
  193. int i2c_addr; /** Address on i2c bus */
  194. enum cvmx_gpio_flags flags; /** Flags associated with pin */
  195. int num_pins; /** Total number of pins */
  196. unsigned int latch_out; /** Latched output for 857x */
  197. /** Rate in ms between toggle states */
  198. int toggle_rate;
  199. /** Pointer to user data for user-defined functions */
  200. void *data;
  201. /** Function to set, clear, toggle, etc. */
  202. cvmx_fdt_gpio_op_func_t op_func;
  203. /* Two values are used to detect the initial case where nothing has
  204. * been configured. Initially, all of the following will be false
  205. * which will force the initial state to be properly set.
  206. */
  207. /** True if the GPIO pin is currently set, useful for toggle */
  208. bool is_set;
  209. /** Set if configured to invert */
  210. bool invert_set;
  211. /** Set if input is to be inverted */
  212. bool invert_input;
  213. /** Set if direction is configured as output */
  214. bool dir_out;
  215. /** Set if direction is configured as input */
  216. bool dir_in;
  217. /** Pin is set to toggle periodically */
  218. bool toggle;
  219. /** True if LED is used to indicate link status */
  220. bool link_led;
  221. /** True if LED is used to indicate rx activity */
  222. bool rx_act_led;
  223. /** True if LED is used to indicate tx activity */
  224. bool tx_act_led;
  225. /** True if LED is used to indicate networking errors */
  226. bool error_led;
  227. /** True if LED can automatically show link */
  228. bool hw_link;
  229. };
  230. /** LED datastructure */
  231. struct cvmx_fdt_gpio_led {
  232. struct cvmx_fdt_gpio_led *next, *prev; /** List of LEDs */
  233. char name[CVMX_GPIO_NAME_LEN]; /** Name */
  234. struct cvmx_fdt_gpio_info *gpio; /** GPIO for LED */
  235. int of_offset; /** Device tree node */
  236. /** True if active low, note that GPIO contains this info */
  237. bool active_low;
  238. };
  239. /**
  240. * Returns the operation function for the GPIO phandle
  241. *
  242. * @param[in] fdt_addr Pointer to FDT
  243. * @param phandle phandle of GPIO entry
  244. *
  245. * Return: Pointer to op function or NULL if not found.
  246. */
  247. cvmx_fdt_gpio_op_func_t cvmx_fdt_gpio_get_op_func(const void *fdt_addr, int phandle);
  248. /**
  249. * Given a phandle to a GPIO device return the type of GPIO device it is.
  250. *
  251. * @param[in] fdt_addr Address of flat device tree
  252. * @param phandle phandle to GPIO
  253. * @param[out] size Number of pins (optional, may be NULL)
  254. *
  255. * Return: Type of GPIO device or PIN_ERROR if error
  256. */
  257. enum cvmx_gpio_type cvmx_fdt_get_gpio_type(const void *fdt_addr, int phandle, int *size);
  258. /**
  259. * Return a GPIO handle given a GPIO phandle of the form <&gpio pin flags>
  260. *
  261. * @param[in] fdt_addr Address of flat device tree
  262. * @param of_offset node offset of GPIO device
  263. * @param prop_name name of property
  264. *
  265. * Return: pointer to GPIO handle or NULL if error
  266. */
  267. struct cvmx_fdt_gpio_info *cvmx_fdt_gpio_get_info(const void *fdt_addr, int of_offset,
  268. const char *prop_name);
  269. /**
  270. * Return a GPIO handle given a GPIO phandle of the form <&gpio pin flags>
  271. *
  272. * @param[in] fdt_addr Address of flat device tree
  273. * @param of_offset node offset for property
  274. * @param prop_name name of property
  275. *
  276. * Return: pointer to GPIO handle or NULL if error
  277. */
  278. struct cvmx_fdt_gpio_info *cvmx_fdt_gpio_get_info_phandle(const void *fdt_addr, int of_offset,
  279. const char *prop_name);
  280. /**
  281. * Parses a GPIO entry and fills in the gpio info data structure
  282. *
  283. * @param[in] fdt_addr Address of FDT
  284. * @param phandle phandle for GPIO
  285. * @param pin pin number
  286. * @param flags flags set (1 = invert)
  287. * @param[out] gpio GPIO info data structure
  288. *
  289. * Return: 0 for success, -1 on error
  290. */
  291. int cvmx_fdt_parse_gpio(const void *fdt_addr, int phandle, int pin, u32 flags,
  292. struct cvmx_fdt_gpio_info *gpio);
  293. /**
  294. * @param gpio GPIO descriptor to assign timer to
  295. * @param timer Octeon hardware timer number [0..3]
  296. */
  297. void cvmx_fdt_gpio_set_timer(struct cvmx_fdt_gpio_info *gpio, int timer);
  298. /**
  299. * Given a GPIO pin descriptor, input the value of that pin
  300. *
  301. * @param pin GPIO pin descriptor
  302. *
  303. * Return: 0 if low, 1 if high, -1 on error. Note that the input will be
  304. * inverted if the CVMX_GPIO_ACTIVE_LOW flag bit is set.
  305. */
  306. int cvmx_fdt_gpio_get(struct cvmx_fdt_gpio_info *pin);
  307. /**
  308. * Sets a GPIO pin given the GPIO descriptor
  309. *
  310. * @param gpio GPIO pin descriptor
  311. * @param value value to set it to, 0 or 1
  312. *
  313. * Return: 0 on success, -1 on error.
  314. *
  315. * NOTE: If the CVMX_GPIO_ACTIVE_LOW flag is set then the output value will be
  316. * inverted.
  317. */
  318. int cvmx_fdt_gpio_set(struct cvmx_fdt_gpio_info *gpio, int value);
  319. /**
  320. * Sets the blink frequency for a GPIO pin
  321. *
  322. * @param gpio GPIO handle
  323. * @param freq Frequency in hz [0..500]
  324. */
  325. void cvmx_fdt_gpio_set_freq(struct cvmx_fdt_gpio_info *gpio, int freq);
  326. /**
  327. * Enables or disables blinking a GPIO pin
  328. *
  329. * @param gpio GPIO handle
  330. * @param blink True to start blinking, false to stop
  331. *
  332. * Return: 0 for success, -1 on error
  333. * NOTE: Not all GPIO types support blinking.
  334. */
  335. int cvmx_fdt_gpio_set_blink(struct cvmx_fdt_gpio_info *gpio, bool blink);
  336. /**
  337. * Alternates between link and blink mode
  338. *
  339. * @param gpio GPIO handle
  340. * @param blink True to start blinking, false to use link status
  341. *
  342. * Return: 0 for success, -1 on error
  343. * NOTE: Not all GPIO types support this.
  344. */
  345. int cvmx_fdt_gpio_set_link_blink(struct cvmx_fdt_gpio_info *gpio, bool blink);
  346. static inline bool cvmx_fdt_gpio_hw_link_supported(const struct cvmx_fdt_gpio_info *gpio)
  347. {
  348. return gpio->hw_link;
  349. }
  350. /**
  351. * Configures a GPIO pin as input or output
  352. *
  353. * @param gpio GPIO pin to configure
  354. * @param output Set to true to make output, false for input
  355. */
  356. void cvmx_fdt_gpio_set_output(struct cvmx_fdt_gpio_info *gpio, bool output);
  357. /**
  358. * Allocates an LED data structure
  359. * @param[in] name name to assign LED
  360. * @param of_offset Device tree offset
  361. * @param gpio GPIO assigned to LED (can be NULL)
  362. * @param last Previous LED to build a list
  363. *
  364. * Return: pointer to LED data structure or NULL if out of memory
  365. */
  366. struct cvmx_fdt_gpio_led *cvmx_alloc_led(const char *name, int of_offset,
  367. struct cvmx_fdt_gpio_info *gpio,
  368. struct cvmx_fdt_gpio_led *last);
  369. /**
  370. * Parses an LED in the device tree
  371. *
  372. * @param[in] fdt_addr Pointer to flat device tree
  373. * @param led_of_offset Device tree offset of LED
  374. * @param gpio GPIO data structure to use (can be NULL)
  375. * @param last Previous LED if this is a group of LEDs
  376. *
  377. * Return: Pointer to LED data structure or NULL if error
  378. */
  379. struct cvmx_fdt_gpio_led *cvmx_fdt_parse_led(const void *fdt_addr, int led_of_offset,
  380. struct cvmx_fdt_gpio_info *gpio,
  381. struct cvmx_fdt_gpio_led *last);
  382. #endif /* __CVMX_HELPER_GPIO_H__ */