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- /* SPDX-License-Identifier: GPL-2.0 */
- /*
- * Copyright (C) 2020 Marvell International Ltd.
- *
- * Fixes and workaround for Octeon chip errata. This file
- * contains functions called by cvmx-helper to workaround known
- * chip errata. For the most part, code doesn't need to call
- * these functions directly.
- */
- #ifndef __CVMX_HELPER_ERRATA_H__
- #define __CVMX_HELPER_ERRATA_H__
- #include "cvmx-wqe.h"
- /**
- * @INTERNAL
- * Function to adjust internal IPD pointer alignments
- *
- * Return: 0 on success
- * !0 on failure
- */
- int __cvmx_helper_errata_fix_ipd_ptr_alignment(void);
- /**
- * This function needs to be called on all Octeon chips with
- * errata PKI-100.
- *
- * The Size field is 8 too large in WQE and next pointers
- *
- * The Size field generated by IPD is 8 larger than it should
- * be. The Size field is <55:40> of both:
- * - WORD3 in the work queue entry, and
- * - the next buffer pointer (which precedes the packet data
- * in each buffer).
- *
- * @param work Work queue entry to fix
- * Return: Zero on success. Negative on failure
- */
- int cvmx_helper_fix_ipd_packet_chain(cvmx_wqe_t *work);
- /**
- * Due to errata G-720, the 2nd order CDR circuit on CN52XX pass
- * 1 doesn't work properly. The following code disables 2nd order
- * CDR for the specified QLM.
- *
- * @param qlm QLM to disable 2nd order CDR for.
- */
- void __cvmx_helper_errata_qlm_disable_2nd_order_cdr(int qlm);
- #endif
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