cvmx-helper-board.h 20 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2020 Marvell International Ltd.
  4. *
  5. * Helper functions to abstract board specific data about
  6. * network ports from the rest of the cvmx-helper files.
  7. */
  8. #ifndef __CVMX_HELPER_BOARD_H__
  9. #define __CVMX_HELPER_BOARD_H__
  10. #define CVMX_VSC7224_NAME_LEN 16
  11. typedef enum {
  12. USB_CLOCK_TYPE_REF_12,
  13. USB_CLOCK_TYPE_REF_24,
  14. USB_CLOCK_TYPE_REF_48,
  15. USB_CLOCK_TYPE_CRYSTAL_12,
  16. } cvmx_helper_board_usb_clock_types_t;
  17. typedef enum cvmx_phy_type {
  18. BROADCOM_GENERIC_PHY,
  19. MARVELL_GENERIC_PHY,
  20. CORTINA_PHY, /** Now Inphi */
  21. AQUANTIA_PHY,
  22. GENERIC_8023_C22_PHY,
  23. GENERIC_8023_C45_PHY,
  24. INBAND_PHY,
  25. QUALCOMM_S17, /** Qualcomm QCA833X switch */
  26. VITESSE_VSC8490_PHY, /** Vitesse VSC8490 is non-standard for SGMII */
  27. FAKE_PHY, /** Unsupported or no PHY, use GPIOs for LEDs */
  28. } cvmx_phy_type_t;
  29. /** Used to record the host mode used by the Cortina CS4321 PHY */
  30. typedef enum {
  31. CVMX_PHY_HOST_MODE_UNKNOWN,
  32. CVMX_PHY_HOST_MODE_SGMII,
  33. CVMX_PHY_HOST_MODE_QSGMII,
  34. CVMX_PHY_HOST_MODE_XAUI,
  35. CVMX_PHY_HOST_MODE_RXAUI,
  36. } cvmx_phy_host_mode_t;
  37. typedef enum {
  38. set_phy_link_flags_autoneg = 0x1,
  39. set_phy_link_flags_flow_control_dont_touch = 0x0 << 1,
  40. set_phy_link_flags_flow_control_enable = 0x1 << 1,
  41. set_phy_link_flags_flow_control_disable = 0x2 << 1,
  42. set_phy_link_flags_flow_control_mask = 0x3 << 1,
  43. } cvmx_helper_board_set_phy_link_flags_types_t;
  44. /**
  45. * The EBB6600 board uses a MDIO mux device to select between the two QLM
  46. * modules since both QLM modules share the same PHY addresses. The
  47. * MDIO mux is controlled via GPIO by a GPIO device that is also on
  48. * the TWSI bus rather than native OCTEON GPIO libes.
  49. *
  50. * To further complicate matters, the TWSI GPIO device sits behind
  51. * a TWSI mux device as well, making accessing the MDIO devices on
  52. * this board a very complex operation involving writing to the TWSI mux,
  53. * followed by the MDIO mux device.
  54. */
  55. /** Maximum number of GPIO devices used to control the MDIO mux */
  56. #define CVMX_PHY_MUX_MAX_GPIO 2
  57. /** Type of MDIO mux device, currently OTHER isn't supported */
  58. typedef enum {
  59. SN74CBTLV3253, /** SN74CBTLV3253 I2C device */
  60. OTHER /** Unknown/other */
  61. } cvmx_phy_mux_type_t;
  62. /** Type of GPIO line controlling MDIO mux */
  63. typedef enum {
  64. GPIO_OCTEON, /** Native OCTEON */
  65. GPIO_PCA8574 /** TWSI mux device */
  66. } cvmx_phy_gpio_type_t;
  67. /* Forward declarations */
  68. struct cvmx_fdt_sfp_info; /** Defined in cvmx-helper-fdt.h */
  69. struct cvmx_vsc7224;
  70. struct cvmx_fdt_gpio_info; /** Defined in cvmx-helper-fdt.h */
  71. struct cvmx_fdt_i2c_bus_info; /** Defined in cvmx-helper-fdt.h */
  72. struct cvmx_phy_info;
  73. struct cvmx_fdt_i2c_bus_info;
  74. struct cvmx_fdt_gpio_info;
  75. struct cvmx_fdt_gpio_led;
  76. /**
  77. * @INTERNAL
  78. * This data structure is used when the port LEDs are wired up to Octeon's GPIO
  79. * lines instead of to a traditional PHY.
  80. */
  81. struct cvmx_phy_gpio_leds {
  82. struct cvmx_phy_gpio_leds *next; /** For when ports are grouped together */
  83. u64 last_rx_count; /** Counters used to check for activity */
  84. u64 last_tx_count; /** Counters used to check for activity */
  85. u64 last_activity_poll_time; /** Last time activity was polled */
  86. u64 last_link_poll_time; /** Last time link was polled */
  87. int of_offset;
  88. int link_poll_interval_ms; /** Link polling interval in ms */
  89. int activity_poll_interval_ms; /** Activity polling interval in ms */
  90. struct cvmx_fdt_gpio_led *link_status;
  91. struct cvmx_fdt_gpio_led *error;
  92. struct cvmx_fdt_gpio_led *rx_activity;
  93. struct cvmx_fdt_gpio_led *tx_activity;
  94. struct cvmx_fdt_gpio_led *identify;
  95. struct cvmx_fdt_gpio_info *link_status_gpio;
  96. struct cvmx_fdt_gpio_info *error_gpio;
  97. /** Type of GPIO for error LED */
  98. /** If GPIO expander, describe the bus to the expander */
  99. struct cvmx_fdt_gpio_info *rx_activity_gpio;
  100. struct cvmx_fdt_gpio_info *tx_activity_gpio;
  101. u16 rx_activity_hz; /** RX activity blink time in hz */
  102. u16 tx_activity_hz; /** TX activity blink time in hz */
  103. /**
  104. * Set if activity and/or link is using an Inphi/Cortina CS4343 or
  105. * compatible phy that requires software assistance. NULL if not used.
  106. */
  107. bool link_status_active_low; /** True if active link is active low */
  108. bool error_status_active_low; /** True if error LED is active low */
  109. bool error_active_low; /** True if error is active low */
  110. bool rx_activity_active_low; /** True if rx activity is active low */
  111. bool tx_activity_active_low; /** True if tx activity is active low */
  112. /** Set true if LEDs are shared on an interface by all ports */
  113. bool interface_leds;
  114. int8_t rx_gpio_timer; /** GPIO clock generator timer [0-3] */
  115. int8_t tx_gpio_timer; /** GPIO clock generator timer [0-3] */
  116. /** True if LOS signal activates error LED */
  117. bool los_generate_error;
  118. /** True if the error LED is hooked up to a GPIO expander */
  119. bool error_gpio_expander;
  120. /** True if the link and RX activity LEDs are shared */
  121. bool link_and_rx_activity_shared;
  122. /** True if the link and TX activity LEDs are shared */
  123. bool link_and_tx_activity_shared;
  124. /** True if the RX activity and TX activity LEDs are shared */
  125. bool rx_and_tx_activity_shared;
  126. /** True if link is driven directly by the hardware */
  127. bool link_led_hw_link;
  128. bool error_lit; /** True if ERROR LED is lit */
  129. bool quad_sfp_mode; /** True if using four SFPs for XLAUI */
  130. /** User-defined function to update the link LED */
  131. void (*update_link_led)(int xiface, int index, cvmx_helper_link_info_t result);
  132. /** User-defined function to update the rx activity LED */
  133. void (*update_rx_activity_led)(struct cvmx_phy_gpio_leds *led, int xiface, int index,
  134. bool check_time);
  135. };
  136. /** This structure contains the tap values to use for various cable lengths */
  137. struct cvmx_vsc7224_tap {
  138. u16 len; /** Starting cable length for tap values */
  139. u16 main_tap; /** Main tap value to use */
  140. u16 pre_tap; /** Pre-tap value to use */
  141. u16 post_tap; /** Post-tap value to use */
  142. };
  143. /** Data structure for Microsemi VSC7224 channel */
  144. struct cvmx_vsc7224_chan {
  145. struct cvmx_vsc7224_chan *next, *prev; /** Used for linking */
  146. int ipd_port; /** IPD port this channel belongs to */
  147. int xiface; /** xinterface of SFP */
  148. int index; /** Port index of SFP */
  149. int lane; /** Lane on port */
  150. int of_offset; /** Offset of channel info in dt */
  151. bool is_tx; /** True if is transmit channel */
  152. bool maintap_disable; /** True to disable the main tap */
  153. bool pretap_disable; /** True to disable pre-tap */
  154. bool posttap_disable; /** True to disable post-tap */
  155. int num_taps; /** Number of tap values */
  156. /** (Q)SFP attached to this channel */
  157. struct cvmx_fdt_sfp_info *sfp_info;
  158. struct cvmx_vsc7224 *vsc7224; /** Pointer to parent */
  159. /** Tap values for various lengths, must be at the end */
  160. struct cvmx_vsc7224_tap taps[0];
  161. };
  162. /** Data structure for Microsemi VSC7224 reclocking chip */
  163. struct cvmx_vsc7224 {
  164. const char *name; /** Name */
  165. /** Pointer to cannel data */
  166. struct cvmx_vsc7224_chan *channel[4];
  167. /** I2C bus device is connected to */
  168. struct cvmx_fdt_i2c_bus_info *i2c_bus;
  169. /** Address of VSC7224 on i2c bus */
  170. int i2c_addr;
  171. struct cvmx_fdt_gpio_info *los_gpio; /** LoS GPIO pin */
  172. struct cvmx_fdt_gpio_info *reset_gpio; /** Reset GPIO pin */
  173. int of_offset; /** Offset in device tree */
  174. };
  175. /** Data structure for Avago AVSP5410 gearbox phy */
  176. struct cvmx_avsp5410 {
  177. const char *name; /** Name */
  178. /** I2C bus device is connected to */
  179. struct cvmx_fdt_i2c_bus_info *i2c_bus;
  180. /** Address of AVSP5410 on i2c bus */
  181. int i2c_addr;
  182. int of_offset; /** Offset in device tree */
  183. int ipd_port; /** IPD port this phy belongs to */
  184. int xiface; /** xinterface of SFP */
  185. int index; /** Port index of SFP */
  186. u64 prev_temp; /** Previous temparature recorded on Phy Core */
  187. u64 prev_temp_mins; /** Mininutes when the prev temp check is done */
  188. /** (Q)SFP attached to this phy */
  189. struct cvmx_fdt_sfp_info *sfp_info;
  190. };
  191. struct cvmx_cs4343_info;
  192. /**
  193. * @INTERNAL
  194. *
  195. * Data structure containing Inphi CS4343 slice information
  196. */
  197. struct cvmx_cs4343_slice_info {
  198. const char *name; /** Name of this slice in device tree */
  199. struct cvmx_cs4343_info *mphy; /** Pointer to mphy cs4343 */
  200. struct cvmx_phy_info *phy_info;
  201. int of_offset; /** Offset in device tree */
  202. int slice_no; /** Slice number */
  203. int reg_offset; /** Offset for this slice */
  204. u16 sr_stx_cmode_res; /** See Rainier device tree */
  205. u16 sr_stx_drv_lower_cm; /** See Rainier device tree */
  206. u16 sr_stx_level; /** See Rainier device tree */
  207. u16 sr_stx_pre_peak; /** See Rainier device tree */
  208. u16 sr_stx_muxsubrate_sel; /** See Rainier device tree */
  209. u16 sr_stx_post_peak; /** See Rainier device tree */
  210. u16 cx_stx_cmode_res; /** See Rainier device tree */
  211. u16 cx_stx_drv_lower_cm; /** See Rainier device tree */
  212. u16 cx_stx_level; /** See Rainier device tree */
  213. u16 cx_stx_pre_peak; /** See Rainier device tree */
  214. u16 cx_stx_muxsubrate_sel; /** See Rainier device tree */
  215. u16 cx_stx_post_peak; /** See Rainier device tree */
  216. u16 basex_stx_cmode_res; /** See Rainier device tree */
  217. u16 basex_stx_drv_lower_cm; /** See Rainier device tree */
  218. u16 basex_stx_level; /** See Rainier device tree */
  219. u16 basex_stx_pre_peak; /** See Rainier device tree */
  220. u16 basex_stx_muxsubrate_sel; /** See Rainier device tree */
  221. u16 basex_stx_post_peak; /** See Rainier device tree */
  222. int link_gpio; /** Link LED gpio pin number, -1 if none */
  223. int error_gpio; /** Error LED GPIO pin or -1 if none */
  224. int los_gpio; /** LoS input GPIO or -1 if none */
  225. bool los_inverted; /** True if LoS input is inverted */
  226. bool link_inverted; /** True if link output is inverted */
  227. bool error_inverted; /** True if error output is inverted */
  228. };
  229. /**
  230. * @INTERNAL
  231. *
  232. * Data structure for Cortina/Inphi CS4343 device
  233. */
  234. struct cvmx_cs4343_info {
  235. const char *name; /** Name of Inphi/Cortina CS4343 in DT */
  236. struct cvmx_phy_info *phy_info;
  237. struct cvmx_cs4343_slice_info slice[4]; /** Slice information */
  238. int of_offset;
  239. };
  240. /**
  241. * @INTERNAL
  242. * This data structure is used to hold PHY information and is subject to change.
  243. * Please do not use this data structure directly.
  244. *
  245. * NOTE: The U-Boot OCTEON Ethernet drivers depends on this data structure for
  246. * the mux support.
  247. */
  248. typedef struct cvmx_phy_info {
  249. int phy_addr; /** MDIO address of PHY */
  250. int phy_sub_addr; /** Sub-address (i.e. slice), used by Cortina */
  251. int ipd_port; /** IPD port number for the PHY */
  252. /** MDIO bus PHY connected to (even if behind mux) */
  253. int mdio_unit;
  254. int direct_connect; /** 1 if PHY is directly connected */
  255. int gpio[CVMX_PHY_MUX_MAX_GPIO]; /** GPIOs used to control mux, -1 if not used */
  256. /** Type of GPIO. It can be a local OCTEON GPIO or a TWSI GPIO */
  257. cvmx_phy_gpio_type_t gpio_type[CVMX_PHY_MUX_MAX_GPIO];
  258. /** Address of TWSI GPIO */
  259. int cvmx_gpio_twsi[CVMX_PHY_MUX_MAX_GPIO];
  260. /** Value to put into the GPIO lines to select MDIO bus */
  261. int gpio_value;
  262. int gpio_parent_mux_twsi; /** -1 if not used, parent TWSI mux for ebb6600 */
  263. int gpio_parent_mux_select; /** selector to use on parent TWSI mux */
  264. cvmx_phy_type_t phy_type; /** Type of PHY */
  265. cvmx_phy_mux_type_t mux_type; /** Type of MDIO mux */
  266. int mux_twsi_addr; /** Address of the MDIO mux */
  267. cvmx_phy_host_mode_t host_mode; /** Used by Cortina PHY */
  268. void *phydev; /** Pointer to parent phy device */
  269. int fdt_offset; /** Node in flat device tree */
  270. int phy_i2c_bus; /** I2C bus for reclocking chips */
  271. int phy_i2c_addr; /** I2C address of reclocking chip */
  272. int num_vsc7224; /** Number of Microsemi VSC7224 devices */
  273. struct cvmx_vsc7224 *vsc7224; /** Info for VSC7224 devices */
  274. /** SFP/QSFP descriptor */
  275. struct cvmx_fdt_sfp_info *sfp_info;
  276. /** CS4343 slice information for SGMII/XFI. This is NULL in XLAUI mode */
  277. struct cvmx_cs4343_slice_info *cs4343_slice_info;
  278. /** CS4343 mphy information for XLAUI */
  279. struct cvmx_cs4343_info *cs4343_info;
  280. /** Pointer to function to return link information */
  281. cvmx_helper_link_info_t (*link_function)(struct cvmx_phy_info *phy_info);
  282. /**
  283. * If there are LEDs driven by GPIO lines instead of by a PHY device
  284. * then they are described here, otherwise gpio_leds should be NULL.
  285. */
  286. struct cvmx_phy_gpio_leds *gpio_leds;
  287. } cvmx_phy_info_t;
  288. /* Fake IPD port, the RGMII/MII interface may use different PHY, use this
  289. macro to return appropriate MIX address to read the PHY. */
  290. #define CVMX_HELPER_BOARD_MGMT_IPD_PORT -10
  291. /**
  292. * Return the MII PHY address associated with the given IPD
  293. * port. A result of -1 means there isn't a MII capable PHY
  294. * connected to this port. On chips supporting multiple MII
  295. * busses the bus number is encoded in bits <15:8>.
  296. *
  297. * This function must be modified for every new Octeon board.
  298. * Internally it uses switch statements based on the cvmx_sysinfo
  299. * data to determine board types and revisions. It relies on the
  300. * fact that every Octeon board receives a unique board type
  301. * enumeration from the bootloader.
  302. *
  303. * @param ipd_port Octeon IPD port to get the MII address for.
  304. *
  305. * Return: MII PHY address and bus number or -1.
  306. */
  307. int cvmx_helper_board_get_mii_address(int ipd_port);
  308. /**
  309. * This function as a board specific method of changing the PHY
  310. * speed, duplex, and autonegotiation. This programs the PHY and
  311. * not Octeon. This can be used to force Octeon's links to
  312. * specific settings.
  313. *
  314. * @param phy_addr The address of the PHY to program
  315. * @param link_flags
  316. * Flags to control autonegotiation. Bit 0 is autonegotiation
  317. * enable/disable to maintain backward compatibility.
  318. * @param link_info Link speed to program. If the speed is zero and autonegotiation
  319. * is enabled, all possible negotiation speeds are advertised.
  320. *
  321. * Return: Zero on success, negative on failure
  322. */
  323. int cvmx_helper_board_link_set_phy(int phy_addr,
  324. cvmx_helper_board_set_phy_link_flags_types_t link_flags,
  325. cvmx_helper_link_info_t link_info);
  326. /**
  327. * @INTERNAL
  328. * This function is the board specific method of determining an
  329. * ethernet ports link speed. Most Octeon boards have Marvell PHYs
  330. * and are handled by the fall through case. This function must be
  331. * updated for boards that don't have the normal Marvell PHYs.
  332. *
  333. * This function must be modified for every new Octeon board.
  334. * Internally it uses switch statements based on the cvmx_sysinfo
  335. * data to determine board types and revisions. It relies on the
  336. * fact that every Octeon board receives a unique board type
  337. * enumeration from the bootloader.
  338. *
  339. * @param ipd_port IPD input port associated with the port we want to get link
  340. * status for.
  341. *
  342. * Return: The ports link status. If the link isn't fully resolved, this must
  343. * return zero.
  344. */
  345. cvmx_helper_link_info_t __cvmx_helper_board_link_get(int ipd_port);
  346. /**
  347. * @INTERNAL
  348. * This function is called by cvmx_helper_interface_probe() after it
  349. * determines the number of ports Octeon can support on a specific
  350. * interface. This function is the per board location to override
  351. * this value. It is called with the number of ports Octeon might
  352. * support and should return the number of actual ports on the
  353. * board.
  354. *
  355. * This function must be modified for every new Octeon board.
  356. * Internally it uses switch statements based on the cvmx_sysinfo
  357. * data to determine board types and revisions. It relies on the
  358. * fact that every Octeon board receives a unique board type
  359. * enumeration from the bootloader.
  360. *
  361. * @param interface Interface to probe
  362. * @param supported_ports
  363. * Number of ports Octeon supports.
  364. *
  365. * Return: Number of ports the actual board supports. Many times this will
  366. * simple be "support_ports".
  367. */
  368. int __cvmx_helper_board_interface_probe(int interface, int supported_ports);
  369. /**
  370. * @INTERNAL
  371. * Enable packet input/output from the hardware. This function is
  372. * called after by cvmx_helper_packet_hardware_enable() to
  373. * perform board specific initialization. For most boards
  374. * nothing is needed.
  375. *
  376. * @param interface Interface to enable
  377. *
  378. * Return: Zero on success, negative on failure
  379. */
  380. int __cvmx_helper_board_hardware_enable(int interface);
  381. /**
  382. * @INTERNAL
  383. * Gets the clock type used for the USB block based on board type.
  384. * Used by the USB code for auto configuration of clock type.
  385. *
  386. * Return: USB clock type enumeration
  387. */
  388. cvmx_helper_board_usb_clock_types_t __cvmx_helper_board_usb_get_clock_type(void);
  389. /**
  390. * @INTERNAL
  391. * Adjusts the number of available USB ports on Octeon based on board
  392. * specifics.
  393. *
  394. * @param supported_ports expected number of ports based on chip type;
  395. *
  396. *
  397. * Return: number of available usb ports, based on board specifics.
  398. * Return value is supported_ports if function does not
  399. * override.
  400. */
  401. int __cvmx_helper_board_usb_get_num_ports(int supported_ports);
  402. /**
  403. * @INTERNAL
  404. * Returns if a port is present on an interface
  405. *
  406. * @param fdt_addr - address fo flat device tree
  407. * @param ipd_port - IPD port number
  408. *
  409. * Return: 1 if port is present, 0 if not present, -1 if error
  410. */
  411. int __cvmx_helper_board_get_port_from_dt(void *fdt_addr, int ipd_port);
  412. /**
  413. * Return the host mode for the PHY. Currently only the Cortina CS4321 PHY
  414. * needs this.
  415. *
  416. * @param ipd_port - ipd port number to get the host mode for
  417. *
  418. * Return: host mode for phy
  419. */
  420. cvmx_phy_host_mode_t cvmx_helper_board_get_phy_host_mode(int ipd_port);
  421. /**
  422. * @INTERNAL
  423. * This function outputs the cvmx_phy_info_t data structure for the specified
  424. * port.
  425. *
  426. * @param[out] - phy_info - phy info data structure
  427. * @param ipd_port - port to get phy info for
  428. *
  429. * Return: 0 for success, -1 if info not available
  430. *
  431. * NOTE: The phy_info data structure is subject to change.
  432. */
  433. int cvmx_helper_board_get_phy_info(cvmx_phy_info_t *phy_info, int ipd_port);
  434. /**
  435. * @INTERNAL
  436. * Parse the device tree and set whether a port is valid or not.
  437. *
  438. * @param fdt_addr Pointer to device tree
  439. *
  440. * Return: 0 for success, -1 on error.
  441. */
  442. int __cvmx_helper_parse_bgx_dt(const void *fdt_addr);
  443. /**
  444. * @INTERNAL
  445. * Parse the device tree and set whether a port is valid or not.
  446. *
  447. * @param fdt_addr Pointer to device tree
  448. *
  449. * Return: 0 for success, -1 on error.
  450. */
  451. int __cvmx_helper_parse_bgx_rgmii_dt(const void *fdt_addr);
  452. /**
  453. * @INTERNAL
  454. * Updates any GPIO link LEDs if present
  455. *
  456. * @param xiface Interface number
  457. * @param index Port index
  458. * @param result Link status result
  459. */
  460. void cvmx_helper_update_link_led(int xiface, int index, cvmx_helper_link_info_t result);
  461. /**
  462. * Update the RX activity LED for the specified interface and port index
  463. *
  464. * @param xiface Interface number
  465. * @param index Port index
  466. * @parma check_time True if we should bail out before the polling interval
  467. */
  468. void cvmx_update_rx_activity_led(int xiface, int index, bool check_time);
  469. /**
  470. * @INTERNAL
  471. * Figure out which mod_abs changed function to use based on the phy type
  472. *
  473. * @param xiface xinterface number
  474. * @param index port index on interface
  475. *
  476. * Return: 0 for success, -1 on error
  477. *
  478. * This function figures out the proper mod_abs_changed function to use and
  479. * registers the appropriate function. This should be called after the device
  480. * tree has been fully parsed for the given port as well as after all SFP
  481. * slots and any Microsemi VSC7224 devices have been parsed in the device tree.
  482. */
  483. int cvmx_helper_phy_register_mod_abs_changed(int xiface, int index);
  484. /**
  485. * @INTERNAL
  486. * Return loss of signal
  487. *
  488. * @param xiface xinterface number
  489. * @param index port index on interface
  490. *
  491. * Return: 0 if signal present, 1 if loss of signal.
  492. *
  493. * @NOTE: A result of 0 is possible in some cases where the signal is
  494. * not present.
  495. *
  496. * This is for use with __cvmx_qlm_rx_equilization
  497. */
  498. int __cvmx_helper_get_los(int xiface, int index);
  499. /**
  500. * Given the address of the MDIO registers, output the CPU node and MDIO bus
  501. *
  502. * @param addr 64-bit address of MDIO registers (from device tree)
  503. * @param[out] node CPU node number (78xx)
  504. * @param[out] bus MDIO bus number
  505. */
  506. void __cvmx_mdio_addr_to_node_bus(u64 addr, int *node, int *bus);
  507. /**
  508. * Turn on the error LED
  509. *
  510. * @param leds LEDs belonging to port
  511. * @param error true to turn on LED, false to turn off
  512. */
  513. void cvmx_helper_leds_show_error(struct cvmx_phy_gpio_leds *leds, bool error);
  514. #endif /* __CVMX_HELPER_BOARD_H__ */