stm32prog_serial.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <console.h>
  7. #include <dm.h>
  8. #include <dfu.h>
  9. #include <malloc.h>
  10. #include <serial.h>
  11. #include <watchdog.h>
  12. #include <asm/arch/sys_proto.h>
  13. #include <dm/lists.h>
  14. #include <dm/device-internal.h>
  15. #include <linux/delay.h>
  16. #include <asm/global_data.h>
  17. #include "stm32prog.h"
  18. /* - configuration part -----------------------------*/
  19. #define USART_BL_VERSION 0x40 /* USART bootloader version V4.0*/
  20. #define UBOOT_BL_VERSION 0x03 /* bootloader version V0.3*/
  21. #define USART_RAM_BUFFER_SIZE 256 /* Size of USART_RAM_Buf buffer*/
  22. /* - Commands -----------------------------*/
  23. #define GET_CMD_COMMAND 0x00 /* Get CMD command*/
  24. #define GET_VER_COMMAND 0x01 /* Get Version command*/
  25. #define GET_ID_COMMAND 0x02 /* Get ID command*/
  26. #define GET_PHASE_COMMAND 0x03 /* Get Phase command*/
  27. #define RM_COMMAND 0x11 /* Read Memory command*/
  28. #define READ_PART_COMMAND 0x12 /* Read Partition command*/
  29. #define START_COMMAND 0x21 /* START command (Go)*/
  30. #define DOWNLOAD_COMMAND 0x31 /* Download command*/
  31. /* existing command for other STM32 but not used */
  32. /* ERASE 0x43 */
  33. /* EXTENDED_ERASE 0x44 */
  34. /* WRITE_UNPROTECTED 0x73 */
  35. /* READOUT_PROTECT 0x82 */
  36. /* READOUT_UNPROTECT 0x92 */
  37. /* - miscellaneous defines ----------------------------------------*/
  38. #define INIT_BYTE 0x7F /*Init Byte ID*/
  39. #define ACK_BYTE 0x79 /*Acknowlede Byte ID*/
  40. #define NACK_BYTE 0x1F /*No Acknowlede Byte ID*/
  41. #define ABORT_BYTE 0x5F /*ABORT*/
  42. struct udevice *down_serial_dev;
  43. const u8 cmd_id[] = {
  44. GET_CMD_COMMAND,
  45. GET_VER_COMMAND,
  46. GET_ID_COMMAND,
  47. GET_PHASE_COMMAND,
  48. RM_COMMAND,
  49. READ_PART_COMMAND,
  50. START_COMMAND,
  51. DOWNLOAD_COMMAND
  52. };
  53. #define NB_CMD sizeof(cmd_id)
  54. /* with 115200 bauds, 20 ms allow to receive the 256 bytes buffer */
  55. #define TIMEOUT_SERIAL_BUFFER 30
  56. /* DFU support for serial *********************************************/
  57. static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
  58. {
  59. int alt_id;
  60. if (!data->cur_part)
  61. if (data->phase == PHASE_FLASHLAYOUT)
  62. alt_id = 0;
  63. else
  64. return NULL;
  65. else
  66. alt_id = data->cur_part->alt_id;
  67. return dfu_get_entity(alt_id);
  68. }
  69. static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
  70. u32 buffer_size)
  71. {
  72. struct dfu_entity *dfu_entity;
  73. u8 ret = 0;
  74. dfu_entity = stm32prog_get_entity(data);
  75. if (!dfu_entity)
  76. return -ENODEV;
  77. ret = dfu_write(dfu_entity,
  78. buffer,
  79. buffer_size,
  80. data->dfu_seq);
  81. if (ret) {
  82. stm32prog_err("DFU write failed [%d] cnt: %d",
  83. ret, data->dfu_seq);
  84. }
  85. data->dfu_seq++;
  86. /* handle rollover as in driver/dfu/dfu.c */
  87. data->dfu_seq &= 0xffff;
  88. if (buffer_size == 0)
  89. data->dfu_seq = 0; /* flush done */
  90. return ret;
  91. }
  92. static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
  93. u8 *buffer, u32 buffer_size)
  94. {
  95. struct dfu_entity *dfu_entity;
  96. struct stm32prog_part_t *part;
  97. u32 size;
  98. int ret, i;
  99. if (data->dfu_seq) {
  100. stm32prog_err("DFU write pending for phase %d, seq %d",
  101. data->phase, data->dfu_seq);
  102. return -EINVAL;
  103. }
  104. if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
  105. stm32prog_err("read failed : phase %d is invalid", phase);
  106. return -EINVAL;
  107. }
  108. if (data->read_phase <= PHASE_LAST_USER &&
  109. phase != data->read_phase) {
  110. /* clear previous read session */
  111. dfu_entity = dfu_get_entity(data->read_phase - 1);
  112. if (dfu_entity)
  113. dfu_transaction_cleanup(dfu_entity);
  114. }
  115. dfu_entity = NULL;
  116. /* found partition for the expected phase */
  117. for (i = 0; i < data->part_nb; i++) {
  118. part = &data->part_array[i];
  119. if (part->id == phase)
  120. dfu_entity = dfu_get_entity(part->alt_id);
  121. }
  122. if (!dfu_entity) {
  123. stm32prog_err("read failed : phase %d is unknown", phase);
  124. return -ENODEV;
  125. }
  126. /* clear pending read before to force offset */
  127. if (dfu_entity->inited &&
  128. (data->read_phase != phase || data->offset != offset))
  129. dfu_transaction_cleanup(dfu_entity);
  130. /* initiate before to force offset */
  131. if (!dfu_entity->inited) {
  132. ret = dfu_transaction_initiate(dfu_entity, true);
  133. if (ret < 0) {
  134. stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
  135. ret, phase, offset);
  136. return ret;
  137. }
  138. }
  139. /* force new offset */
  140. if (dfu_entity->offset != offset)
  141. dfu_entity->offset = offset;
  142. data->offset = offset;
  143. data->read_phase = phase;
  144. log_debug("\nSTM32 download read %s offset=0x%x\n",
  145. dfu_entity->name, offset);
  146. ret = dfu_read(dfu_entity, buffer, buffer_size,
  147. dfu_entity->i_blk_seq_num);
  148. if (ret < 0) {
  149. stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
  150. ret, phase, offset);
  151. return ret;
  152. }
  153. size = ret;
  154. if (size < buffer_size) {
  155. data->offset = 0;
  156. data->read_phase = PHASE_END;
  157. memset(buffer + size, 0, buffer_size - size);
  158. } else {
  159. data->offset += size;
  160. }
  161. return ret;
  162. }
  163. /* UART access ***************************************************/
  164. int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
  165. {
  166. struct udevice *dev = NULL;
  167. struct dm_serial_ops *ops;
  168. /* no parity, 8 bits, 1 stop */
  169. u32 serial_config = SERIAL_DEFAULT_CONFIG;
  170. down_serial_dev = NULL;
  171. if (uclass_get_device_by_seq(UCLASS_SERIAL, link_dev, &dev)) {
  172. log_err("serial %d device not found\n", link_dev);
  173. return -ENODEV;
  174. }
  175. down_serial_dev = dev;
  176. /* force silent console on uart only when used */
  177. if (gd->cur_serial_dev == down_serial_dev)
  178. gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
  179. else
  180. gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
  181. ops = serial_get_ops(down_serial_dev);
  182. if (!ops) {
  183. log_err("serial %d = %s missing ops\n", link_dev, dev->name);
  184. return -ENODEV;
  185. }
  186. if (!ops->setconfig) {
  187. log_err("serial %d = %s missing setconfig\n", link_dev, dev->name);
  188. return -ENODEV;
  189. }
  190. clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
  191. data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
  192. USART_RAM_BUFFER_SIZE);
  193. return ops->setconfig(down_serial_dev, serial_config);
  194. }
  195. static void stm32prog_serial_flush(void)
  196. {
  197. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  198. int err;
  199. do {
  200. err = ops->getc(down_serial_dev);
  201. } while (err != -EAGAIN);
  202. }
  203. static int stm32prog_serial_getc_err(void)
  204. {
  205. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  206. int err;
  207. do {
  208. err = ops->getc(down_serial_dev);
  209. if (err == -EAGAIN) {
  210. ctrlc();
  211. WATCHDOG_RESET();
  212. }
  213. } while ((err == -EAGAIN) && (!had_ctrlc()));
  214. return err;
  215. }
  216. static u8 stm32prog_serial_getc(void)
  217. {
  218. int err;
  219. err = stm32prog_serial_getc_err();
  220. return err >= 0 ? err : 0;
  221. }
  222. static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
  223. {
  224. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  225. int err;
  226. ulong start = get_timer(0);
  227. do {
  228. err = ops->getc(down_serial_dev);
  229. if (err >= 0) {
  230. *buffer++ = err;
  231. *count -= 1;
  232. } else if (err == -EAGAIN) {
  233. ctrlc();
  234. WATCHDOG_RESET();
  235. if (get_timer(start) > TIMEOUT_SERIAL_BUFFER) {
  236. err = -ETIMEDOUT;
  237. break;
  238. }
  239. } else {
  240. break;
  241. }
  242. } while (*count && !had_ctrlc());
  243. return !!(err < 0);
  244. }
  245. static void stm32prog_serial_putc(u8 w_byte)
  246. {
  247. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  248. int err;
  249. do {
  250. err = ops->putc(down_serial_dev, w_byte);
  251. } while (err == -EAGAIN);
  252. }
  253. /* Helper function ************************************************/
  254. static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
  255. {
  256. u8 ret = 0;
  257. struct dfu_entity *dfu_entity;
  258. if (address < 0x100) {
  259. if (address == PHASE_OTP)
  260. return stm32prog_otp_start(data);
  261. if (address == PHASE_PMIC)
  262. return stm32prog_pmic_start(data);
  263. if (address == PHASE_RESET || address == PHASE_END) {
  264. data->cur_part = NULL;
  265. data->dfu_seq = 0;
  266. data->phase = address;
  267. return 0;
  268. }
  269. if (address != data->phase) {
  270. stm32prog_err("invalid received phase id %d, current phase is %d",
  271. (u8)address, (u8)data->phase);
  272. return -EINVAL;
  273. }
  274. }
  275. /* check the last loaded partition */
  276. if (address == DEFAULT_ADDRESS || address == data->phase) {
  277. switch (data->phase) {
  278. case PHASE_END:
  279. case PHASE_RESET:
  280. case PHASE_DO_RESET:
  281. data->cur_part = NULL;
  282. data->phase = PHASE_DO_RESET;
  283. return 0;
  284. }
  285. dfu_entity = stm32prog_get_entity(data);
  286. if (!dfu_entity)
  287. return -ENODEV;
  288. ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
  289. if (ret) {
  290. stm32prog_err("DFU flush failed [%d]", ret);
  291. return ret;
  292. }
  293. data->dfu_seq = 0;
  294. printf("\n received length = 0x%x\n", data->cursor);
  295. /* update DFU with received flashlayout */
  296. if (data->phase == PHASE_FLASHLAYOUT)
  297. stm32prog_dfu_init(data);
  298. } else {
  299. void (*entry)(void) = (void *)address;
  300. printf("## Starting application at 0x%x ...\n", address);
  301. (*entry)();
  302. printf("## Application terminated\n");
  303. ret = -ENOEXEC;
  304. }
  305. return ret;
  306. }
  307. /**
  308. * get_address() - Get address if it is valid
  309. *
  310. * @tmp_xor: Current xor value to update
  311. * Return: The address area
  312. */
  313. static u32 get_address(u8 *tmp_xor)
  314. {
  315. u32 address = 0x0;
  316. u8 data;
  317. data = stm32prog_serial_getc();
  318. *tmp_xor ^= data;
  319. address |= ((u32)data) << 24;
  320. data = stm32prog_serial_getc();
  321. address |= ((u32)data) << 16;
  322. *tmp_xor ^= data;
  323. data = stm32prog_serial_getc();
  324. address |= ((u32)data) << 8;
  325. *tmp_xor ^= data;
  326. data = stm32prog_serial_getc();
  327. address |= ((u32)data);
  328. *tmp_xor ^= data;
  329. return address;
  330. }
  331. static void stm32prog_serial_result(u8 result)
  332. {
  333. /* always flush fifo before to send result */
  334. stm32prog_serial_flush();
  335. stm32prog_serial_putc(result);
  336. }
  337. /* Command -----------------------------------------------*/
  338. /**
  339. * get_cmd_command() - Respond to Get command
  340. *
  341. * @data: Current command context
  342. */
  343. static void get_cmd_command(struct stm32prog_data *data)
  344. {
  345. u32 counter = 0x0;
  346. stm32prog_serial_putc(NB_CMD);
  347. stm32prog_serial_putc(USART_BL_VERSION);
  348. for (counter = 0; counter < NB_CMD; counter++)
  349. stm32prog_serial_putc(cmd_id[counter]);
  350. stm32prog_serial_result(ACK_BYTE);
  351. }
  352. /**
  353. * get_version_command() - Respond to Get Version command
  354. *
  355. * @data: Current command context
  356. */
  357. static void get_version_command(struct stm32prog_data *data)
  358. {
  359. stm32prog_serial_putc(UBOOT_BL_VERSION);
  360. stm32prog_serial_result(ACK_BYTE);
  361. }
  362. /**
  363. * get_id_command() - Respond to Get ID command
  364. *
  365. * @data: Current command context
  366. */
  367. static void get_id_command(struct stm32prog_data *data)
  368. {
  369. u32 cpu = get_cpu_dev();
  370. /* Send Device IDCode */
  371. stm32prog_serial_putc(0x1);
  372. stm32prog_serial_putc((cpu >> 8) & 0xFF);
  373. stm32prog_serial_putc(cpu & 0xFF);
  374. stm32prog_serial_result(ACK_BYTE);
  375. }
  376. /**
  377. * get_phase_command() - Respond to Get phase
  378. *
  379. * @data: Current command context
  380. */
  381. static void get_phase_command(struct stm32prog_data *data)
  382. {
  383. char *err_msg = NULL;
  384. u8 i, length = 0;
  385. u32 destination = DEFAULT_ADDRESS; /* destination address */
  386. int phase = data->phase;
  387. if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
  388. err_msg = stm32prog_get_error(data);
  389. length = strlen(err_msg);
  390. }
  391. if (phase == PHASE_FLASHLAYOUT)
  392. destination = STM32_DDR_BASE;
  393. stm32prog_serial_putc(length + 5); /* Total length */
  394. stm32prog_serial_putc(phase & 0xFF); /* partition ID */
  395. stm32prog_serial_putc(destination); /* byte 1 of address */
  396. stm32prog_serial_putc(destination >> 8); /* byte 2 of address */
  397. stm32prog_serial_putc(destination >> 16); /* byte 3 of address */
  398. stm32prog_serial_putc(destination >> 24); /* byte 4 of address */
  399. stm32prog_serial_putc(length); /* Information length */
  400. for (i = 0; i < length; i++)
  401. stm32prog_serial_putc(err_msg[i]);
  402. stm32prog_serial_result(ACK_BYTE);
  403. if (phase == PHASE_RESET)
  404. stm32prog_do_reset(data);
  405. }
  406. /**
  407. * read_memory_command() - Read data from memory
  408. *
  409. * @data: Current command context
  410. */
  411. static void read_memory_command(struct stm32prog_data *data)
  412. {
  413. u32 address = 0x0;
  414. u8 rcv_data = 0x0, tmp_xor = 0x0;
  415. u32 counter = 0x0;
  416. /* Read memory address */
  417. address = get_address(&tmp_xor);
  418. /* If address memory is not received correctly */
  419. rcv_data = stm32prog_serial_getc();
  420. if (rcv_data != tmp_xor) {
  421. stm32prog_serial_result(NACK_BYTE);
  422. return;
  423. }
  424. stm32prog_serial_result(ACK_BYTE);
  425. /* Read the number of bytes to be received:
  426. * Max NbrOfData = Data + 1 = 256
  427. */
  428. rcv_data = stm32prog_serial_getc();
  429. tmp_xor = ~rcv_data;
  430. if (stm32prog_serial_getc() != tmp_xor) {
  431. stm32prog_serial_result(NACK_BYTE);
  432. return;
  433. }
  434. /* If checksum is correct send ACK */
  435. stm32prog_serial_result(ACK_BYTE);
  436. /* Send data to the host:
  437. * Number of data to read = data + 1
  438. */
  439. for (counter = (rcv_data + 1); counter != 0; counter--)
  440. stm32prog_serial_putc(*(u8 *)(address++));
  441. }
  442. /**
  443. * start_command() - Respond to start command
  444. *
  445. * Jump to user application in RAM or partition check
  446. *
  447. * @data: Current command context
  448. */
  449. static void start_command(struct stm32prog_data *data)
  450. {
  451. u32 address = 0;
  452. u8 tmp_xor = 0x0;
  453. u8 ret, rcv_data;
  454. /* Read memory address */
  455. address = get_address(&tmp_xor);
  456. /* If address memory is not received correctly */
  457. rcv_data = stm32prog_serial_getc();
  458. if (rcv_data != tmp_xor) {
  459. stm32prog_serial_result(NACK_BYTE);
  460. return;
  461. }
  462. /* validate partition */
  463. ret = stm32prog_start(data,
  464. address);
  465. if (ret)
  466. stm32prog_serial_result(ABORT_BYTE);
  467. else
  468. stm32prog_serial_result(ACK_BYTE);
  469. }
  470. /**
  471. * download_command() - Respond to download command
  472. *
  473. * Write data to not volatile memory, Flash
  474. *
  475. * @data: Current command context
  476. */
  477. static void download_command(struct stm32prog_data *data)
  478. {
  479. u32 address = 0x0;
  480. u8 my_xor = 0x0;
  481. u8 rcv_xor;
  482. u32 counter = 0x0, codesize = 0x0;
  483. u8 *ramaddress = 0;
  484. u8 rcv_data = 0x0;
  485. u32 cursor = data->cursor;
  486. long size = 0;
  487. u8 operation;
  488. u32 packet_number;
  489. u32 result = ACK_BYTE;
  490. u8 ret;
  491. bool error;
  492. int rcv;
  493. address = get_address(&my_xor);
  494. /* If address memory is not received correctly */
  495. rcv_xor = stm32prog_serial_getc();
  496. if (rcv_xor != my_xor) {
  497. result = NACK_BYTE;
  498. goto end;
  499. }
  500. /* If address valid send ACK */
  501. stm32prog_serial_result(ACK_BYTE);
  502. /* get packet number and operation type */
  503. operation = (u8)((u32)address >> 24);
  504. packet_number = ((u32)(((u32)address << 8))) >> 8;
  505. switch (operation) {
  506. /* supported operation */
  507. case PHASE_FLASHLAYOUT:
  508. case PHASE_OTP:
  509. case PHASE_PMIC:
  510. break;
  511. default:
  512. result = NACK_BYTE;
  513. goto end;
  514. }
  515. /* check the packet number */
  516. if (packet_number == 0) {
  517. /* erase: re-initialize the image_header struct */
  518. data->packet_number = 0;
  519. cursor = 0;
  520. data->cursor = 0;
  521. /*idx = cursor;*/
  522. } else {
  523. data->packet_number++;
  524. }
  525. /* Check with the number of current packet if the device receive
  526. * the true packet
  527. */
  528. if (packet_number != data->packet_number) {
  529. data->packet_number--;
  530. result = NACK_BYTE;
  531. goto end;
  532. }
  533. /*-- Read number of bytes to be written and data -----------*/
  534. /* Read the number of bytes to be written:
  535. * Max NbrOfData = data + 1 <= 256
  536. */
  537. rcv_data = stm32prog_serial_getc();
  538. /* NbrOfData to write = data + 1 */
  539. codesize = rcv_data + 0x01;
  540. if (codesize > USART_RAM_BUFFER_SIZE) {
  541. result = NACK_BYTE;
  542. goto end;
  543. }
  544. /* Checksum Initialization */
  545. my_xor = rcv_data;
  546. /* UART receive data and send to Buffer */
  547. counter = codesize;
  548. error = stm32prog_serial_get_buffer(data->buffer, &counter);
  549. /* read checksum */
  550. if (!error) {
  551. rcv = stm32prog_serial_getc_err();
  552. error = !!(rcv < 0);
  553. rcv_xor = rcv;
  554. }
  555. if (error) {
  556. printf("transmission error on packet %d, byte %d\n",
  557. packet_number, codesize - counter);
  558. /* waiting end of packet before flush & NACK */
  559. mdelay(TIMEOUT_SERIAL_BUFFER);
  560. data->packet_number--;
  561. result = NACK_BYTE;
  562. goto end;
  563. }
  564. /* Compute Checksum */
  565. ramaddress = data->buffer;
  566. for (counter = codesize; counter != 0; counter--)
  567. my_xor ^= *(ramaddress++);
  568. /* If Checksum is incorrect */
  569. if (rcv_xor != my_xor) {
  570. printf("checksum error on packet %d\n",
  571. packet_number);
  572. /* wait to be sure that all data are received
  573. * in the FIFO before flush
  574. */
  575. mdelay(TIMEOUT_SERIAL_BUFFER);
  576. data->packet_number--;
  577. result = NACK_BYTE;
  578. goto end;
  579. }
  580. switch (operation) {
  581. case PHASE_OTP:
  582. size = codesize;
  583. ret = stm32prog_otp_write(data, cursor, data->buffer, &size);
  584. break;
  585. case PHASE_PMIC:
  586. size = codesize;
  587. ret = stm32prog_pmic_write(data, cursor, data->buffer, &size);
  588. break;
  589. default:
  590. ret = stm32prog_write(data, data->buffer, codesize);
  591. break;
  592. }
  593. if (ret)
  594. result = ABORT_BYTE;
  595. else
  596. /* Update current position in buffer */
  597. data->cursor += codesize;
  598. end:
  599. stm32prog_serial_result(result);
  600. }
  601. /**
  602. * read_partition() - Respond to read command
  603. *
  604. * Read data from not volatile memory, Flash
  605. *
  606. * @data: Current command context
  607. */
  608. static void read_partition_command(struct stm32prog_data *data)
  609. {
  610. u32 i, part_id, codesize, offset = 0, rcv_data;
  611. long size;
  612. u8 tmp_xor;
  613. int res;
  614. u8 buffer[256];
  615. part_id = stm32prog_serial_getc();
  616. tmp_xor = part_id;
  617. offset = get_address(&tmp_xor);
  618. rcv_data = stm32prog_serial_getc();
  619. if (rcv_data != tmp_xor) {
  620. log_debug("1st checksum received = %x, computed %x\n",
  621. rcv_data, tmp_xor);
  622. goto error;
  623. }
  624. stm32prog_serial_putc(ACK_BYTE);
  625. /* NbrOfData to read = data + 1 */
  626. rcv_data = stm32prog_serial_getc();
  627. codesize = rcv_data + 0x01;
  628. tmp_xor = rcv_data;
  629. rcv_data = stm32prog_serial_getc();
  630. if ((rcv_data ^ tmp_xor) != 0xFF) {
  631. log_debug("2nd checksum received = %x, computed %x\n",
  632. rcv_data, tmp_xor);
  633. goto error;
  634. }
  635. log_debug("%s : %x\n", __func__, part_id);
  636. rcv_data = 0;
  637. switch (part_id) {
  638. case PHASE_OTP:
  639. size = codesize;
  640. if (!stm32prog_otp_read(data, offset, buffer, &size))
  641. rcv_data = size;
  642. break;
  643. case PHASE_PMIC:
  644. size = codesize;
  645. if (!stm32prog_pmic_read(data, offset, buffer, &size))
  646. rcv_data = size;
  647. break;
  648. default:
  649. res = stm32prog_read(data, part_id, offset,
  650. buffer, codesize);
  651. if (res > 0)
  652. rcv_data = res;
  653. break;
  654. }
  655. if (rcv_data > 0) {
  656. stm32prog_serial_putc(ACK_BYTE);
  657. /*----------- Send data to the host -----------*/
  658. for (i = 0; i < rcv_data; i++)
  659. stm32prog_serial_putc(buffer[i]);
  660. /*----------- Send filler to the host -----------*/
  661. for (; i < codesize; i++)
  662. stm32prog_serial_putc(0x0);
  663. return;
  664. }
  665. stm32prog_serial_result(ABORT_BYTE);
  666. return;
  667. error:
  668. stm32prog_serial_result(NACK_BYTE);
  669. }
  670. /* MAIN function = SERIAL LOOP ***********************************************/
  671. /**
  672. * stm32prog_serial_loop() - USART bootloader Loop routine
  673. *
  674. * @data: Current command context
  675. * Return: true if reset is needed after loop
  676. */
  677. bool stm32prog_serial_loop(struct stm32prog_data *data)
  678. {
  679. u32 counter = 0x0;
  680. u8 command = 0x0;
  681. u8 found;
  682. int phase = data->phase;
  683. /* element of cmd_func need to aligned with cmd_id[]*/
  684. void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
  685. /* GET_CMD_COMMAND */ get_cmd_command,
  686. /* GET_VER_COMMAND */ get_version_command,
  687. /* GET_ID_COMMAND */ get_id_command,
  688. /* GET_PHASE_COMMAND */ get_phase_command,
  689. /* RM_COMMAND */ read_memory_command,
  690. /* READ_PART_COMMAND */ read_partition_command,
  691. /* START_COMMAND */ start_command,
  692. /* DOWNLOAD_COMMAND */ download_command
  693. };
  694. /* flush and NACK pending command received during u-boot init
  695. * request command reemit
  696. */
  697. stm32prog_serial_result(NACK_BYTE);
  698. clear_ctrlc(); /* forget any previous Control C */
  699. while (!had_ctrlc()) {
  700. phase = data->phase;
  701. if (phase == PHASE_DO_RESET)
  702. return true;
  703. /* Get the user command: read first byte */
  704. command = stm32prog_serial_getc();
  705. if (command == INIT_BYTE) {
  706. puts("\nConnected\n");
  707. stm32prog_serial_result(ACK_BYTE);
  708. continue;
  709. }
  710. found = 0;
  711. for (counter = 0; counter < NB_CMD; counter++)
  712. if (cmd_id[counter] == command) {
  713. found = 1;
  714. break;
  715. }
  716. if (found)
  717. if ((command ^ stm32prog_serial_getc()) != 0xFF)
  718. found = 0;
  719. if (!found) {
  720. /* wait to be sure that all data are received
  721. * in the FIFO before flush (CMD and XOR)
  722. */
  723. mdelay(3);
  724. stm32prog_serial_result(NACK_BYTE);
  725. } else {
  726. stm32prog_serial_result(ACK_BYTE);
  727. cmd_func[counter](data);
  728. }
  729. WATCHDOG_RESET();
  730. }
  731. /* clean device */
  732. if (gd->cur_serial_dev == down_serial_dev) {
  733. /* restore console on uart */
  734. gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
  735. }
  736. down_serial_dev = NULL;
  737. return false; /* no reset after ctrlc */
  738. }