ap.h 1.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2010-2015
  4. * NVIDIA Corporation <www.nvidia.com>
  5. */
  6. #include <asm/types.h>
  7. /* Stabilization delays, in usec */
  8. #define PLL_STABILIZATION_DELAY (300)
  9. #define IO_STABILIZATION_DELAY (1000)
  10. #define PLLX_ENABLED (1 << 30)
  11. #define CCLK_BURST_POLICY 0x20008888
  12. #define SUPER_CCLK_DIVIDER 0x80000000
  13. /* Calculate clock fractional divider value from ref and target frequencies */
  14. #define CLK_DIVIDER(REF, FREQ) ((((REF) * 2) / FREQ) - 2)
  15. /* Calculate clock frequency value from reference and clock divider value */
  16. #define CLK_FREQUENCY(REF, REG) (((REF) * 2) / (REG + 2))
  17. /* AVP/CPU ID */
  18. #define PG_UP_TAG_0_PID_CPU 0x55555555 /* CPU aka "a9" aka "mpcore" */
  19. #define PG_UP_TAG_0 0x0
  20. /* AP base physical address of internal SRAM */
  21. #define NV_PA_BASE_SRAM 0x40000000
  22. #define EXCEP_VECTOR_CPU_RESET_VECTOR (NV_PA_EVP_BASE + 0x100)
  23. #define CSITE_CPU_DBG0_LAR (NV_PA_CSITE_BASE + 0x10FB0)
  24. #define CSITE_CPU_DBG1_LAR (NV_PA_CSITE_BASE + 0x12FB0)
  25. #define FLOW_CTLR_HALT_COP_EVENTS (NV_PA_FLOW_BASE + 4)
  26. #define FLOW_MODE_STOP 2
  27. #define HALT_COP_EVENT_JTAG (1 << 28)
  28. #define HALT_COP_EVENT_IRQ_1 (1 << 11)
  29. #define HALT_COP_EVENT_FIQ_1 (1 << 9)
  30. /* This is the main entry into U-Boot, used by the Cortex-A9 */
  31. extern void _start(void);
  32. /**
  33. * Works out the SOC/SKU type used for clocks settings
  34. *
  35. * Return: SOC type - see TEGRA_SOC...
  36. */
  37. int tegra_get_chip_sku(void);
  38. /**
  39. * Returns the pure SOC (chip ID) from the HIDREV register
  40. *
  41. * Return: SOC ID - see CHIPID_TEGRAxx...
  42. */
  43. int tegra_get_chip(void);
  44. /**
  45. * Returns the SKU ID from the sku_info register
  46. *
  47. * Return: SKU ID - see SKU_ID_Txx...
  48. */
  49. int tegra_get_sku_info(void);
  50. /* Do any chip-specific cache config */
  51. void config_cache(void);
  52. #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
  53. bool tegra_cpu_is_non_secure(void);
  54. #endif