xhci-brcm.c 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2019 Broadcom.
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <fdtdec.h>
  8. #include <usb.h>
  9. #include <asm/io.h>
  10. #include <usb/xhci.h>
  11. #define DRD2U3H_XHC_REGS_AXIWRA 0xC08
  12. #define DRD2U3H_XHC_REGS_AXIRDA 0xC0C
  13. #define USBAXI_CACHE 0xF
  14. #define USBAXI_PROT 0x8
  15. #define USBAXI_SA_MASK 0x1FF
  16. #define USBAXI_UA_MASK (0x1FF << 16)
  17. #define USBAXI_SA_VAL ((USBAXI_CACHE << 4) | USBAXI_PROT)
  18. #define USBAXI_UA_VAL (USBAXI_SA_VAL << 16)
  19. #define USBAXI_SA_UA_MASK (USBAXI_UA_MASK | USBAXI_SA_MASK)
  20. #define USBAXI_SA_UA_VAL (USBAXI_UA_VAL | USBAXI_SA_VAL)
  21. struct brcm_xhci_platdata {
  22. unsigned int arcache;
  23. unsigned int awcache;
  24. void __iomem *hc_base;
  25. };
  26. static int xhci_brcm_probe(struct udevice *dev)
  27. {
  28. struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
  29. struct xhci_hcor *hcor;
  30. struct xhci_hccr *hcd;
  31. int len, ret = 0;
  32. if (!plat) {
  33. dev_err(dev, "Can't get xHCI Plat data\n");
  34. return -ENOMEM;
  35. }
  36. hcd = dev_read_addr_ptr(dev);
  37. if (!hcd) {
  38. dev_err(dev, "Can't get the xHCI register base address\n");
  39. return -ENXIO;
  40. }
  41. plat->hc_base = hcd;
  42. len = HC_LENGTH(xhci_readl(&hcd->cr_capbase));
  43. hcor = (struct xhci_hcor *)(plat->hc_base + len);
  44. /* Save the default values of AXI read and write attributes */
  45. plat->awcache = readl(plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA);
  46. plat->arcache = readl(plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA);
  47. /* Enable AXI write attributes */
  48. clrsetbits_le32(plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA,
  49. USBAXI_SA_UA_MASK, USBAXI_SA_UA_VAL);
  50. /* Enable AXI read attributes */
  51. clrsetbits_le32(plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA,
  52. USBAXI_SA_UA_MASK, USBAXI_SA_UA_VAL);
  53. ret = xhci_register(dev, hcd, hcor);
  54. if (ret)
  55. dev_err(dev, "Failed to register xHCI\n");
  56. return ret;
  57. }
  58. static int xhci_brcm_deregister(struct udevice *dev)
  59. {
  60. struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
  61. /* Restore the default values for AXI read and write attributes */
  62. writel(plat->awcache, plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA);
  63. writel(plat->arcache, plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA);
  64. return xhci_deregister(dev);
  65. }
  66. static const struct udevice_id xhci_brcm_ids[] = {
  67. { .compatible = "brcm,generic-xhci" },
  68. { }
  69. };
  70. U_BOOT_DRIVER(usb_xhci) = {
  71. .name = "xhci_brcm",
  72. .id = UCLASS_USB,
  73. .probe = xhci_brcm_probe,
  74. .remove = xhci_brcm_deregister,
  75. .ops = &xhci_usb_ops,
  76. .of_match = xhci_brcm_ids,
  77. .platdata_auto_alloc_size = sizeof(struct brcm_xhci_platdata),
  78. .priv_auto_alloc_size = sizeof(struct xhci_ctrl),
  79. .flags = DM_FLAG_ALLOC_PRIV_DMA,
  80. };