pci_rom.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2014 Google, Inc
  4. *
  5. * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
  6. *
  7. * Modifications are:
  8. * Copyright (C) 2003-2004 Linux Networx
  9. * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
  10. * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
  11. * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
  12. * Copyright (C) 2005-2006 Tyan
  13. * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
  14. * Copyright (C) 2005-2009 coresystems GmbH
  15. * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
  16. *
  17. * PCI Bus Services, see include/linux/pci.h for further explanation.
  18. *
  19. * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
  20. * David Mosberger-Tang
  21. *
  22. * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
  23. */
  24. #include <common.h>
  25. #include <bios_emul.h>
  26. #include <dm.h>
  27. #include <errno.h>
  28. #include <init.h>
  29. #include <malloc.h>
  30. #include <pci.h>
  31. #include <pci_rom.h>
  32. #include <vbe.h>
  33. #include <video.h>
  34. #include <video_fb.h>
  35. #include <acpi/acpi_s3.h>
  36. #include <linux/screen_info.h>
  37. DECLARE_GLOBAL_DATA_PTR;
  38. __weak bool board_should_run_oprom(struct udevice *dev)
  39. {
  40. #if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
  41. if (gd->arch.prev_sleep_state == ACPI_S3) {
  42. if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
  43. return true;
  44. else
  45. return false;
  46. }
  47. #endif
  48. return true;
  49. }
  50. __weak bool board_should_load_oprom(struct udevice *dev)
  51. {
  52. return true;
  53. }
  54. __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
  55. {
  56. return vendev;
  57. }
  58. static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
  59. {
  60. struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
  61. struct pci_rom_header *rom_header;
  62. struct pci_rom_data *rom_data;
  63. u16 rom_vendor, rom_device;
  64. u32 rom_class;
  65. u32 vendev;
  66. u32 mapped_vendev;
  67. u32 rom_address;
  68. vendev = pplat->vendor << 16 | pplat->device;
  69. mapped_vendev = board_map_oprom_vendev(vendev);
  70. if (vendev != mapped_vendev)
  71. debug("Device ID mapped to %#08x\n", mapped_vendev);
  72. #ifdef CONFIG_VGA_BIOS_ADDR
  73. rom_address = CONFIG_VGA_BIOS_ADDR;
  74. #else
  75. dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
  76. if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
  77. debug("%s: rom_address=%x\n", __func__, rom_address);
  78. return -ENOENT;
  79. }
  80. /* Enable expansion ROM address decoding. */
  81. dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
  82. rom_address | PCI_ROM_ADDRESS_ENABLE);
  83. #endif
  84. debug("Option ROM address %x\n", rom_address);
  85. rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
  86. debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
  87. le16_to_cpu(rom_header->signature),
  88. rom_header->size * 512, le16_to_cpu(rom_header->data));
  89. if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
  90. printf("Incorrect expansion ROM header signature %04x\n",
  91. le16_to_cpu(rom_header->signature));
  92. #ifndef CONFIG_VGA_BIOS_ADDR
  93. /* Disable expansion ROM address decoding */
  94. dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
  95. #endif
  96. return -EINVAL;
  97. }
  98. rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
  99. rom_vendor = le16_to_cpu(rom_data->vendor);
  100. rom_device = le16_to_cpu(rom_data->device);
  101. debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
  102. rom_vendor, rom_device);
  103. /* If the device id is mapped, a mismatch is expected */
  104. if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
  105. (vendev == mapped_vendev)) {
  106. printf("ID mismatch: vendor ID %04x, device ID %04x\n",
  107. rom_vendor, rom_device);
  108. /* Continue anyway */
  109. }
  110. rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
  111. debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
  112. rom_class, rom_data->type);
  113. if (pplat->class != rom_class) {
  114. debug("Class Code mismatch ROM %06x, dev %06x\n",
  115. rom_class, pplat->class);
  116. }
  117. *hdrp = rom_header;
  118. return 0;
  119. }
  120. /**
  121. * pci_rom_load() - Load a ROM image and return a pointer to it
  122. *
  123. * @rom_header: Pointer to ROM image
  124. * @ram_headerp: Returns a pointer to the image in RAM
  125. * @allocedp: Returns true if @ram_headerp was allocated and needs
  126. * to be freed
  127. * @return 0 if OK, -ve on error. Note that @allocedp is set up regardless of
  128. * the error state. Even if this function returns an error, it may have
  129. * allocated memory.
  130. */
  131. static int pci_rom_load(struct pci_rom_header *rom_header,
  132. struct pci_rom_header **ram_headerp, bool *allocedp)
  133. {
  134. struct pci_rom_data *rom_data;
  135. unsigned int rom_size;
  136. unsigned int image_size = 0;
  137. void *target;
  138. *allocedp = false;
  139. do {
  140. /* Get next image, until we see an x86 version */
  141. rom_header = (struct pci_rom_header *)((void *)rom_header +
  142. image_size);
  143. rom_data = (struct pci_rom_data *)((void *)rom_header +
  144. le16_to_cpu(rom_header->data));
  145. image_size = le16_to_cpu(rom_data->ilen) * 512;
  146. } while ((rom_data->type != 0) && (rom_data->indicator == 0));
  147. if (rom_data->type != 0)
  148. return -EACCES;
  149. rom_size = rom_header->size * 512;
  150. #ifdef PCI_VGA_RAM_IMAGE_START
  151. target = (void *)PCI_VGA_RAM_IMAGE_START;
  152. #else
  153. target = (void *)malloc(rom_size);
  154. if (!target)
  155. return -ENOMEM;
  156. *allocedp = true;
  157. #endif
  158. if (target != rom_header) {
  159. ulong start = get_timer(0);
  160. debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
  161. rom_header, target, rom_size);
  162. memcpy(target, rom_header, rom_size);
  163. if (memcmp(target, rom_header, rom_size)) {
  164. printf("VGA ROM copy failed\n");
  165. return -EFAULT;
  166. }
  167. debug("Copy took %lums\n", get_timer(start));
  168. }
  169. *ram_headerp = target;
  170. return 0;
  171. }
  172. struct vbe_mode_info mode_info;
  173. void setup_video(struct screen_info *screen_info)
  174. {
  175. struct vesa_mode_info *vesa = &mode_info.vesa;
  176. /* Sanity test on VESA parameters */
  177. if (!vesa->x_resolution || !vesa->y_resolution)
  178. return;
  179. screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
  180. screen_info->lfb_width = vesa->x_resolution;
  181. screen_info->lfb_height = vesa->y_resolution;
  182. screen_info->lfb_depth = vesa->bits_per_pixel;
  183. screen_info->lfb_linelength = vesa->bytes_per_scanline;
  184. screen_info->lfb_base = vesa->phys_base_ptr;
  185. screen_info->lfb_size =
  186. ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
  187. 65536);
  188. screen_info->lfb_size >>= 16;
  189. screen_info->red_size = vesa->red_mask_size;
  190. screen_info->red_pos = vesa->red_mask_pos;
  191. screen_info->green_size = vesa->green_mask_size;
  192. screen_info->green_pos = vesa->green_mask_pos;
  193. screen_info->blue_size = vesa->blue_mask_size;
  194. screen_info->blue_pos = vesa->blue_mask_pos;
  195. screen_info->rsvd_size = vesa->reserved_mask_size;
  196. screen_info->rsvd_pos = vesa->reserved_mask_pos;
  197. }
  198. int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
  199. int exec_method)
  200. {
  201. struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
  202. struct pci_rom_header *rom = NULL, *ram = NULL;
  203. int vesa_mode = -1;
  204. bool emulate, alloced;
  205. int ret;
  206. /* Only execute VGA ROMs */
  207. if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
  208. debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
  209. PCI_CLASS_DISPLAY_VGA);
  210. return -ENODEV;
  211. }
  212. if (!board_should_load_oprom(dev))
  213. return log_msg_ret("Should not load OPROM", -ENXIO);
  214. ret = pci_rom_probe(dev, &rom);
  215. if (ret)
  216. return ret;
  217. ret = pci_rom_load(rom, &ram, &alloced);
  218. if (ret)
  219. goto err;
  220. if (!board_should_run_oprom(dev)) {
  221. ret = -ENXIO;
  222. goto err;
  223. }
  224. #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
  225. defined(CONFIG_FRAMEBUFFER_VESA_MODE)
  226. vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
  227. #endif
  228. debug("Selected vesa mode %#x\n", vesa_mode);
  229. if (exec_method & PCI_ROM_USE_NATIVE) {
  230. #ifdef CONFIG_X86
  231. emulate = false;
  232. #else
  233. if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
  234. printf("BIOS native execution is only available on x86\n");
  235. ret = -ENOSYS;
  236. goto err;
  237. }
  238. emulate = true;
  239. #endif
  240. } else {
  241. #ifdef CONFIG_BIOSEMU
  242. emulate = true;
  243. #else
  244. if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
  245. printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
  246. ret = -ENOSYS;
  247. goto err;
  248. }
  249. emulate = false;
  250. #endif
  251. }
  252. if (emulate) {
  253. #ifdef CONFIG_BIOSEMU
  254. BE_VGAInfo *info;
  255. ret = biosemu_setup(dev, &info);
  256. if (ret)
  257. goto err;
  258. biosemu_set_interrupt_handler(0x15, int15_handler);
  259. ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
  260. true, vesa_mode, &mode_info);
  261. if (ret)
  262. goto err;
  263. #endif
  264. } else {
  265. #if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
  266. bios_set_interrupt_handler(0x15, int15_handler);
  267. bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
  268. &mode_info);
  269. #endif
  270. }
  271. debug("Final vesa mode %#x\n", mode_info.video_mode);
  272. ret = 0;
  273. err:
  274. if (alloced)
  275. free(ram);
  276. return ret;
  277. }
  278. #ifdef CONFIG_DM_VIDEO
  279. int vbe_setup_video_priv(struct vesa_mode_info *vesa,
  280. struct video_priv *uc_priv,
  281. struct video_uc_platdata *plat)
  282. {
  283. if (!vesa->x_resolution)
  284. return log_msg_ret("No x resolution", -ENXIO);
  285. uc_priv->xsize = vesa->x_resolution;
  286. uc_priv->ysize = vesa->y_resolution;
  287. uc_priv->line_length = vesa->bytes_per_scanline;
  288. switch (vesa->bits_per_pixel) {
  289. case 32:
  290. case 24:
  291. uc_priv->bpix = VIDEO_BPP32;
  292. break;
  293. case 16:
  294. uc_priv->bpix = VIDEO_BPP16;
  295. break;
  296. default:
  297. return -EPROTONOSUPPORT;
  298. }
  299. plat->base = vesa->phys_base_ptr;
  300. plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
  301. return 0;
  302. }
  303. int vbe_setup_video(struct udevice *dev, int (*int15_handler)(void))
  304. {
  305. struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
  306. struct video_priv *uc_priv = dev_get_uclass_priv(dev);
  307. int ret;
  308. /* If we are running from EFI or coreboot, this can't work */
  309. if (!ll_boot_init()) {
  310. printf("Not available (previous bootloader prevents it)\n");
  311. return -EPERM;
  312. }
  313. bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
  314. ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
  315. PCI_ROM_ALLOW_FALLBACK);
  316. bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
  317. if (ret) {
  318. debug("failed to run video BIOS: %d\n", ret);
  319. return ret;
  320. }
  321. ret = vbe_setup_video_priv(&mode_info.vesa, uc_priv, plat);
  322. if (ret) {
  323. debug("No video mode configured\n");
  324. return ret;
  325. }
  326. printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
  327. mode_info.vesa.bits_per_pixel);
  328. return 0;
  329. }
  330. #endif