rcar_iic.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Renesas RCar IIC driver
  4. *
  5. * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
  6. *
  7. * Based on
  8. * Copyright (C) 2011, 2013 Renesas Solutions Corp.
  9. * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  10. */
  11. #include <common.h>
  12. #include <clk.h>
  13. #include <dm.h>
  14. #include <i2c.h>
  15. #include <asm/io.h>
  16. struct rcar_iic_priv {
  17. void __iomem *base;
  18. struct clk clk;
  19. u8 iccl;
  20. u8 icch;
  21. };
  22. #define RCAR_IIC_ICDR 0x00
  23. #define RCAR_IIC_ICCR 0x04
  24. #define RCAR_IIC_ICSR 0x08
  25. #define RCAR_IIC_ICIC 0x0c
  26. #define RCAR_IIC_ICCL 0x10
  27. #define RCAR_IIC_ICCH 0x14
  28. /* ICCR */
  29. #define RCAR_IIC_ICCR_ICE BIT(7)
  30. #define RCAR_IIC_ICCR_RACK BIT(6)
  31. #define RCAR_IIC_ICCR_RTS BIT(4)
  32. #define RCAR_IIC_ICCR_BUSY BIT(2)
  33. #define RCAR_IIC_ICCR_SCP BIT(0)
  34. /* ICSR / ICIC */
  35. #define RCAR_IC_BUSY BIT(4)
  36. #define RCAR_IC_TACK BIT(2)
  37. #define RCAR_IC_DTE BIT(0)
  38. #define IRQ_WAIT 1000
  39. static void sh_irq_dte(struct udevice *dev)
  40. {
  41. struct rcar_iic_priv *priv = dev_get_priv(dev);
  42. int i;
  43. for (i = 0; i < IRQ_WAIT; i++) {
  44. if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR))
  45. break;
  46. udelay(10);
  47. }
  48. }
  49. static int sh_irq_dte_with_tack(struct udevice *dev)
  50. {
  51. struct rcar_iic_priv *priv = dev_get_priv(dev);
  52. u8 icsr;
  53. int i;
  54. for (i = 0; i < IRQ_WAIT; i++) {
  55. icsr = readb(priv->base + RCAR_IIC_ICSR);
  56. if (RCAR_IC_DTE & icsr)
  57. break;
  58. if (RCAR_IC_TACK & icsr)
  59. return -ETIMEDOUT;
  60. udelay(10);
  61. }
  62. return 0;
  63. }
  64. static void sh_irq_busy(struct udevice *dev)
  65. {
  66. struct rcar_iic_priv *priv = dev_get_priv(dev);
  67. int i;
  68. for (i = 0; i < IRQ_WAIT; i++) {
  69. if (!(RCAR_IC_BUSY & readb(priv->base + RCAR_IIC_ICSR)))
  70. break;
  71. udelay(10);
  72. }
  73. }
  74. static int rcar_iic_set_addr(struct udevice *dev, u8 chip, u8 read)
  75. {
  76. struct rcar_iic_priv *priv = dev_get_priv(dev);
  77. clrbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
  78. setbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
  79. writeb(priv->iccl, priv->base + RCAR_IIC_ICCL);
  80. writeb(priv->icch, priv->base + RCAR_IIC_ICCH);
  81. writeb(RCAR_IC_TACK, priv->base + RCAR_IIC_ICIC);
  82. writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS | RCAR_IIC_ICCR_BUSY,
  83. priv->base + RCAR_IIC_ICCR);
  84. sh_irq_dte(dev);
  85. clrbits_8(priv->base + RCAR_IIC_ICSR, RCAR_IC_TACK);
  86. writeb(chip << 1 | read, priv->base + RCAR_IIC_ICDR);
  87. return sh_irq_dte_with_tack(dev);
  88. }
  89. static void rcar_iic_finish(struct udevice *dev)
  90. {
  91. struct rcar_iic_priv *priv = dev_get_priv(dev);
  92. writeb(0, priv->base + RCAR_IIC_ICSR);
  93. clrbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
  94. }
  95. static int rcar_iic_read_common(struct udevice *dev, struct i2c_msg *msg)
  96. {
  97. struct rcar_iic_priv *priv = dev_get_priv(dev);
  98. int i, ret = -EREMOTEIO;
  99. if (rcar_iic_set_addr(dev, msg->addr, 1) != 0)
  100. goto err;
  101. udelay(10);
  102. writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP,
  103. priv->base + RCAR_IIC_ICCR);
  104. for (i = 0; i < msg->len; i++) {
  105. if (sh_irq_dte_with_tack(dev) != 0)
  106. goto err;
  107. msg->buf[i] = readb(priv->base + RCAR_IIC_ICDR) & 0xff;
  108. if (msg->len - 1 == i) {
  109. writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RACK,
  110. priv->base + RCAR_IIC_ICCR);
  111. }
  112. }
  113. sh_irq_busy(dev);
  114. ret = 0;
  115. err:
  116. rcar_iic_finish(dev);
  117. return ret;
  118. }
  119. static int rcar_iic_write_common(struct udevice *dev, struct i2c_msg *msg)
  120. {
  121. struct rcar_iic_priv *priv = dev_get_priv(dev);
  122. int i, ret = -EREMOTEIO;
  123. if (rcar_iic_set_addr(dev, msg->addr, 0) != 0)
  124. goto err;
  125. udelay(10);
  126. for (i = 0; i < msg->len; i++) {
  127. writeb(msg->buf[i], priv->base + RCAR_IIC_ICDR);
  128. if (sh_irq_dte_with_tack(dev) != 0)
  129. goto err;
  130. }
  131. if (msg->flags & I2C_M_STOP) {
  132. writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS,
  133. priv->base + RCAR_IIC_ICCR);
  134. if (sh_irq_dte_with_tack(dev) != 0)
  135. goto err;
  136. }
  137. sh_irq_busy(dev);
  138. ret = 0;
  139. err:
  140. rcar_iic_finish(dev);
  141. return ret;
  142. }
  143. static int rcar_iic_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  144. {
  145. int ret;
  146. for (; nmsgs > 0; nmsgs--, msg++) {
  147. if (msg->flags & I2C_M_RD)
  148. ret = rcar_iic_read_common(dev, msg);
  149. else
  150. ret = rcar_iic_write_common(dev, msg);
  151. if (ret)
  152. return -EREMOTEIO;
  153. }
  154. return ret;
  155. }
  156. static int rcar_iic_set_speed(struct udevice *dev, uint speed)
  157. {
  158. struct rcar_iic_priv *priv = dev_get_priv(dev);
  159. const unsigned int ratio_high = 4;
  160. const unsigned int ratio_low = 5;
  161. int clkrate, denom;
  162. clkrate = clk_get_rate(&priv->clk);
  163. if (clkrate < 0)
  164. return clkrate;
  165. /*
  166. * Calculate the value for ICCL and ICCH. From the data sheet:
  167. * iccl = (p-clock / transfer-rate) * (L / (L + H))
  168. * icch = (p clock / transfer rate) * (H / (L + H))
  169. * where L and H are the SCL low and high ratio.
  170. */
  171. denom = speed * (ratio_high + ratio_low);
  172. priv->iccl = DIV_ROUND_CLOSEST(clkrate * ratio_low, denom);
  173. priv->icch = DIV_ROUND_CLOSEST(clkrate * ratio_high, denom);
  174. return 0;
  175. }
  176. static int rcar_iic_probe_chip(struct udevice *dev, uint addr, uint flags)
  177. {
  178. struct rcar_iic_priv *priv = dev_get_priv(dev);
  179. int ret;
  180. rcar_iic_set_addr(dev, addr, 1);
  181. writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP,
  182. priv->base + RCAR_IIC_ICCR);
  183. ret = sh_irq_dte_with_tack(dev);
  184. rcar_iic_finish(dev);
  185. return ret;
  186. }
  187. static int rcar_iic_probe(struct udevice *dev)
  188. {
  189. struct rcar_iic_priv *priv = dev_get_priv(dev);
  190. int ret;
  191. priv->base = dev_read_addr_ptr(dev);
  192. ret = clk_get_by_index(dev, 0, &priv->clk);
  193. if (ret)
  194. return ret;
  195. ret = clk_enable(&priv->clk);
  196. if (ret)
  197. return ret;
  198. rcar_iic_finish(dev);
  199. return rcar_iic_set_speed(dev, I2C_SPEED_STANDARD_RATE);
  200. }
  201. static const struct dm_i2c_ops rcar_iic_ops = {
  202. .xfer = rcar_iic_xfer,
  203. .probe_chip = rcar_iic_probe_chip,
  204. .set_bus_speed = rcar_iic_set_speed,
  205. };
  206. static const struct udevice_id rcar_iic_ids[] = {
  207. { .compatible = "renesas,rmobile-iic" },
  208. { }
  209. };
  210. U_BOOT_DRIVER(iic_rcar) = {
  211. .name = "iic_rcar",
  212. .id = UCLASS_I2C,
  213. .of_match = rcar_iic_ids,
  214. .probe = rcar_iic_probe,
  215. .priv_auto_alloc_size = sizeof(struct rcar_iic_priv),
  216. .ops = &rcar_iic_ops,
  217. };