gpu.c 1.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
  4. */
  5. /* Tegra vpr routines */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/arch/tegra.h>
  9. #include <asm/arch/mc.h>
  10. #include <asm/arch-tegra/ap.h>
  11. #include <fdt_support.h>
  12. static bool _configured;
  13. void tegra_gpu_config(void)
  14. {
  15. struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
  16. #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
  17. if (!tegra_cpu_is_non_secure())
  18. #endif
  19. {
  20. /* Turn VPR off */
  21. writel(0, &mc->mc_video_protect_size_mb);
  22. writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
  23. &mc->mc_video_protect_reg_ctrl);
  24. /* read back to ensure the write went through */
  25. readl(&mc->mc_video_protect_reg_ctrl);
  26. }
  27. debug("configured VPR\n");
  28. _configured = true;
  29. }
  30. #if defined(CONFIG_OF_LIBFDT)
  31. int tegra_gpu_enable_node(void *blob, const char *compat)
  32. {
  33. int offset;
  34. if (!_configured)
  35. return 0;
  36. offset = fdt_node_offset_by_compatible(blob, -1, compat);
  37. while (offset != -FDT_ERR_NOTFOUND) {
  38. fdt_status_okay(blob, offset);
  39. offset = fdt_node_offset_by_compatible(blob, offset, compat);
  40. }
  41. return 0;
  42. }
  43. #endif