Kconfig 46 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. select INIT_SP_RELATIVE
  13. help
  14. U-Boot expects to be linked to a specific hard-coded address, and to
  15. be loaded to and run from that address. This option lifts that
  16. restriction, thus allowing the code to be loaded to and executed
  17. from almost any address. This logic relies on the relocation
  18. information that is embedded in the binary to support U-Boot
  19. relocating itself to the top-of-RAM later during execution.
  20. config INIT_SP_RELATIVE
  21. bool "Specify the early stack pointer relative to the .bss section"
  22. help
  23. U-Boot typically uses a hard-coded value for the stack pointer
  24. before relocation. Enable this option to instead calculate the
  25. initial SP at run-time. This is useful to avoid hard-coding addresses
  26. into U-Boot, so that it can be loaded and executed at arbitrary
  27. addresses and thus avoid using arbitrary addresses at runtime.
  28. If this option is enabled, the early stack pointer is set to
  29. &_bss_start with a offset value added. The offset is specified by
  30. SYS_INIT_SP_BSS_OFFSET.
  31. config SYS_INIT_SP_BSS_OFFSET
  32. int "Early stack offset from the .bss base address"
  33. depends on INIT_SP_RELATIVE
  34. default 524288
  35. help
  36. This option's value is the offset added to &_bss_start in order to
  37. calculate the stack pointer. This offset should be large enough so
  38. that the early malloc region, global data (gd), and early stack usage
  39. do not overlap any appended DTB.
  40. config LINUX_KERNEL_IMAGE_HEADER
  41. bool
  42. help
  43. Place a Linux kernel image header at the start of the U-Boot binary.
  44. The format of the header is described in the Linux kernel source at
  45. Documentation/arm64/booting.txt. This feature is useful since the
  46. image header reports the amount of memory (BSS and similar) that
  47. U-Boot needs to use, but which isn't part of the binary.
  48. if LINUX_KERNEL_IMAGE_HEADER
  49. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  50. hex
  51. help
  52. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  53. TEXT_OFFSET value written to the Linux kernel image header.
  54. endif
  55. endif
  56. config GIC_V3_ITS
  57. bool "ARM GICV3 ITS"
  58. help
  59. ARM GICV3 Interrupt translation service (ITS).
  60. Basic support for programming locality specific peripheral
  61. interrupts (LPI) configuration tables and enable LPI tables.
  62. LPI configuration table can be used by u-boot or Linux.
  63. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  64. configuration table can not be re-programmed, unless GICV3 reset.
  65. config STATIC_RELA
  66. bool
  67. default y if ARM64 && !POSITION_INDEPENDENT
  68. config DMA_ADDR_T_64BIT
  69. bool
  70. default y if ARM64
  71. config HAS_VBAR
  72. bool
  73. config HAS_THUMB2
  74. bool
  75. # Used for compatibility with asm files copied from the kernel
  76. config ARM_ASM_UNIFIED
  77. bool
  78. default y
  79. # Used for compatibility with asm files copied from the kernel
  80. config THUMB2_KERNEL
  81. bool
  82. config SYS_ICACHE_OFF
  83. bool "Do not enable icache"
  84. default n
  85. help
  86. Do not enable instruction cache in U-Boot.
  87. config SPL_SYS_ICACHE_OFF
  88. bool "Do not enable icache in SPL"
  89. depends on SPL
  90. default SYS_ICACHE_OFF
  91. help
  92. Do not enable instruction cache in SPL.
  93. config SYS_DCACHE_OFF
  94. bool "Do not enable dcache"
  95. default n
  96. help
  97. Do not enable data cache in U-Boot.
  98. config SPL_SYS_DCACHE_OFF
  99. bool "Do not enable dcache in SPL"
  100. depends on SPL
  101. default SYS_DCACHE_OFF
  102. help
  103. Do not enable data cache in SPL.
  104. config SYS_ARM_CACHE_CP15
  105. bool "CP15 based cache enabling support"
  106. help
  107. Select this if your processor suports enabling caches by using
  108. CP15 registers.
  109. config SYS_ARM_MMU
  110. bool "MMU-based Paged Memory Management Support"
  111. select SYS_ARM_CACHE_CP15
  112. help
  113. Select if you want MMU-based virtualised addressing space
  114. support via paged memory management.
  115. config SYS_ARM_MPU
  116. bool 'Use the ARM v7 PMSA Compliant MPU'
  117. help
  118. Some ARM systems without an MMU have instead a Memory Protection
  119. Unit (MPU) that defines the type and permissions for regions of
  120. memory.
  121. If your CPU has an MPU then you should choose 'y' here unless you
  122. know that you do not want to use the MPU.
  123. # If set, the workarounds for these ARM errata are applied early during U-Boot
  124. # startup. Note that in general these options force the workarounds to be
  125. # applied; no CPU-type/version detection exists, unlike the similar options in
  126. # the Linux kernel. Do not set these options unless they apply! Also note that
  127. # the following can be machine-specific errata. These do have ability to
  128. # provide rudimentary version and machine-specific checks, but expect no
  129. # product checks:
  130. # CONFIG_ARM_ERRATA_430973
  131. # CONFIG_ARM_ERRATA_454179
  132. # CONFIG_ARM_ERRATA_621766
  133. # CONFIG_ARM_ERRATA_798870
  134. # CONFIG_ARM_ERRATA_801819
  135. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  136. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  137. config ARM_ERRATA_430973
  138. bool
  139. config ARM_ERRATA_454179
  140. bool
  141. config ARM_ERRATA_621766
  142. bool
  143. config ARM_ERRATA_716044
  144. bool
  145. config ARM_ERRATA_725233
  146. bool
  147. config ARM_ERRATA_742230
  148. bool
  149. config ARM_ERRATA_743622
  150. bool
  151. config ARM_ERRATA_751472
  152. bool
  153. config ARM_ERRATA_761320
  154. bool
  155. config ARM_ERRATA_773022
  156. bool
  157. config ARM_ERRATA_774769
  158. bool
  159. config ARM_ERRATA_794072
  160. bool
  161. config ARM_ERRATA_798870
  162. bool
  163. config ARM_ERRATA_801819
  164. bool
  165. config ARM_ERRATA_826974
  166. bool
  167. config ARM_ERRATA_828024
  168. bool
  169. config ARM_ERRATA_829520
  170. bool
  171. config ARM_ERRATA_833069
  172. bool
  173. config ARM_ERRATA_833471
  174. bool
  175. config ARM_ERRATA_845369
  176. bool
  177. config ARM_ERRATA_852421
  178. bool
  179. config ARM_ERRATA_852423
  180. bool
  181. config ARM_ERRATA_855873
  182. bool
  183. config ARM_CORTEX_A8_CVE_2017_5715
  184. bool
  185. config ARM_CORTEX_A15_CVE_2017_5715
  186. bool
  187. config CPU_ARM720T
  188. bool
  189. select SYS_CACHE_SHIFT_5
  190. imply SYS_ARM_MMU
  191. config CPU_ARM920T
  192. bool
  193. select SYS_CACHE_SHIFT_5
  194. imply SYS_ARM_MMU
  195. config CPU_ARM926EJS
  196. bool
  197. select SYS_CACHE_SHIFT_5
  198. imply SYS_ARM_MMU
  199. config CPU_ARM946ES
  200. bool
  201. select SYS_CACHE_SHIFT_5
  202. imply SYS_ARM_MMU
  203. config CPU_ARM1136
  204. bool
  205. select SYS_CACHE_SHIFT_5
  206. imply SYS_ARM_MMU
  207. config CPU_ARM1176
  208. bool
  209. select HAS_VBAR
  210. select SYS_CACHE_SHIFT_5
  211. imply SYS_ARM_MMU
  212. config CPU_V7A
  213. bool
  214. select HAS_THUMB2
  215. select HAS_VBAR
  216. select SYS_CACHE_SHIFT_6
  217. imply SYS_ARM_MMU
  218. config CPU_V7M
  219. bool
  220. select HAS_THUMB2
  221. select SYS_ARM_MPU
  222. select SYS_CACHE_SHIFT_5
  223. select SYS_THUMB_BUILD
  224. select THUMB2_KERNEL
  225. config CPU_V7R
  226. bool
  227. select HAS_THUMB2
  228. select SYS_ARM_CACHE_CP15
  229. select SYS_ARM_MPU
  230. select SYS_CACHE_SHIFT_6
  231. config CPU_PXA
  232. bool
  233. select SYS_CACHE_SHIFT_5
  234. imply SYS_ARM_MMU
  235. config CPU_SA1100
  236. bool
  237. select SYS_CACHE_SHIFT_5
  238. imply SYS_ARM_MMU
  239. config SYS_CPU
  240. default "arm720t" if CPU_ARM720T
  241. default "arm920t" if CPU_ARM920T
  242. default "arm926ejs" if CPU_ARM926EJS
  243. default "arm946es" if CPU_ARM946ES
  244. default "arm1136" if CPU_ARM1136
  245. default "arm1176" if CPU_ARM1176
  246. default "armv7" if CPU_V7A
  247. default "armv7" if CPU_V7R
  248. default "armv7m" if CPU_V7M
  249. default "pxa" if CPU_PXA
  250. default "sa1100" if CPU_SA1100
  251. default "armv8" if ARM64
  252. config SYS_ARM_ARCH
  253. int
  254. default 4 if CPU_ARM720T
  255. default 4 if CPU_ARM920T
  256. default 5 if CPU_ARM926EJS
  257. default 5 if CPU_ARM946ES
  258. default 6 if CPU_ARM1136
  259. default 6 if CPU_ARM1176
  260. default 7 if CPU_V7A
  261. default 7 if CPU_V7M
  262. default 7 if CPU_V7R
  263. default 5 if CPU_PXA
  264. default 4 if CPU_SA1100
  265. default 8 if ARM64
  266. config SYS_CACHE_SHIFT_5
  267. bool
  268. config SYS_CACHE_SHIFT_6
  269. bool
  270. config SYS_CACHE_SHIFT_7
  271. bool
  272. config SYS_CACHELINE_SIZE
  273. int
  274. default 128 if SYS_CACHE_SHIFT_7
  275. default 64 if SYS_CACHE_SHIFT_6
  276. default 32 if SYS_CACHE_SHIFT_5
  277. choice
  278. prompt "Select the ARM data write cache policy"
  279. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  280. TARGET_BCMNSP || CPU_PXA || RZA1
  281. default SYS_ARM_CACHE_WRITEBACK
  282. config SYS_ARM_CACHE_WRITEBACK
  283. bool "Write-back (WB)"
  284. help
  285. A write updates the cache only and marks the cache line as dirty.
  286. External memory is updated only when the line is evicted or explicitly
  287. cleaned.
  288. config SYS_ARM_CACHE_WRITETHROUGH
  289. bool "Write-through (WT)"
  290. help
  291. A write updates both the cache and the external memory system.
  292. This does not mark the cache line as dirty.
  293. config SYS_ARM_CACHE_WRITEALLOC
  294. bool "Write allocation (WA)"
  295. help
  296. A cache line is allocated on a write miss. This means that executing a
  297. store instruction on the processor might cause a burst read to occur.
  298. There is a linefill to obtain the data for the cache line, before the
  299. write is performed.
  300. endchoice
  301. config ARCH_CPU_INIT
  302. bool "Enable ARCH_CPU_INIT"
  303. help
  304. Some architectures require a call to arch_cpu_init().
  305. Say Y here to enable it
  306. config SYS_ARCH_TIMER
  307. bool "ARM Generic Timer support"
  308. depends on CPU_V7A || ARM64
  309. default y if ARM64
  310. help
  311. The ARM Generic Timer (aka arch-timer) provides an architected
  312. interface to a timer source on an SoC.
  313. It is mandatory for ARMv8 implementation and widely available
  314. on ARMv7 systems.
  315. config ARM_SMCCC
  316. bool "Support for ARM SMC Calling Convention (SMCCC)"
  317. depends on CPU_V7A || ARM64
  318. select ARM_PSCI_FW
  319. help
  320. Say Y here if you want to enable ARM SMC Calling Convention.
  321. This should be enabled if U-Boot needs to communicate with system
  322. firmware (for example, PSCI) according to SMCCC.
  323. config SEMIHOSTING
  324. bool "support boot from semihosting"
  325. help
  326. In emulated environments, semihosting is a way for
  327. the hosted environment to call out to the emulator to
  328. retrieve files from the host machine.
  329. config SYS_THUMB_BUILD
  330. bool "Build U-Boot using the Thumb instruction set"
  331. depends on !ARM64
  332. help
  333. Use this flag to build U-Boot using the Thumb instruction set for
  334. ARM architectures. Thumb instruction set provides better code
  335. density. For ARM architectures that support Thumb2 this flag will
  336. result in Thumb2 code generated by GCC.
  337. config SPL_SYS_THUMB_BUILD
  338. bool "Build SPL using the Thumb instruction set"
  339. default y if SYS_THUMB_BUILD
  340. depends on !ARM64 && SPL
  341. help
  342. Use this flag to build SPL using the Thumb instruction set for
  343. ARM architectures. Thumb instruction set provides better code
  344. density. For ARM architectures that support Thumb2 this flag will
  345. result in Thumb2 code generated by GCC.
  346. config TPL_SYS_THUMB_BUILD
  347. bool "Build TPL using the Thumb instruction set"
  348. default y if SYS_THUMB_BUILD
  349. depends on TPL && !ARM64
  350. help
  351. Use this flag to build TPL using the Thumb instruction set for
  352. ARM architectures. Thumb instruction set provides better code
  353. density. For ARM architectures that support Thumb2 this flag will
  354. result in Thumb2 code generated by GCC.
  355. config SYS_L2CACHE_OFF
  356. bool "L2cache off"
  357. help
  358. If SoC does not support L2CACHE or one does not want to enable
  359. L2CACHE, choose this option.
  360. config ENABLE_ARM_SOC_BOOT0_HOOK
  361. bool "prepare BOOT0 header"
  362. help
  363. If the SoC's BOOT0 requires a header area filled with (magic)
  364. values, then choose this option, and create a file included as
  365. <asm/arch/boot0.h> which contains the required assembler code.
  366. config ARM_CORTEX_CPU_IS_UP
  367. bool
  368. default n
  369. config USE_ARCH_MEMCPY
  370. bool "Use an assembly optimized implementation of memcpy"
  371. default y
  372. depends on !ARM64
  373. help
  374. Enable the generation of an optimized version of memcpy.
  375. Such an implementation may be faster under some conditions
  376. but may increase the binary size.
  377. config SPL_USE_ARCH_MEMCPY
  378. bool "Use an assembly optimized implementation of memcpy for SPL"
  379. default y if USE_ARCH_MEMCPY
  380. depends on !ARM64 && SPL
  381. help
  382. Enable the generation of an optimized version of memcpy.
  383. Such an implementation may be faster under some conditions
  384. but may increase the binary size.
  385. config TPL_USE_ARCH_MEMCPY
  386. bool "Use an assembly optimized implementation of memcpy for TPL"
  387. default y if USE_ARCH_MEMCPY
  388. depends on !ARM64 && TPL
  389. help
  390. Enable the generation of an optimized version of memcpy.
  391. Such an implementation may be faster under some conditions
  392. but may increase the binary size.
  393. config USE_ARCH_MEMSET
  394. bool "Use an assembly optimized implementation of memset"
  395. default y
  396. depends on !ARM64
  397. help
  398. Enable the generation of an optimized version of memset.
  399. Such an implementation may be faster under some conditions
  400. but may increase the binary size.
  401. config SPL_USE_ARCH_MEMSET
  402. bool "Use an assembly optimized implementation of memset for SPL"
  403. default y if USE_ARCH_MEMSET
  404. depends on !ARM64 && SPL
  405. help
  406. Enable the generation of an optimized version of memset.
  407. Such an implementation may be faster under some conditions
  408. but may increase the binary size.
  409. config TPL_USE_ARCH_MEMSET
  410. bool "Use an assembly optimized implementation of memset for TPL"
  411. default y if USE_ARCH_MEMSET
  412. depends on !ARM64 && TPL
  413. help
  414. Enable the generation of an optimized version of memset.
  415. Such an implementation may be faster under some conditions
  416. but may increase the binary size.
  417. config SET_STACK_SIZE
  418. bool "Enable an option to set max stack size that can be used"
  419. default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
  420. help
  421. This will enable an option to set max stack size that can be
  422. used by U-Boot.
  423. config STACK_SIZE
  424. hex "Define max stack size that can be used by U-Boot"
  425. depends on SET_STACK_SIZE
  426. default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
  427. default 0x1000000 if ARCH_ZYNQ
  428. help
  429. Define Max stack size that can be used by U-Boot so that the
  430. initrd_high will be calculated as base stack pointer minus this
  431. stack size.
  432. config ARM64_SUPPORT_AARCH32
  433. bool "ARM64 system support AArch32 execution state"
  434. depends on ARM64
  435. default y if !TARGET_THUNDERX_88XX
  436. help
  437. This ARM64 system supports AArch32 execution state.
  438. choice
  439. prompt "Target select"
  440. default TARGET_HIKEY
  441. config ARCH_AT91
  442. bool "Atmel AT91"
  443. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  444. config TARGET_EDB93XX
  445. bool "Support edb93xx"
  446. select CPU_ARM920T
  447. select PL010_SERIAL
  448. config TARGET_ASPENITE
  449. bool "Support aspenite"
  450. select CPU_ARM926EJS
  451. config TARGET_GPLUGD
  452. bool "Support gplugd"
  453. select CPU_ARM926EJS
  454. config ARCH_DAVINCI
  455. bool "TI DaVinci"
  456. select CPU_ARM926EJS
  457. imply CMD_SAVES
  458. help
  459. Support for TI's DaVinci platform.
  460. config ARCH_KIRKWOOD
  461. bool "Marvell Kirkwood"
  462. select ARCH_MISC_INIT
  463. select BOARD_EARLY_INIT_F
  464. select CPU_ARM926EJS
  465. config ARCH_MVEBU
  466. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  467. select DM
  468. select DM_ETH
  469. select DM_SERIAL
  470. select DM_SPI
  471. select DM_SPI_FLASH
  472. select OF_CONTROL
  473. select OF_SEPARATE
  474. select SPI
  475. imply CMD_DM
  476. config TARGET_APF27
  477. bool "Support apf27"
  478. select CPU_ARM926EJS
  479. select SUPPORT_SPL
  480. config ARCH_ORION5X
  481. bool "Marvell Orion"
  482. select CPU_ARM926EJS
  483. config TARGET_SPEAR300
  484. bool "Support spear300"
  485. select BOARD_EARLY_INIT_F
  486. select CPU_ARM926EJS
  487. select PL011_SERIAL
  488. imply CMD_SAVES
  489. config TARGET_SPEAR310
  490. bool "Support spear310"
  491. select BOARD_EARLY_INIT_F
  492. select CPU_ARM926EJS
  493. select PL011_SERIAL
  494. imply CMD_SAVES
  495. config TARGET_SPEAR320
  496. bool "Support spear320"
  497. select BOARD_EARLY_INIT_F
  498. select CPU_ARM926EJS
  499. select PL011_SERIAL
  500. imply CMD_SAVES
  501. config TARGET_SPEAR600
  502. bool "Support spear600"
  503. select BOARD_EARLY_INIT_F
  504. select CPU_ARM926EJS
  505. select PL011_SERIAL
  506. imply CMD_SAVES
  507. config TARGET_STV0991
  508. bool "Support stv0991"
  509. select CPU_V7A
  510. select DM
  511. select DM_SERIAL
  512. select DM_SPI
  513. select DM_SPI_FLASH
  514. select PL01X_SERIAL
  515. select SPI
  516. select SPI_FLASH
  517. imply CMD_DM
  518. config TARGET_X600
  519. bool "Support x600"
  520. select BOARD_LATE_INIT
  521. select CPU_ARM926EJS
  522. select PL011_SERIAL
  523. select SUPPORT_SPL
  524. config TARGET_FLEA3
  525. bool "Support flea3"
  526. select CPU_ARM1136
  527. config TARGET_MX35PDK
  528. bool "Support mx35pdk"
  529. select BOARD_LATE_INIT
  530. select CPU_ARM1136
  531. config ARCH_BCM283X
  532. bool "Broadcom BCM283X family"
  533. select DM
  534. select DM_GPIO
  535. select DM_SERIAL
  536. select OF_CONTROL
  537. select PL01X_SERIAL
  538. select SERIAL_SEARCH_ALL
  539. imply CMD_DM
  540. imply FAT_WRITE
  541. config ARCH_BCM63158
  542. bool "Broadcom BCM63158 family"
  543. select DM
  544. select OF_CONTROL
  545. imply CMD_DM
  546. config ARCH_BCM68360
  547. bool "Broadcom BCM68360 family"
  548. select DM
  549. select OF_CONTROL
  550. imply CMD_DM
  551. config ARCH_BCM6858
  552. bool "Broadcom BCM6858 family"
  553. select DM
  554. select OF_CONTROL
  555. imply CMD_DM
  556. config TARGET_VEXPRESS_CA15_TC2
  557. bool "Support vexpress_ca15_tc2"
  558. select CPU_V7A
  559. select CPU_V7_HAS_NONSEC
  560. select CPU_V7_HAS_VIRT
  561. select PL011_SERIAL
  562. config ARCH_BCMSTB
  563. bool "Broadcom BCM7XXX family"
  564. select CPU_V7A
  565. select DM
  566. select OF_CONTROL
  567. select OF_PRIOR_STAGE
  568. imply CMD_DM
  569. help
  570. This enables support for Broadcom ARM-based set-top box
  571. chipsets, including the 7445 family of chips.
  572. config TARGET_VEXPRESS_CA5X2
  573. bool "Support vexpress_ca5x2"
  574. select CPU_V7A
  575. select PL011_SERIAL
  576. config TARGET_VEXPRESS_CA9X4
  577. bool "Support vexpress_ca9x4"
  578. select CPU_V7A
  579. select PL011_SERIAL
  580. config TARGET_BCM23550_W1D
  581. bool "Support bcm23550_w1d"
  582. select CPU_V7A
  583. imply CRC32_VERIFY
  584. imply FAT_WRITE
  585. config TARGET_BCM28155_AP
  586. bool "Support bcm28155_ap"
  587. select CPU_V7A
  588. imply CRC32_VERIFY
  589. imply FAT_WRITE
  590. config TARGET_BCMCYGNUS
  591. bool "Support bcmcygnus"
  592. select CPU_V7A
  593. imply BCM_SF2_ETH
  594. imply BCM_SF2_ETH_GMAC
  595. imply CMD_HASH
  596. imply CRC32_VERIFY
  597. imply FAT_WRITE
  598. imply HASH_VERIFY
  599. imply NETDEVICES
  600. config TARGET_BCMNSP
  601. bool "Support bcmnsp"
  602. select CPU_V7A
  603. config TARGET_BCMNS2
  604. bool "Support Broadcom Northstar2"
  605. select ARM64
  606. help
  607. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  608. ARMv8 Cortex-A57 processors targeting a broad range of networking
  609. applications.
  610. config ARCH_EXYNOS
  611. bool "Samsung EXYNOS"
  612. select DM
  613. select DM_GPIO
  614. select DM_I2C
  615. select DM_KEYBOARD
  616. select DM_SERIAL
  617. select DM_SPI
  618. select DM_SPI_FLASH
  619. select SPI
  620. imply SYS_THUMB_BUILD
  621. imply CMD_DM
  622. imply FAT_WRITE
  623. config ARCH_S5PC1XX
  624. bool "Samsung S5PC1XX"
  625. select CPU_V7A
  626. select DM
  627. select DM_GPIO
  628. select DM_I2C
  629. select DM_SERIAL
  630. imply CMD_DM
  631. config ARCH_HIGHBANK
  632. bool "Calxeda Highbank"
  633. select CPU_V7A
  634. select PL011_SERIAL
  635. config ARCH_INTEGRATOR
  636. bool "ARM Ltd. Integrator family"
  637. select DM
  638. select DM_SERIAL
  639. select PL01X_SERIAL
  640. imply CMD_DM
  641. config ARCH_KEYSTONE
  642. bool "TI Keystone"
  643. select CMD_POWEROFF
  644. select CPU_V7A
  645. select SUPPORT_SPL
  646. select SYS_ARCH_TIMER
  647. select SYS_THUMB_BUILD
  648. imply CMD_MTDPARTS
  649. imply CMD_SAVES
  650. imply FIT
  651. config ARCH_K3
  652. bool "Texas Instruments' K3 Architecture"
  653. select SPL
  654. select SUPPORT_SPL
  655. select FIT
  656. config ARCH_OMAP2PLUS
  657. bool "TI OMAP2+"
  658. select CPU_V7A
  659. select SPL_BOARD_INIT if SPL
  660. select SPL_STACK_R if SPL
  661. select SUPPORT_SPL
  662. imply FIT
  663. config ARCH_MESON
  664. bool "Amlogic Meson"
  665. imply DISTRO_DEFAULTS
  666. imply DM_RNG
  667. help
  668. Support for the Meson SoC family developed by Amlogic Inc.,
  669. targeted at media players and tablet computers. We currently
  670. support the S905 (GXBaby) 64-bit SoC.
  671. config ARCH_MEDIATEK
  672. bool "MediaTek SoCs"
  673. select DM
  674. select OF_CONTROL
  675. select SPL_DM if SPL
  676. select SPL_LIBCOMMON_SUPPORT if SPL
  677. select SPL_LIBGENERIC_SUPPORT if SPL
  678. select SPL_OF_CONTROL if SPL
  679. select SUPPORT_SPL
  680. help
  681. Support for the MediaTek SoCs family developed by MediaTek Inc.
  682. Please refer to doc/README.mediatek for more information.
  683. config ARCH_LPC32XX
  684. bool "NXP LPC32xx platform"
  685. select CPU_ARM926EJS
  686. select DM
  687. select DM_GPIO
  688. select DM_SERIAL
  689. select SPL_DM if SPL
  690. select SUPPORT_SPL
  691. imply CMD_DM
  692. config ARCH_IMX8
  693. bool "NXP i.MX8 platform"
  694. select ARM64
  695. select DM
  696. select OF_CONTROL
  697. select ENABLE_ARM_SOC_BOOT0_HOOK
  698. config ARCH_IMX8M
  699. bool "NXP i.MX8M platform"
  700. select ARM64
  701. select DM
  702. select SUPPORT_SPL
  703. imply CMD_DM
  704. config ARCH_IMXRT
  705. bool "NXP i.MXRT platform"
  706. select CPU_V7M
  707. select DM
  708. select DM_SERIAL
  709. select SUPPORT_SPL
  710. imply CMD_DM
  711. config ARCH_MX23
  712. bool "NXP i.MX23 family"
  713. select CPU_ARM926EJS
  714. select PL011_SERIAL
  715. select SUPPORT_SPL
  716. config ARCH_MX25
  717. bool "NXP MX25"
  718. select CPU_ARM926EJS
  719. imply MXC_GPIO
  720. config ARCH_MX28
  721. bool "NXP i.MX28 family"
  722. select CPU_ARM926EJS
  723. select PL011_SERIAL
  724. select SUPPORT_SPL
  725. config ARCH_MX31
  726. bool "NXP i.MX31 family"
  727. select CPU_ARM1136
  728. config ARCH_MX7ULP
  729. bool "NXP MX7ULP"
  730. select CPU_V7A
  731. select ROM_UNIFIED_SECTIONS
  732. imply MXC_GPIO
  733. imply SYS_THUMB_BUILD
  734. config ARCH_MX7
  735. bool "Freescale MX7"
  736. select ARCH_MISC_INIT
  737. select BOARD_EARLY_INIT_F
  738. select CPU_V7A
  739. select SYS_FSL_HAS_SEC if IMX_HAB
  740. select SYS_FSL_SEC_COMPAT_4
  741. select SYS_FSL_SEC_LE
  742. imply MXC_GPIO
  743. imply SYS_THUMB_BUILD
  744. config ARCH_MX6
  745. bool "Freescale MX6"
  746. select CPU_V7A
  747. select SYS_FSL_HAS_SEC if IMX_HAB
  748. select SYS_FSL_SEC_COMPAT_4
  749. select SYS_FSL_SEC_LE
  750. imply MXC_GPIO
  751. imply SYS_THUMB_BUILD
  752. if ARCH_MX6
  753. config SPL_LDSCRIPT
  754. default "arch/arm/mach-omap2/u-boot-spl.lds"
  755. endif
  756. config ARCH_MX5
  757. bool "Freescale MX5"
  758. select BOARD_EARLY_INIT_F
  759. select CPU_V7A
  760. imply MXC_GPIO
  761. config ARCH_OWL
  762. bool "Actions Semi OWL SoCs"
  763. select DM
  764. select DM_SERIAL
  765. select OWL_SERIAL
  766. select CLK
  767. select CLK_OWL
  768. select OF_CONTROL
  769. select SYS_RELOC_GD_ENV_ADDR
  770. imply CMD_DM
  771. config ARCH_QEMU
  772. bool "QEMU Virtual Platform"
  773. select ARCH_SUPPORT_TFABOOT
  774. select DM
  775. select DM_SERIAL
  776. select OF_CONTROL
  777. select PL01X_SERIAL
  778. imply CMD_DM
  779. imply DM_RTC
  780. imply RTC_PL031
  781. config ARCH_RMOBILE
  782. bool "Renesas ARM SoCs"
  783. select BOARD_EARLY_INIT_F if !RZA1
  784. select DM
  785. select DM_SERIAL
  786. imply CMD_DM
  787. imply FAT_WRITE
  788. imply SYS_THUMB_BUILD
  789. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  790. config TARGET_S32V234EVB
  791. bool "Support s32v234evb"
  792. select ARM64
  793. select SYS_FSL_ERRATUM_ESDHC111
  794. config ARCH_SNAPDRAGON
  795. bool "Qualcomm Snapdragon SoCs"
  796. select ARM64
  797. select DM
  798. select DM_GPIO
  799. select DM_SERIAL
  800. select MSM_SMEM
  801. select OF_CONTROL
  802. select OF_SEPARATE
  803. select SMEM
  804. select SPMI
  805. imply CMD_DM
  806. config ARCH_SOCFPGA
  807. bool "Altera SOCFPGA family"
  808. select ARCH_EARLY_INIT_R
  809. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  810. select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  811. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  812. select DM
  813. select DM_SERIAL
  814. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  815. select OF_CONTROL
  816. select SPL_DM_RESET if DM_RESET
  817. select SPL_DM_SERIAL
  818. select SPL_LIBCOMMON_SUPPORT
  819. select SPL_LIBGENERIC_SUPPORT
  820. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  821. select SPL_OF_CONTROL
  822. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  823. select SPL_SERIAL_SUPPORT
  824. select SPL_SYSRESET
  825. select SPL_WATCHDOG_SUPPORT
  826. select SUPPORT_SPL
  827. select SYS_NS16550
  828. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  829. select SYSRESET
  830. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  831. select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
  832. imply CMD_DM
  833. imply CMD_MTDPARTS
  834. imply CRC32_VERIFY
  835. imply DM_SPI
  836. imply DM_SPI_FLASH
  837. imply FAT_WRITE
  838. imply SPL
  839. imply SPL_DM
  840. imply SPL_LIBDISK_SUPPORT
  841. imply SPL_MMC_SUPPORT
  842. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  843. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  844. imply SPL_SPI_FLASH_SUPPORT
  845. imply SPL_SPI_SUPPORT
  846. imply L2X0_CACHE
  847. config ARCH_SUNXI
  848. bool "Support sunxi (Allwinner) SoCs"
  849. select BINMAN
  850. select CMD_GPIO
  851. select CMD_MMC if MMC
  852. select CMD_USB if DISTRO_DEFAULTS
  853. select CLK
  854. select DM
  855. select DM_ETH
  856. select DM_GPIO
  857. select DM_KEYBOARD
  858. select DM_MMC if MMC
  859. select DM_SCSI if SCSI
  860. select DM_SERIAL
  861. select DM_USB if DISTRO_DEFAULTS
  862. select OF_BOARD_SETUP
  863. select OF_CONTROL
  864. select OF_SEPARATE
  865. select SPECIFY_CONSOLE_INDEX
  866. select SPL_STACK_R if SPL
  867. select SPL_SYS_MALLOC_SIMPLE if SPL
  868. select SPL_SYS_THUMB_BUILD if !ARM64
  869. select SUNXI_GPIO
  870. select SYS_NS16550
  871. select SYS_THUMB_BUILD if !ARM64
  872. select USB if DISTRO_DEFAULTS
  873. select USB_KEYBOARD if DISTRO_DEFAULTS
  874. select USB_STORAGE if DISTRO_DEFAULTS
  875. select SPL_USE_TINY_PRINTF
  876. select USE_PREBOOT
  877. select SYS_RELOC_GD_ENV_ADDR
  878. imply CMD_DM
  879. imply CMD_GPT
  880. imply CMD_UBI if MTD_RAW_NAND
  881. imply DISTRO_DEFAULTS
  882. imply FAT_WRITE
  883. imply FIT
  884. imply OF_LIBFDT_OVERLAY
  885. imply PRE_CONSOLE_BUFFER
  886. imply SPL_GPIO_SUPPORT
  887. imply SPL_LIBCOMMON_SUPPORT
  888. imply SPL_LIBGENERIC_SUPPORT
  889. imply SPL_MMC_SUPPORT if MMC
  890. imply SPL_POWER_SUPPORT
  891. imply SPL_SERIAL_SUPPORT
  892. imply USB_GADGET
  893. config ARCH_U8500
  894. bool "ST-Ericsson U8500 Series"
  895. select CPU_V7A
  896. select DM
  897. select DM_GPIO
  898. select DM_MMC if MMC
  899. select DM_SERIAL
  900. select DM_USB if USB
  901. select OF_CONTROL
  902. select SYSRESET
  903. select TIMER
  904. imply ARM_PL180_MMCI
  905. imply DM_RTC
  906. imply NOMADIK_MTU_TIMER
  907. imply PL01X_SERIAL
  908. imply RTC_PL031
  909. imply SYSRESET_SYSCON
  910. config ARCH_VERSAL
  911. bool "Support Xilinx Versal Platform"
  912. select ARM64
  913. select CLK
  914. select DM
  915. select DM_ETH if NET
  916. select DM_MMC if MMC
  917. select DM_SERIAL
  918. select OF_CONTROL
  919. imply BOARD_LATE_INIT
  920. config ARCH_VF610
  921. bool "Freescale Vybrid"
  922. select CPU_V7A
  923. select SYS_FSL_ERRATUM_ESDHC111
  924. imply CMD_MTDPARTS
  925. imply MTD_RAW_NAND
  926. config ARCH_ZYNQ
  927. bool "Xilinx Zynq based platform"
  928. select CLK
  929. select CLK_ZYNQ
  930. select CPU_V7A
  931. select DM
  932. select DM_ETH if NET
  933. select DM_MMC if MMC
  934. select DM_SERIAL
  935. select DM_SPI
  936. select DM_SPI_FLASH
  937. select DM_USB if USB
  938. select OF_CONTROL
  939. select SPI
  940. select SPL_BOARD_INIT if SPL
  941. select SPL_CLK if SPL
  942. select SPL_DM if SPL
  943. select SPL_OF_CONTROL if SPL
  944. select SPL_SEPARATE_BSS if SPL
  945. select SUPPORT_SPL
  946. imply ARCH_EARLY_INIT_R
  947. imply BOARD_LATE_INIT
  948. imply CMD_CLK
  949. imply CMD_DM
  950. imply CMD_SPL
  951. imply FAT_WRITE
  952. config ARCH_ZYNQMP_R5
  953. bool "Xilinx ZynqMP R5 based platform"
  954. select CLK
  955. select CPU_V7R
  956. select DM
  957. select DM_ETH if NET
  958. select DM_MMC if MMC
  959. select DM_SERIAL
  960. select OF_CONTROL
  961. imply CMD_DM
  962. imply DM_USB_GADGET
  963. config ARCH_ZYNQMP
  964. bool "Xilinx ZynqMP based platform"
  965. select ARM64
  966. select CLK
  967. select DM
  968. select DM_ETH if NET
  969. select DM_MAILBOX
  970. select DM_MMC if MMC
  971. select DM_SERIAL
  972. select DM_SPI if SPI
  973. select DM_SPI_FLASH if DM_SPI
  974. select DM_USB if USB
  975. select FIRMWARE
  976. select OF_CONTROL
  977. select SPL_BOARD_INIT if SPL
  978. select SPL_CLK if SPL
  979. select SPL_DM_MAILBOX if SPL
  980. select SPL_FIRMWARE if SPL
  981. select SPL_SEPARATE_BSS if SPL
  982. select SUPPORT_SPL
  983. select ZYNQMP_IPI
  984. imply BOARD_LATE_INIT
  985. imply CMD_DM
  986. imply FAT_WRITE
  987. imply MP
  988. imply DM_USB_GADGET
  989. config ARCH_TEGRA
  990. bool "NVIDIA Tegra"
  991. imply DISTRO_DEFAULTS
  992. imply FAT_WRITE
  993. config TARGET_VEXPRESS64_AEMV8A
  994. bool "Support vexpress_aemv8a"
  995. select ARM64
  996. select PL01X_SERIAL
  997. config TARGET_VEXPRESS64_BASE_FVP
  998. bool "Support Versatile Express ARMv8a FVP BASE model"
  999. select ARM64
  1000. select PL01X_SERIAL
  1001. select SEMIHOSTING
  1002. config TARGET_VEXPRESS64_JUNO
  1003. bool "Support Versatile Express Juno Development Platform"
  1004. select ARM64
  1005. select PL01X_SERIAL
  1006. select DM
  1007. select OF_CONTROL
  1008. select OF_BOARD
  1009. select CLK
  1010. select DM_SERIAL
  1011. select ARM_PSCI_FW
  1012. select PSCI_RESET
  1013. select DM
  1014. select BLK
  1015. select USB
  1016. select DM_USB
  1017. config TARGET_LS2080A_EMU
  1018. bool "Support ls2080a_emu"
  1019. select ARCH_LS2080A
  1020. select ARM64
  1021. select ARMV8_MULTIENTRY
  1022. select FSL_DDR_SYNC_REFRESH
  1023. help
  1024. Support for Freescale LS2080A_EMU platform.
  1025. The LS2080A Development System (EMULATOR) is a pre-silicon
  1026. development platform that supports the QorIQ LS2080A
  1027. Layerscape Architecture processor.
  1028. config TARGET_LS2080A_SIMU
  1029. bool "Support ls2080a_simu"
  1030. select ARCH_LS2080A
  1031. select ARM64
  1032. select ARMV8_MULTIENTRY
  1033. select BOARD_LATE_INIT
  1034. help
  1035. Support for Freescale LS2080A_SIMU platform.
  1036. The LS2080A Development System (QDS) is a pre silicon
  1037. development platform that supports the QorIQ LS2080A
  1038. Layerscape Architecture processor.
  1039. config TARGET_LS1088AQDS
  1040. bool "Support ls1088aqds"
  1041. select ARCH_LS1088A
  1042. select ARM64
  1043. select ARMV8_MULTIENTRY
  1044. select ARCH_SUPPORT_TFABOOT
  1045. select BOARD_LATE_INIT
  1046. select SUPPORT_SPL
  1047. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1048. help
  1049. Support for NXP LS1088AQDS platform.
  1050. The LS1088A Development System (QDS) is a high-performance
  1051. development platform that supports the QorIQ LS1088A
  1052. Layerscape Architecture processor.
  1053. config TARGET_LS2080AQDS
  1054. bool "Support ls2080aqds"
  1055. select ARCH_LS2080A
  1056. select ARM64
  1057. select ARMV8_MULTIENTRY
  1058. select ARCH_SUPPORT_TFABOOT
  1059. select BOARD_LATE_INIT
  1060. select SUPPORT_SPL
  1061. imply SCSI
  1062. imply SCSI_AHCI
  1063. select FSL_DDR_BIST
  1064. select FSL_DDR_INTERACTIVE if !SPL
  1065. help
  1066. Support for Freescale LS2080AQDS platform.
  1067. The LS2080A Development System (QDS) is a high-performance
  1068. development platform that supports the QorIQ LS2080A
  1069. Layerscape Architecture processor.
  1070. config TARGET_LS2080ARDB
  1071. bool "Support ls2080ardb"
  1072. select ARCH_LS2080A
  1073. select ARM64
  1074. select ARMV8_MULTIENTRY
  1075. select ARCH_SUPPORT_TFABOOT
  1076. select BOARD_LATE_INIT
  1077. select SUPPORT_SPL
  1078. select FSL_DDR_BIST
  1079. select FSL_DDR_INTERACTIVE if !SPL
  1080. imply SCSI
  1081. imply SCSI_AHCI
  1082. help
  1083. Support for Freescale LS2080ARDB platform.
  1084. The LS2080A Reference design board (RDB) is a high-performance
  1085. development platform that supports the QorIQ LS2080A
  1086. Layerscape Architecture processor.
  1087. config TARGET_LS2081ARDB
  1088. bool "Support ls2081ardb"
  1089. select ARCH_LS2080A
  1090. select ARM64
  1091. select ARMV8_MULTIENTRY
  1092. select BOARD_LATE_INIT
  1093. select SUPPORT_SPL
  1094. help
  1095. Support for Freescale LS2081ARDB platform.
  1096. The LS2081A Reference design board (RDB) is a high-performance
  1097. development platform that supports the QorIQ LS2081A/LS2041A
  1098. Layerscape Architecture processor.
  1099. config TARGET_LX2160ARDB
  1100. bool "Support lx2160ardb"
  1101. select ARCH_LX2160A
  1102. select ARM64
  1103. select ARMV8_MULTIENTRY
  1104. select ARCH_SUPPORT_TFABOOT
  1105. select BOARD_LATE_INIT
  1106. help
  1107. Support for NXP LX2160ARDB platform.
  1108. The lx2160ardb (LX2160A Reference design board (RDB)
  1109. is a high-performance development platform that supports the
  1110. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1111. config TARGET_LX2160AQDS
  1112. bool "Support lx2160aqds"
  1113. select ARCH_LX2160A
  1114. select ARM64
  1115. select ARMV8_MULTIENTRY
  1116. select ARCH_SUPPORT_TFABOOT
  1117. select BOARD_LATE_INIT
  1118. help
  1119. Support for NXP LX2160AQDS platform.
  1120. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1121. is a high-performance development platform that supports the
  1122. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1123. config TARGET_HIKEY
  1124. bool "Support HiKey 96boards Consumer Edition Platform"
  1125. select ARM64
  1126. select DM
  1127. select DM_GPIO
  1128. select DM_SERIAL
  1129. select OF_CONTROL
  1130. select PL01X_SERIAL
  1131. select SPECIFY_CONSOLE_INDEX
  1132. imply CMD_DM
  1133. help
  1134. Support for HiKey 96boards platform. It features a HI6220
  1135. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1136. config TARGET_HIKEY960
  1137. bool "Support HiKey960 96boards Consumer Edition Platform"
  1138. select ARM64
  1139. select DM
  1140. select DM_SERIAL
  1141. select OF_CONTROL
  1142. select PL01X_SERIAL
  1143. imply CMD_DM
  1144. help
  1145. Support for HiKey960 96boards platform. It features a HI3660
  1146. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1147. config TARGET_POPLAR
  1148. bool "Support Poplar 96boards Enterprise Edition Platform"
  1149. select ARM64
  1150. select DM
  1151. select DM_SERIAL
  1152. select DM_USB
  1153. select OF_CONTROL
  1154. select PL01X_SERIAL
  1155. imply CMD_DM
  1156. help
  1157. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1158. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1159. making it capable of running any commercial set-top solution based on
  1160. Linux or Android.
  1161. config TARGET_LS1012AQDS
  1162. bool "Support ls1012aqds"
  1163. select ARCH_LS1012A
  1164. select ARM64
  1165. select ARCH_SUPPORT_TFABOOT
  1166. select BOARD_LATE_INIT
  1167. help
  1168. Support for Freescale LS1012AQDS platform.
  1169. The LS1012A Development System (QDS) is a high-performance
  1170. development platform that supports the QorIQ LS1012A
  1171. Layerscape Architecture processor.
  1172. config TARGET_LS1012ARDB
  1173. bool "Support ls1012ardb"
  1174. select ARCH_LS1012A
  1175. select ARM64
  1176. select ARCH_SUPPORT_TFABOOT
  1177. select BOARD_LATE_INIT
  1178. imply SCSI
  1179. imply SCSI_AHCI
  1180. help
  1181. Support for Freescale LS1012ARDB platform.
  1182. The LS1012A Reference design board (RDB) is a high-performance
  1183. development platform that supports the QorIQ LS1012A
  1184. Layerscape Architecture processor.
  1185. config TARGET_LS1012A2G5RDB
  1186. bool "Support ls1012a2g5rdb"
  1187. select ARCH_LS1012A
  1188. select ARM64
  1189. select ARCH_SUPPORT_TFABOOT
  1190. select BOARD_LATE_INIT
  1191. imply SCSI
  1192. help
  1193. Support for Freescale LS1012A2G5RDB platform.
  1194. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1195. development platform that supports the QorIQ LS1012A
  1196. Layerscape Architecture processor.
  1197. config TARGET_LS1012AFRWY
  1198. bool "Support ls1012afrwy"
  1199. select ARCH_LS1012A
  1200. select ARM64
  1201. select ARCH_SUPPORT_TFABOOT
  1202. select BOARD_LATE_INIT
  1203. imply SCSI
  1204. imply SCSI_AHCI
  1205. help
  1206. Support for Freescale LS1012AFRWY platform.
  1207. The LS1012A FRWY board (FRWY) is a high-performance
  1208. development platform that supports the QorIQ LS1012A
  1209. Layerscape Architecture processor.
  1210. config TARGET_LS1012AFRDM
  1211. bool "Support ls1012afrdm"
  1212. select ARCH_LS1012A
  1213. select ARM64
  1214. select ARCH_SUPPORT_TFABOOT
  1215. help
  1216. Support for Freescale LS1012AFRDM platform.
  1217. The LS1012A Freedom board (FRDM) is a high-performance
  1218. development platform that supports the QorIQ LS1012A
  1219. Layerscape Architecture processor.
  1220. config TARGET_LS1028AQDS
  1221. bool "Support ls1028aqds"
  1222. select ARCH_LS1028A
  1223. select ARM64
  1224. select ARMV8_MULTIENTRY
  1225. select ARCH_SUPPORT_TFABOOT
  1226. select BOARD_LATE_INIT
  1227. help
  1228. Support for Freescale LS1028AQDS platform
  1229. The LS1028A Development System (QDS) is a high-performance
  1230. development platform that supports the QorIQ LS1028A
  1231. Layerscape Architecture processor.
  1232. config TARGET_LS1028ARDB
  1233. bool "Support ls1028ardb"
  1234. select ARCH_LS1028A
  1235. select ARM64
  1236. select ARMV8_MULTIENTRY
  1237. select ARCH_SUPPORT_TFABOOT
  1238. select BOARD_LATE_INIT
  1239. help
  1240. Support for Freescale LS1028ARDB platform
  1241. The LS1028A Development System (RDB) is a high-performance
  1242. development platform that supports the QorIQ LS1028A
  1243. Layerscape Architecture processor.
  1244. config TARGET_LS1088ARDB
  1245. bool "Support ls1088ardb"
  1246. select ARCH_LS1088A
  1247. select ARM64
  1248. select ARMV8_MULTIENTRY
  1249. select ARCH_SUPPORT_TFABOOT
  1250. select BOARD_LATE_INIT
  1251. select SUPPORT_SPL
  1252. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1253. help
  1254. Support for NXP LS1088ARDB platform.
  1255. The LS1088A Reference design board (RDB) is a high-performance
  1256. development platform that supports the QorIQ LS1088A
  1257. Layerscape Architecture processor.
  1258. config TARGET_LS1021AQDS
  1259. bool "Support ls1021aqds"
  1260. select ARCH_LS1021A
  1261. select ARCH_SUPPORT_PSCI
  1262. select BOARD_EARLY_INIT_F
  1263. select BOARD_LATE_INIT
  1264. select CPU_V7A
  1265. select CPU_V7_HAS_NONSEC
  1266. select CPU_V7_HAS_VIRT
  1267. select LS1_DEEP_SLEEP
  1268. select SUPPORT_SPL
  1269. select SYS_FSL_DDR
  1270. select FSL_DDR_INTERACTIVE
  1271. imply SCSI
  1272. config TARGET_LS1021ATWR
  1273. bool "Support ls1021atwr"
  1274. select ARCH_LS1021A
  1275. select ARCH_SUPPORT_PSCI
  1276. select BOARD_EARLY_INIT_F
  1277. select BOARD_LATE_INIT
  1278. select CPU_V7A
  1279. select CPU_V7_HAS_NONSEC
  1280. select CPU_V7_HAS_VIRT
  1281. select LS1_DEEP_SLEEP
  1282. select SUPPORT_SPL
  1283. imply SCSI
  1284. config TARGET_LS1021ATSN
  1285. bool "Support ls1021atsn"
  1286. select ARCH_LS1021A
  1287. select ARCH_SUPPORT_PSCI
  1288. select BOARD_EARLY_INIT_F
  1289. select BOARD_LATE_INIT
  1290. select CPU_V7A
  1291. select CPU_V7_HAS_NONSEC
  1292. select CPU_V7_HAS_VIRT
  1293. select LS1_DEEP_SLEEP
  1294. select SUPPORT_SPL
  1295. imply SCSI
  1296. config TARGET_LS1021AIOT
  1297. bool "Support ls1021aiot"
  1298. select ARCH_LS1021A
  1299. select ARCH_SUPPORT_PSCI
  1300. select BOARD_LATE_INIT
  1301. select CPU_V7A
  1302. select CPU_V7_HAS_NONSEC
  1303. select CPU_V7_HAS_VIRT
  1304. select SUPPORT_SPL
  1305. imply SCSI
  1306. help
  1307. Support for Freescale LS1021AIOT platform.
  1308. The LS1021A Freescale board (IOT) is a high-performance
  1309. development platform that supports the QorIQ LS1021A
  1310. Layerscape Architecture processor.
  1311. config TARGET_LS1043AQDS
  1312. bool "Support ls1043aqds"
  1313. select ARCH_LS1043A
  1314. select ARM64
  1315. select ARMV8_MULTIENTRY
  1316. select ARCH_SUPPORT_TFABOOT
  1317. select BOARD_EARLY_INIT_F
  1318. select BOARD_LATE_INIT
  1319. select SUPPORT_SPL
  1320. select FSL_DDR_INTERACTIVE if !SPL
  1321. imply SCSI
  1322. imply SCSI_AHCI
  1323. help
  1324. Support for Freescale LS1043AQDS platform.
  1325. config TARGET_LS1043ARDB
  1326. bool "Support ls1043ardb"
  1327. select ARCH_LS1043A
  1328. select ARM64
  1329. select ARMV8_MULTIENTRY
  1330. select ARCH_SUPPORT_TFABOOT
  1331. select BOARD_EARLY_INIT_F
  1332. select BOARD_LATE_INIT
  1333. select SUPPORT_SPL
  1334. help
  1335. Support for Freescale LS1043ARDB platform.
  1336. config TARGET_LS1046AQDS
  1337. bool "Support ls1046aqds"
  1338. select ARCH_LS1046A
  1339. select ARM64
  1340. select ARMV8_MULTIENTRY
  1341. select ARCH_SUPPORT_TFABOOT
  1342. select BOARD_EARLY_INIT_F
  1343. select BOARD_LATE_INIT
  1344. select DM_SPI_FLASH if DM_SPI
  1345. select SUPPORT_SPL
  1346. select FSL_DDR_BIST if !SPL
  1347. select FSL_DDR_INTERACTIVE if !SPL
  1348. select FSL_DDR_INTERACTIVE if !SPL
  1349. imply SCSI
  1350. help
  1351. Support for Freescale LS1046AQDS platform.
  1352. The LS1046A Development System (QDS) is a high-performance
  1353. development platform that supports the QorIQ LS1046A
  1354. Layerscape Architecture processor.
  1355. config TARGET_LS1046ARDB
  1356. bool "Support ls1046ardb"
  1357. select ARCH_LS1046A
  1358. select ARM64
  1359. select ARMV8_MULTIENTRY
  1360. select ARCH_SUPPORT_TFABOOT
  1361. select BOARD_EARLY_INIT_F
  1362. select BOARD_LATE_INIT
  1363. select DM_SPI_FLASH if DM_SPI
  1364. select POWER_MC34VR500
  1365. select SUPPORT_SPL
  1366. select FSL_DDR_BIST
  1367. select FSL_DDR_INTERACTIVE if !SPL
  1368. imply SCSI
  1369. help
  1370. Support for Freescale LS1046ARDB platform.
  1371. The LS1046A Reference Design Board (RDB) is a high-performance
  1372. development platform that supports the QorIQ LS1046A
  1373. Layerscape Architecture processor.
  1374. config TARGET_LS1046AFRWY
  1375. bool "Support ls1046afrwy"
  1376. select ARCH_LS1046A
  1377. select ARM64
  1378. select ARMV8_MULTIENTRY
  1379. select ARCH_SUPPORT_TFABOOT
  1380. select BOARD_EARLY_INIT_F
  1381. select BOARD_LATE_INIT
  1382. select DM_SPI_FLASH if DM_SPI
  1383. imply SCSI
  1384. help
  1385. Support for Freescale LS1046AFRWY platform.
  1386. The LS1046A Freeway Board (FRWY) is a high-performance
  1387. development platform that supports the QorIQ LS1046A
  1388. Layerscape Architecture processor.
  1389. config TARGET_COLIBRI_PXA270
  1390. bool "Support colibri_pxa270"
  1391. select CPU_PXA
  1392. config ARCH_UNIPHIER
  1393. bool "Socionext UniPhier SoCs"
  1394. select BOARD_LATE_INIT
  1395. select DM
  1396. select DM_GPIO
  1397. select DM_I2C
  1398. select DM_MMC
  1399. select DM_MTD
  1400. select DM_RESET
  1401. select DM_SERIAL
  1402. select DM_USB
  1403. select OF_BOARD_SETUP
  1404. select OF_CONTROL
  1405. select OF_LIBFDT
  1406. select PINCTRL
  1407. select SPL_BOARD_INIT if SPL
  1408. select SPL_DM if SPL
  1409. select SPL_LIBCOMMON_SUPPORT if SPL
  1410. select SPL_LIBGENERIC_SUPPORT if SPL
  1411. select SPL_OF_CONTROL if SPL
  1412. select SPL_PINCTRL if SPL
  1413. select SUPPORT_SPL
  1414. imply CMD_DM
  1415. imply DISTRO_DEFAULTS
  1416. imply FAT_WRITE
  1417. help
  1418. Support for UniPhier SoC family developed by Socionext Inc.
  1419. (formerly, System LSI Business Division of Panasonic Corporation)
  1420. config STM32
  1421. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1422. select CPU_V7M
  1423. select DM
  1424. select DM_SERIAL
  1425. imply CMD_DM
  1426. config ARCH_STI
  1427. bool "Support STMicrolectronics SoCs"
  1428. select BLK
  1429. select CPU_V7A
  1430. select DM
  1431. select DM_MMC
  1432. select DM_RESET
  1433. select DM_SERIAL
  1434. imply CMD_DM
  1435. help
  1436. Support for STMicroelectronics STiH407/10 SoC family.
  1437. This SoC is used on Linaro 96Board STiH410-B2260
  1438. config ARCH_STM32MP
  1439. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1440. select ARCH_MISC_INIT
  1441. select ARCH_SUPPORT_TFABOOT
  1442. select BOARD_LATE_INIT
  1443. select CLK
  1444. select DM
  1445. select DM_GPIO
  1446. select DM_RESET
  1447. select DM_SERIAL
  1448. select MISC
  1449. select OF_CONTROL
  1450. select OF_LIBFDT
  1451. select OF_SYSTEM_SETUP
  1452. select PINCTRL
  1453. select REGMAP
  1454. select SUPPORT_SPL
  1455. select SYSCON
  1456. select SYSRESET
  1457. select SYS_THUMB_BUILD
  1458. imply SPL_SYSRESET
  1459. imply CMD_DM
  1460. imply CMD_POWEROFF
  1461. imply OF_LIBFDT_OVERLAY
  1462. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1463. imply USE_PREBOOT
  1464. help
  1465. Support for STM32MP SoC family developed by STMicroelectronics,
  1466. MPUs based on ARM cortex A core
  1467. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1468. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1469. chain.
  1470. SPL is the unsecure FSBL for the basic boot chain.
  1471. config ARCH_ROCKCHIP
  1472. bool "Support Rockchip SoCs"
  1473. select BLK
  1474. select BINMAN if !ARM64
  1475. select DM
  1476. select DM_GPIO
  1477. select DM_I2C
  1478. select DM_MMC
  1479. select DM_PWM
  1480. select DM_REGULATOR
  1481. select DM_SERIAL
  1482. select DM_SPI
  1483. select DM_SPI_FLASH
  1484. select DM_USB if USB
  1485. select ENABLE_ARM_SOC_BOOT0_HOOK
  1486. select OF_CONTROL
  1487. select SPI
  1488. select SPL_DM if SPL
  1489. select SYS_MALLOC_F
  1490. select SYS_THUMB_BUILD if !ARM64
  1491. imply ADC
  1492. imply CMD_DM
  1493. imply DEBUG_UART_BOARD_INIT
  1494. imply DISTRO_DEFAULTS
  1495. imply FAT_WRITE
  1496. imply SARADC_ROCKCHIP
  1497. imply SPL_SYSRESET
  1498. imply SPL_SYS_MALLOC_SIMPLE
  1499. imply SYS_NS16550
  1500. imply TPL_SYSRESET
  1501. imply USB_FUNCTION_FASTBOOT
  1502. config TARGET_THUNDERX_88XX
  1503. bool "Support ThunderX 88xx"
  1504. select ARM64
  1505. select OF_CONTROL
  1506. select PL01X_SERIAL
  1507. select SYS_CACHE_SHIFT_7
  1508. config ARCH_ASPEED
  1509. bool "Support Aspeed SoCs"
  1510. select DM
  1511. select OF_CONTROL
  1512. imply CMD_DM
  1513. config TARGET_DURIAN
  1514. bool "Support Phytium Durian Platform"
  1515. select ARM64
  1516. help
  1517. Support for durian platform.
  1518. It has 2GB Sdram, uart and pcie.
  1519. config TARGET_PRESIDIO_ASIC
  1520. bool "Support Cortina Presidio ASIC Platform"
  1521. select ARM64
  1522. endchoice
  1523. config ARCH_SUPPORT_TFABOOT
  1524. bool
  1525. config TFABOOT
  1526. bool "Support for booting from TF-A"
  1527. depends on ARCH_SUPPORT_TFABOOT
  1528. default n
  1529. help
  1530. Enabling this will make a U-Boot binary that is capable of being
  1531. booted via TF-A (Trusted Firmware for Cortex-A).
  1532. config TI_SECURE_DEVICE
  1533. bool "HS Device Type Support"
  1534. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1535. help
  1536. If a high secure (HS) device type is being used, this config
  1537. must be set. This option impacts various aspects of the
  1538. build system (to create signed boot images that can be
  1539. authenticated) and the code. See the doc/README.ti-secure
  1540. file for further details.
  1541. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1542. config ISW_ENTRY_ADDR
  1543. hex "Address in memory or XIP address of bootloader entry point"
  1544. default 0x402F4000 if AM43XX
  1545. default 0x402F0400 if AM33XX
  1546. default 0x40301350 if OMAP54XX
  1547. help
  1548. After any reset, the boot ROM searches the boot media for a valid
  1549. boot image. For non-XIP devices, the ROM then copies the image into
  1550. internal memory. For all boot modes, after the ROM processes the
  1551. boot image it eventually computes the entry point address depending
  1552. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1553. image headers.
  1554. endif
  1555. source "arch/arm/mach-aspeed/Kconfig"
  1556. source "arch/arm/mach-at91/Kconfig"
  1557. source "arch/arm/mach-bcm283x/Kconfig"
  1558. source "arch/arm/mach-bcmstb/Kconfig"
  1559. source "arch/arm/mach-davinci/Kconfig"
  1560. source "arch/arm/mach-exynos/Kconfig"
  1561. source "arch/arm/mach-highbank/Kconfig"
  1562. source "arch/arm/mach-integrator/Kconfig"
  1563. source "arch/arm/mach-k3/Kconfig"
  1564. source "arch/arm/mach-keystone/Kconfig"
  1565. source "arch/arm/mach-kirkwood/Kconfig"
  1566. source "arch/arm/mach-lpc32xx/Kconfig"
  1567. source "arch/arm/mach-mvebu/Kconfig"
  1568. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1569. source "arch/arm/mach-imx/mx2/Kconfig"
  1570. source "arch/arm/mach-imx/mx3/Kconfig"
  1571. source "arch/arm/mach-imx/mx5/Kconfig"
  1572. source "arch/arm/mach-imx/mx6/Kconfig"
  1573. source "arch/arm/mach-imx/mx7/Kconfig"
  1574. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1575. source "arch/arm/mach-imx/imx8/Kconfig"
  1576. source "arch/arm/mach-imx/imx8m/Kconfig"
  1577. source "arch/arm/mach-imx/imxrt/Kconfig"
  1578. source "arch/arm/mach-imx/mxs/Kconfig"
  1579. source "arch/arm/mach-omap2/Kconfig"
  1580. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1581. source "arch/arm/mach-orion5x/Kconfig"
  1582. source "arch/arm/mach-owl/Kconfig"
  1583. source "arch/arm/mach-rmobile/Kconfig"
  1584. source "arch/arm/mach-meson/Kconfig"
  1585. source "arch/arm/mach-mediatek/Kconfig"
  1586. source "arch/arm/mach-qemu/Kconfig"
  1587. source "arch/arm/mach-rockchip/Kconfig"
  1588. source "arch/arm/mach-s5pc1xx/Kconfig"
  1589. source "arch/arm/mach-snapdragon/Kconfig"
  1590. source "arch/arm/mach-socfpga/Kconfig"
  1591. source "arch/arm/mach-sti/Kconfig"
  1592. source "arch/arm/mach-stm32/Kconfig"
  1593. source "arch/arm/mach-stm32mp/Kconfig"
  1594. source "arch/arm/mach-sunxi/Kconfig"
  1595. source "arch/arm/mach-tegra/Kconfig"
  1596. source "arch/arm/mach-u8500/Kconfig"
  1597. source "arch/arm/mach-uniphier/Kconfig"
  1598. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1599. source "arch/arm/mach-zynq/Kconfig"
  1600. source "arch/arm/mach-zynqmp/Kconfig"
  1601. source "arch/arm/mach-versal/Kconfig"
  1602. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1603. source "arch/arm/cpu/armv7/Kconfig"
  1604. source "arch/arm/cpu/armv8/Kconfig"
  1605. source "arch/arm/mach-imx/Kconfig"
  1606. source "board/bosch/shc/Kconfig"
  1607. source "board/bosch/guardian/Kconfig"
  1608. source "board/CarMediaLab/flea3/Kconfig"
  1609. source "board/Marvell/aspenite/Kconfig"
  1610. source "board/Marvell/gplugd/Kconfig"
  1611. source "board/armadeus/apf27/Kconfig"
  1612. source "board/armltd/vexpress/Kconfig"
  1613. source "board/armltd/vexpress64/Kconfig"
  1614. source "board/cortina/presidio-asic/Kconfig"
  1615. source "board/broadcom/bcm23550_w1d/Kconfig"
  1616. source "board/broadcom/bcm28155_ap/Kconfig"
  1617. source "board/broadcom/bcm963158/Kconfig"
  1618. source "board/broadcom/bcm968360bg/Kconfig"
  1619. source "board/broadcom/bcm968580xref/Kconfig"
  1620. source "board/broadcom/bcmcygnus/Kconfig"
  1621. source "board/broadcom/bcmnsp/Kconfig"
  1622. source "board/broadcom/bcmns2/Kconfig"
  1623. source "board/cavium/thunderx/Kconfig"
  1624. source "board/cirrus/edb93xx/Kconfig"
  1625. source "board/eets/pdu001/Kconfig"
  1626. source "board/emulation/qemu-arm/Kconfig"
  1627. source "board/freescale/ls2080a/Kconfig"
  1628. source "board/freescale/ls2080aqds/Kconfig"
  1629. source "board/freescale/ls2080ardb/Kconfig"
  1630. source "board/freescale/ls1088a/Kconfig"
  1631. source "board/freescale/ls1028a/Kconfig"
  1632. source "board/freescale/ls1021aqds/Kconfig"
  1633. source "board/freescale/ls1043aqds/Kconfig"
  1634. source "board/freescale/ls1021atwr/Kconfig"
  1635. source "board/freescale/ls1021atsn/Kconfig"
  1636. source "board/freescale/ls1021aiot/Kconfig"
  1637. source "board/freescale/ls1046aqds/Kconfig"
  1638. source "board/freescale/ls1043ardb/Kconfig"
  1639. source "board/freescale/ls1046ardb/Kconfig"
  1640. source "board/freescale/ls1046afrwy/Kconfig"
  1641. source "board/freescale/ls1012aqds/Kconfig"
  1642. source "board/freescale/ls1012ardb/Kconfig"
  1643. source "board/freescale/ls1012afrdm/Kconfig"
  1644. source "board/freescale/lx2160a/Kconfig"
  1645. source "board/freescale/mx35pdk/Kconfig"
  1646. source "board/freescale/s32v234evb/Kconfig"
  1647. source "board/grinn/chiliboard/Kconfig"
  1648. source "board/gumstix/pepper/Kconfig"
  1649. source "board/hisilicon/hikey/Kconfig"
  1650. source "board/hisilicon/hikey960/Kconfig"
  1651. source "board/hisilicon/poplar/Kconfig"
  1652. source "board/isee/igep003x/Kconfig"
  1653. source "board/phytec/pcm051/Kconfig"
  1654. source "board/silica/pengwyn/Kconfig"
  1655. source "board/spear/spear300/Kconfig"
  1656. source "board/spear/spear310/Kconfig"
  1657. source "board/spear/spear320/Kconfig"
  1658. source "board/spear/spear600/Kconfig"
  1659. source "board/spear/x600/Kconfig"
  1660. source "board/st/stv0991/Kconfig"
  1661. source "board/tcl/sl50/Kconfig"
  1662. source "board/birdland/bav335x/Kconfig"
  1663. source "board/toradex/colibri_pxa270/Kconfig"
  1664. source "board/variscite/dart_6ul/Kconfig"
  1665. source "board/vscom/baltos/Kconfig"
  1666. source "board/xilinx/Kconfig"
  1667. source "board/xilinx/zynq/Kconfig"
  1668. source "board/xilinx/zynqmp/Kconfig"
  1669. source "board/phytium/durian/Kconfig"
  1670. source "arch/arm/Kconfig.debug"
  1671. endmenu
  1672. config SPL_LDSCRIPT
  1673. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1674. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1675. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64