mpc5121_nfc.c 15 KB

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  1. /*
  2. * Copyright 2004-2008 Freescale Semiconductor, Inc.
  3. * Copyright 2009 Semihalf.
  4. * (C) Copyright 2009 Stefan Roese <sr@denx.de>
  5. *
  6. * Based on original driver from Freescale Semiconductor
  7. * written by John Rigby <jrigby@freescale.com> on basis
  8. * of drivers/mtd/nand/mxc_nand.c. Reworked and extended
  9. * Piotr Ziecik <kosmo@semihalf.com>.
  10. *
  11. * SPDX-License-Identifier: GPL-2.0+
  12. */
  13. #include <common.h>
  14. #include <malloc.h>
  15. #include <linux/mtd/mtd.h>
  16. #include <linux/mtd/nand.h>
  17. #include <linux/mtd/nand_ecc.h>
  18. #include <linux/compat.h>
  19. #include <asm/errno.h>
  20. #include <asm/io.h>
  21. #include <asm/processor.h>
  22. #include <nand.h>
  23. #define DRV_NAME "mpc5121_nfc"
  24. /* Timeouts */
  25. #define NFC_RESET_TIMEOUT 1000 /* 1 ms */
  26. #define NFC_TIMEOUT 2000 /* 2000 us */
  27. /* Addresses for NFC MAIN RAM BUFFER areas */
  28. #define NFC_MAIN_AREA(n) ((n) * 0x200)
  29. /* Addresses for NFC SPARE BUFFER areas */
  30. #define NFC_SPARE_BUFFERS 8
  31. #define NFC_SPARE_LEN 0x40
  32. #define NFC_SPARE_AREA(n) (0x1000 + ((n) * NFC_SPARE_LEN))
  33. /* MPC5121 NFC registers */
  34. #define NFC_BUF_ADDR 0x1E04
  35. #define NFC_FLASH_ADDR 0x1E06
  36. #define NFC_FLASH_CMD 0x1E08
  37. #define NFC_CONFIG 0x1E0A
  38. #define NFC_ECC_STATUS1 0x1E0C
  39. #define NFC_ECC_STATUS2 0x1E0E
  40. #define NFC_SPAS 0x1E10
  41. #define NFC_WRPROT 0x1E12
  42. #define NFC_NF_WRPRST 0x1E18
  43. #define NFC_CONFIG1 0x1E1A
  44. #define NFC_CONFIG2 0x1E1C
  45. #define NFC_UNLOCKSTART_BLK0 0x1E20
  46. #define NFC_UNLOCKEND_BLK0 0x1E22
  47. #define NFC_UNLOCKSTART_BLK1 0x1E24
  48. #define NFC_UNLOCKEND_BLK1 0x1E26
  49. #define NFC_UNLOCKSTART_BLK2 0x1E28
  50. #define NFC_UNLOCKEND_BLK2 0x1E2A
  51. #define NFC_UNLOCKSTART_BLK3 0x1E2C
  52. #define NFC_UNLOCKEND_BLK3 0x1E2E
  53. /* Bit Definitions: NFC_BUF_ADDR */
  54. #define NFC_RBA_MASK (7 << 0)
  55. #define NFC_ACTIVE_CS_SHIFT 5
  56. #define NFC_ACTIVE_CS_MASK (3 << NFC_ACTIVE_CS_SHIFT)
  57. /* Bit Definitions: NFC_CONFIG */
  58. #define NFC_BLS_UNLOCKED (1 << 1)
  59. /* Bit Definitions: NFC_CONFIG1 */
  60. #define NFC_ECC_4BIT (1 << 0)
  61. #define NFC_FULL_PAGE_DMA (1 << 1)
  62. #define NFC_SPARE_ONLY (1 << 2)
  63. #define NFC_ECC_ENABLE (1 << 3)
  64. #define NFC_INT_MASK (1 << 4)
  65. #define NFC_BIG_ENDIAN (1 << 5)
  66. #define NFC_RESET (1 << 6)
  67. #define NFC_CE (1 << 7)
  68. #define NFC_ONE_CYCLE (1 << 8)
  69. #define NFC_PPB_32 (0 << 9)
  70. #define NFC_PPB_64 (1 << 9)
  71. #define NFC_PPB_128 (2 << 9)
  72. #define NFC_PPB_256 (3 << 9)
  73. #define NFC_PPB_MASK (3 << 9)
  74. #define NFC_FULL_PAGE_INT (1 << 11)
  75. /* Bit Definitions: NFC_CONFIG2 */
  76. #define NFC_COMMAND (1 << 0)
  77. #define NFC_ADDRESS (1 << 1)
  78. #define NFC_INPUT (1 << 2)
  79. #define NFC_OUTPUT (1 << 3)
  80. #define NFC_ID (1 << 4)
  81. #define NFC_STATUS (1 << 5)
  82. #define NFC_CMD_FAIL (1 << 15)
  83. #define NFC_INT (1 << 15)
  84. /* Bit Definitions: NFC_WRPROT */
  85. #define NFC_WPC_LOCK_TIGHT (1 << 0)
  86. #define NFC_WPC_LOCK (1 << 1)
  87. #define NFC_WPC_UNLOCK (1 << 2)
  88. struct mpc5121_nfc_prv {
  89. struct mtd_info mtd;
  90. struct nand_chip chip;
  91. int irq;
  92. void __iomem *regs;
  93. struct clk *clk;
  94. uint column;
  95. int spareonly;
  96. int chipsel;
  97. };
  98. int mpc5121_nfc_chip = 0;
  99. static void mpc5121_nfc_done(struct mtd_info *mtd);
  100. /* Read NFC register */
  101. static inline u16 nfc_read(struct mtd_info *mtd, uint reg)
  102. {
  103. struct nand_chip *chip = mtd_to_nand(mtd);
  104. struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
  105. return in_be16(prv->regs + reg);
  106. }
  107. /* Write NFC register */
  108. static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val)
  109. {
  110. struct nand_chip *chip = mtd_to_nand(mtd);
  111. struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
  112. out_be16(prv->regs + reg, val);
  113. }
  114. /* Set bits in NFC register */
  115. static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits)
  116. {
  117. nfc_write(mtd, reg, nfc_read(mtd, reg) | bits);
  118. }
  119. /* Clear bits in NFC register */
  120. static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits)
  121. {
  122. nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits);
  123. }
  124. /* Invoke address cycle */
  125. static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr)
  126. {
  127. nfc_write(mtd, NFC_FLASH_ADDR, addr);
  128. nfc_write(mtd, NFC_CONFIG2, NFC_ADDRESS);
  129. mpc5121_nfc_done(mtd);
  130. }
  131. /* Invoke command cycle */
  132. static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd)
  133. {
  134. nfc_write(mtd, NFC_FLASH_CMD, cmd);
  135. nfc_write(mtd, NFC_CONFIG2, NFC_COMMAND);
  136. mpc5121_nfc_done(mtd);
  137. }
  138. /* Send data from NFC buffers to NAND flash */
  139. static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd)
  140. {
  141. nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
  142. nfc_write(mtd, NFC_CONFIG2, NFC_INPUT);
  143. mpc5121_nfc_done(mtd);
  144. }
  145. /* Receive data from NAND flash */
  146. static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd)
  147. {
  148. nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
  149. nfc_write(mtd, NFC_CONFIG2, NFC_OUTPUT);
  150. mpc5121_nfc_done(mtd);
  151. }
  152. /* Receive ID from NAND flash */
  153. static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd)
  154. {
  155. nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
  156. nfc_write(mtd, NFC_CONFIG2, NFC_ID);
  157. mpc5121_nfc_done(mtd);
  158. }
  159. /* Receive status from NAND flash */
  160. static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd)
  161. {
  162. nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
  163. nfc_write(mtd, NFC_CONFIG2, NFC_STATUS);
  164. mpc5121_nfc_done(mtd);
  165. }
  166. static void mpc5121_nfc_done(struct mtd_info *mtd)
  167. {
  168. int max_retries = NFC_TIMEOUT;
  169. while (1) {
  170. max_retries--;
  171. if (nfc_read(mtd, NFC_CONFIG2) & NFC_INT)
  172. break;
  173. udelay(1);
  174. }
  175. if (max_retries <= 0)
  176. printk(KERN_WARNING DRV_NAME
  177. ": Timeout while waiting for completion.\n");
  178. }
  179. /* Do address cycle(s) */
  180. static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
  181. {
  182. struct nand_chip *chip = mtd_to_nand(mtd);
  183. u32 pagemask = chip->pagemask;
  184. if (column != -1) {
  185. mpc5121_nfc_send_addr(mtd, column);
  186. if (mtd->writesize > 512)
  187. mpc5121_nfc_send_addr(mtd, column >> 8);
  188. }
  189. if (page != -1) {
  190. do {
  191. mpc5121_nfc_send_addr(mtd, page & 0xFF);
  192. page >>= 8;
  193. pagemask >>= 8;
  194. } while (pagemask);
  195. }
  196. }
  197. /* Control chip select signals */
  198. /*
  199. * Selecting the active device:
  200. *
  201. * This is different than the linux version. Switching between chips
  202. * is done via board_nand_select_device(). The Linux select_chip
  203. * function used here in U-Boot has only 2 valid chip numbers:
  204. * 0 select
  205. * -1 deselect
  206. */
  207. /*
  208. * Implement it as a weak default, so that boards with a specific
  209. * chip-select routine can use their own function.
  210. */
  211. void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
  212. {
  213. if (chip < 0) {
  214. nfc_clear(mtd, NFC_CONFIG1, NFC_CE);
  215. return;
  216. }
  217. nfc_clear(mtd, NFC_BUF_ADDR, NFC_ACTIVE_CS_MASK);
  218. nfc_set(mtd, NFC_BUF_ADDR, (chip << NFC_ACTIVE_CS_SHIFT) &
  219. NFC_ACTIVE_CS_MASK);
  220. nfc_set(mtd, NFC_CONFIG1, NFC_CE);
  221. }
  222. void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
  223. __attribute__((weak, alias("__mpc5121_nfc_select_chip")));
  224. void board_nand_select_device(struct nand_chip *nand, int chip)
  225. {
  226. /*
  227. * Only save this chip number in global variable here. This
  228. * will be used later in mpc5121_nfc_select_chip().
  229. */
  230. mpc5121_nfc_chip = chip;
  231. }
  232. /* Read NAND Ready/Busy signal */
  233. static int mpc5121_nfc_dev_ready(struct mtd_info *mtd)
  234. {
  235. /*
  236. * NFC handles ready/busy signal internally. Therefore, this function
  237. * always returns status as ready.
  238. */
  239. return 1;
  240. }
  241. /* Write command to NAND flash */
  242. static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command,
  243. int column, int page)
  244. {
  245. struct nand_chip *chip = mtd_to_nand(mtd);
  246. struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
  247. prv->column = (column >= 0) ? column : 0;
  248. prv->spareonly = 0;
  249. switch (command) {
  250. case NAND_CMD_PAGEPROG:
  251. mpc5121_nfc_send_prog_page(mtd);
  252. break;
  253. /*
  254. * NFC does not support sub-page reads and writes,
  255. * so emulate them using full page transfers.
  256. */
  257. case NAND_CMD_READ0:
  258. column = 0;
  259. break;
  260. case NAND_CMD_READ1:
  261. prv->column += 256;
  262. command = NAND_CMD_READ0;
  263. column = 0;
  264. break;
  265. case NAND_CMD_READOOB:
  266. prv->spareonly = 1;
  267. command = NAND_CMD_READ0;
  268. column = 0;
  269. break;
  270. case NAND_CMD_SEQIN:
  271. mpc5121_nfc_command(mtd, NAND_CMD_READ0, column, page);
  272. column = 0;
  273. break;
  274. case NAND_CMD_ERASE1:
  275. case NAND_CMD_ERASE2:
  276. case NAND_CMD_READID:
  277. case NAND_CMD_STATUS:
  278. case NAND_CMD_RESET:
  279. break;
  280. default:
  281. return;
  282. }
  283. mpc5121_nfc_send_cmd(mtd, command);
  284. mpc5121_nfc_addr_cycle(mtd, column, page);
  285. switch (command) {
  286. case NAND_CMD_READ0:
  287. if (mtd->writesize > 512)
  288. mpc5121_nfc_send_cmd(mtd, NAND_CMD_READSTART);
  289. mpc5121_nfc_send_read_page(mtd);
  290. break;
  291. case NAND_CMD_READID:
  292. mpc5121_nfc_send_read_id(mtd);
  293. break;
  294. case NAND_CMD_STATUS:
  295. mpc5121_nfc_send_read_status(mtd);
  296. if (chip->options & NAND_BUSWIDTH_16)
  297. prv->column = 1;
  298. else
  299. prv->column = 0;
  300. break;
  301. }
  302. }
  303. /* Copy data from/to NFC spare buffers. */
  304. static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset,
  305. u8 * buffer, uint size, int wr)
  306. {
  307. struct nand_chip *nand = mtd_to_nand(mtd);
  308. struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand);
  309. uint o, s, sbsize, blksize;
  310. /*
  311. * NAND spare area is available through NFC spare buffers.
  312. * The NFC divides spare area into (page_size / 512) chunks.
  313. * Each chunk is placed into separate spare memory area, using
  314. * first (spare_size / num_of_chunks) bytes of the buffer.
  315. *
  316. * For NAND device in which the spare area is not divided fully
  317. * by the number of chunks, number of used bytes in each spare
  318. * buffer is rounded down to the nearest even number of bytes,
  319. * and all remaining bytes are added to the last used spare area.
  320. *
  321. * For more information read section 26.6.10 of MPC5121e
  322. * Microcontroller Reference Manual, Rev. 3.
  323. */
  324. /* Calculate number of valid bytes in each spare buffer */
  325. sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1;
  326. while (size) {
  327. /* Calculate spare buffer number */
  328. s = offset / sbsize;
  329. if (s > NFC_SPARE_BUFFERS - 1)
  330. s = NFC_SPARE_BUFFERS - 1;
  331. /*
  332. * Calculate offset to requested data block in selected spare
  333. * buffer and its size.
  334. */
  335. o = offset - (s * sbsize);
  336. blksize = min(sbsize - o, size);
  337. if (wr)
  338. memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o,
  339. buffer, blksize);
  340. else
  341. memcpy_fromio(buffer,
  342. prv->regs + NFC_SPARE_AREA(s) + o,
  343. blksize);
  344. buffer += blksize;
  345. offset += blksize;
  346. size -= blksize;
  347. };
  348. }
  349. /* Copy data from/to NFC main and spare buffers */
  350. static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char * buf, int len,
  351. int wr)
  352. {
  353. struct nand_chip *chip = mtd_to_nand(mtd);
  354. struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
  355. uint c = prv->column;
  356. uint l;
  357. /* Handle spare area access */
  358. if (prv->spareonly || c >= mtd->writesize) {
  359. /* Calculate offset from beginning of spare area */
  360. if (c >= mtd->writesize)
  361. c -= mtd->writesize;
  362. prv->column += len;
  363. mpc5121_nfc_copy_spare(mtd, c, buf, len, wr);
  364. return;
  365. }
  366. /*
  367. * Handle main area access - limit copy length to prevent
  368. * crossing main/spare boundary.
  369. */
  370. l = min((uint) len, mtd->writesize - c);
  371. prv->column += l;
  372. if (wr)
  373. memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l);
  374. else
  375. memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l);
  376. /* Handle crossing main/spare boundary */
  377. if (l != len) {
  378. buf += l;
  379. len -= l;
  380. mpc5121_nfc_buf_copy(mtd, buf, len, wr);
  381. }
  382. }
  383. /* Read data from NFC buffers */
  384. static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char * buf, int len)
  385. {
  386. mpc5121_nfc_buf_copy(mtd, buf, len, 0);
  387. }
  388. /* Write data to NFC buffers */
  389. static void mpc5121_nfc_write_buf(struct mtd_info *mtd,
  390. const u_char * buf, int len)
  391. {
  392. mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1);
  393. }
  394. /* Read byte from NFC buffers */
  395. static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
  396. {
  397. u8 tmp;
  398. mpc5121_nfc_read_buf(mtd, &tmp, sizeof(tmp));
  399. return tmp;
  400. }
  401. /* Read word from NFC buffers */
  402. static u16 mpc5121_nfc_read_word(struct mtd_info *mtd)
  403. {
  404. u16 tmp;
  405. mpc5121_nfc_read_buf(mtd, (u_char *) & tmp, sizeof(tmp));
  406. return tmp;
  407. }
  408. /*
  409. * Read NFC configuration from Reset Config Word
  410. *
  411. * NFC is configured during reset in basis of information stored
  412. * in Reset Config Word. There is no other way to set NAND block
  413. * size, spare size and bus width.
  414. */
  415. static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd)
  416. {
  417. immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
  418. struct nand_chip *chip = mtd_to_nand(mtd);
  419. uint rcw_pagesize = 0;
  420. uint rcw_sparesize = 0;
  421. uint rcw_width;
  422. uint rcwh;
  423. uint romloc, ps;
  424. rcwh = in_be32(&(im->reset.rcwh));
  425. /* Bit 6: NFC bus width */
  426. rcw_width = ((rcwh >> 6) & 0x1) ? 2 : 1;
  427. /* Bit 7: NFC Page/Spare size */
  428. ps = (rcwh >> 7) & 0x1;
  429. /* Bits [22:21]: ROM Location */
  430. romloc = (rcwh >> 21) & 0x3;
  431. /* Decode RCW bits */
  432. switch ((ps << 2) | romloc) {
  433. case 0x00:
  434. case 0x01:
  435. rcw_pagesize = 512;
  436. rcw_sparesize = 16;
  437. break;
  438. case 0x02:
  439. case 0x03:
  440. rcw_pagesize = 4096;
  441. rcw_sparesize = 128;
  442. break;
  443. case 0x04:
  444. case 0x05:
  445. rcw_pagesize = 2048;
  446. rcw_sparesize = 64;
  447. break;
  448. case 0x06:
  449. case 0x07:
  450. rcw_pagesize = 4096;
  451. rcw_sparesize = 218;
  452. break;
  453. }
  454. mtd->writesize = rcw_pagesize;
  455. mtd->oobsize = rcw_sparesize;
  456. if (rcw_width == 2)
  457. chip->options |= NAND_BUSWIDTH_16;
  458. debug(KERN_NOTICE DRV_NAME ": Configured for "
  459. "%u-bit NAND, page size %u with %u spare.\n",
  460. rcw_width * 8, rcw_pagesize, rcw_sparesize);
  461. return 0;
  462. }
  463. int board_nand_init(struct nand_chip *chip)
  464. {
  465. struct mpc5121_nfc_prv *prv;
  466. struct mtd_info *mtd;
  467. int resettime = 0;
  468. int retval = 0;
  469. int rev;
  470. /*
  471. * Check SoC revision. This driver supports only NFC
  472. * in MPC5121 revision 2.
  473. */
  474. rev = (mfspr(SPRN_SVR) >> 4) & 0xF;
  475. if (rev != 2) {
  476. printk(KERN_ERR DRV_NAME
  477. ": SoC revision %u is not supported!\n", rev);
  478. return -ENXIO;
  479. }
  480. prv = malloc(sizeof(*prv));
  481. if (!prv) {
  482. printk(KERN_ERR DRV_NAME ": Memory exhausted!\n");
  483. return -ENOMEM;
  484. }
  485. mtd = &chip->mtd;
  486. nand_set_controller_data(chip, prv);
  487. /* Read NFC configuration from Reset Config Word */
  488. retval = mpc5121_nfc_read_hw_config(mtd);
  489. if (retval) {
  490. printk(KERN_ERR DRV_NAME ": Unable to read NFC config!\n");
  491. return retval;
  492. }
  493. prv->regs = (void __iomem *)CONFIG_SYS_NAND_BASE;
  494. chip->dev_ready = mpc5121_nfc_dev_ready;
  495. chip->cmdfunc = mpc5121_nfc_command;
  496. chip->read_byte = mpc5121_nfc_read_byte;
  497. chip->read_word = mpc5121_nfc_read_word;
  498. chip->read_buf = mpc5121_nfc_read_buf;
  499. chip->write_buf = mpc5121_nfc_write_buf;
  500. chip->select_chip = mpc5121_nfc_select_chip;
  501. chip->bbt_options = NAND_BBT_USE_FLASH;
  502. chip->ecc.mode = NAND_ECC_SOFT;
  503. /* Reset NAND Flash controller */
  504. nfc_set(mtd, NFC_CONFIG1, NFC_RESET);
  505. while (nfc_read(mtd, NFC_CONFIG1) & NFC_RESET) {
  506. if (resettime++ >= NFC_RESET_TIMEOUT) {
  507. printk(KERN_ERR DRV_NAME
  508. ": Timeout while resetting NFC!\n");
  509. retval = -EINVAL;
  510. goto error;
  511. }
  512. udelay(1);
  513. }
  514. /* Enable write to NFC memory */
  515. nfc_write(mtd, NFC_CONFIG, NFC_BLS_UNLOCKED);
  516. /* Enable write to all NAND pages */
  517. nfc_write(mtd, NFC_UNLOCKSTART_BLK0, 0x0000);
  518. nfc_write(mtd, NFC_UNLOCKEND_BLK0, 0xFFFF);
  519. nfc_write(mtd, NFC_WRPROT, NFC_WPC_UNLOCK);
  520. /*
  521. * Setup NFC:
  522. * - Big Endian transfers,
  523. * - Interrupt after full page read/write.
  524. */
  525. nfc_write(mtd, NFC_CONFIG1, NFC_BIG_ENDIAN | NFC_INT_MASK |
  526. NFC_FULL_PAGE_INT);
  527. /* Set spare area size */
  528. nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1);
  529. /* Detect NAND chips */
  530. if (nand_scan(mtd, 1)) {
  531. printk(KERN_ERR DRV_NAME ": NAND Flash not found !\n");
  532. retval = -ENXIO;
  533. goto error;
  534. }
  535. /* Set erase block size */
  536. switch (mtd->erasesize / mtd->writesize) {
  537. case 32:
  538. nfc_set(mtd, NFC_CONFIG1, NFC_PPB_32);
  539. break;
  540. case 64:
  541. nfc_set(mtd, NFC_CONFIG1, NFC_PPB_64);
  542. break;
  543. case 128:
  544. nfc_set(mtd, NFC_CONFIG1, NFC_PPB_128);
  545. break;
  546. case 256:
  547. nfc_set(mtd, NFC_CONFIG1, NFC_PPB_256);
  548. break;
  549. default:
  550. printk(KERN_ERR DRV_NAME ": Unsupported NAND flash!\n");
  551. retval = -ENXIO;
  552. goto error;
  553. }
  554. return 0;
  555. error:
  556. return retval;
  557. }