nand.c 3.8 KB

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  1. /*
  2. * (C) Copyright 2008
  3. * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #if defined(CONFIG_SYS_NAND_BASE)
  9. #include <nand.h>
  10. #include <asm/errno.h>
  11. #include <asm/io.h>
  12. static int state;
  13. static void sc_nand_write_byte(struct mtd_info *mtd, u_char byte);
  14. static void sc_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
  15. static u_char sc_nand_read_byte(struct mtd_info *mtd);
  16. static u16 sc_nand_read_word(struct mtd_info *mtd);
  17. static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
  18. static int sc_nand_device_ready(struct mtd_info *mtdinfo);
  19. #define FPGA_NAND_CMD_MASK (0x7 << 28)
  20. #define FPGA_NAND_CMD_COMMAND (0x0 << 28)
  21. #define FPGA_NAND_CMD_ADDR (0x1 << 28)
  22. #define FPGA_NAND_CMD_READ (0x2 << 28)
  23. #define FPGA_NAND_CMD_WRITE (0x3 << 28)
  24. #define FPGA_NAND_BUSY (0x1 << 15)
  25. #define FPGA_NAND_ENABLE (0x1 << 31)
  26. #define FPGA_NAND_DATA_SHIFT 16
  27. /**
  28. * sc_nand_write_byte - write one byte to the chip
  29. * @mtd: MTD device structure
  30. * @byte: pointer to data byte to write
  31. */
  32. static void sc_nand_write_byte(struct mtd_info *mtd, u_char byte)
  33. {
  34. sc_nand_write_buf(mtd, (const uchar *)&byte, sizeof(byte));
  35. }
  36. /**
  37. * sc_nand_write_buf - write buffer to chip
  38. * @mtd: MTD device structure
  39. * @buf: data buffer
  40. * @len: number of bytes to write
  41. */
  42. static void sc_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
  43. {
  44. int i;
  45. struct nand_chip *this = mtd_to_nand(mtd);
  46. for (i = 0; i < len; i++) {
  47. out_be32(this->IO_ADDR_W,
  48. state | (buf[i] << FPGA_NAND_DATA_SHIFT));
  49. }
  50. }
  51. /**
  52. * sc_nand_read_byte - read one byte from the chip
  53. * @mtd: MTD device structure
  54. */
  55. static u_char sc_nand_read_byte(struct mtd_info *mtd)
  56. {
  57. u8 byte;
  58. sc_nand_read_buf(mtd, (uchar *)&byte, sizeof(byte));
  59. return byte;
  60. }
  61. /**
  62. * sc_nand_read_word - read one word from the chip
  63. * @mtd: MTD device structure
  64. */
  65. static u16 sc_nand_read_word(struct mtd_info *mtd)
  66. {
  67. u16 word;
  68. sc_nand_read_buf(mtd, (uchar *)&word, sizeof(word));
  69. return word;
  70. }
  71. /**
  72. * sc_nand_read_buf - read chip data into buffer
  73. * @mtd: MTD device structure
  74. * @buf: buffer to store date
  75. * @len: number of bytes to read
  76. */
  77. static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
  78. {
  79. int i;
  80. struct nand_chip *this = mtd_to_nand(mtd);
  81. int val;
  82. val = (state & FPGA_NAND_ENABLE) | FPGA_NAND_CMD_READ;
  83. out_be32(this->IO_ADDR_W, val);
  84. for (i = 0; i < len; i++) {
  85. buf[i] = (in_be32(this->IO_ADDR_R) >> FPGA_NAND_DATA_SHIFT) & 0xff;
  86. }
  87. }
  88. /**
  89. * sc_nand_device_ready - Check the NAND device is ready for next command.
  90. * @mtd: MTD device structure
  91. */
  92. static int sc_nand_device_ready(struct mtd_info *mtdinfo)
  93. {
  94. struct nand_chip *this = mtd_to_nand(mtdinfo);
  95. if (in_be32(this->IO_ADDR_W) & FPGA_NAND_BUSY)
  96. return 0; /* busy */
  97. return 1;
  98. }
  99. /**
  100. * sc_nand_hwcontrol - NAND control functions wrapper.
  101. * @mtd: MTD device structure
  102. * @cmd: Command
  103. */
  104. static void sc_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
  105. {
  106. if (ctrl & NAND_CTRL_CHANGE) {
  107. state &= ~(FPGA_NAND_CMD_MASK | FPGA_NAND_ENABLE);
  108. switch (ctrl & (NAND_ALE | NAND_CLE)) {
  109. case 0:
  110. state |= FPGA_NAND_CMD_WRITE;
  111. break;
  112. case NAND_ALE:
  113. state |= FPGA_NAND_CMD_ADDR;
  114. break;
  115. case NAND_CLE:
  116. state |= FPGA_NAND_CMD_COMMAND;
  117. break;
  118. default:
  119. printf("%s: unknown ctrl %#x\n", __FUNCTION__, ctrl);
  120. }
  121. if (ctrl & NAND_NCE)
  122. state |= FPGA_NAND_ENABLE;
  123. }
  124. if (cmd != NAND_CMD_NONE)
  125. sc_nand_write_byte(mtdinfo, cmd);
  126. }
  127. int board_nand_init(struct nand_chip *nand)
  128. {
  129. nand->cmd_ctrl = sc_nand_hwcontrol;
  130. nand->ecc.mode = NAND_ECC_SOFT;
  131. nand->dev_ready = sc_nand_device_ready;
  132. nand->read_byte = sc_nand_read_byte;
  133. nand->read_word = sc_nand_read_word;
  134. nand->write_buf = sc_nand_write_buf;
  135. nand->read_buf = sc_nand_read_buf;
  136. return 0;
  137. }
  138. #endif