mpc5xxx.c 4.5 KB

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  1. /*
  2. * (C) Copyright 2004
  3. * Reinhard Meyer, EMK Elektronik GmbH
  4. * r.meyer@emk-elektronik.de
  5. * www.emk-elektronik.de
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. /*****************************************************************************
  26. * Date & Time support for internal RTC of MPC52xx
  27. *****************************************************************************/
  28. /*#define DEBUG*/
  29. #include <common.h>
  30. #include <command.h>
  31. #include <rtc.h>
  32. #if defined(CONFIG_CMD_DATE)
  33. /*****************************************************************************
  34. * this structure should be defined in mpc5200.h ...
  35. *****************************************************************************/
  36. typedef struct rtc5200 {
  37. volatile ulong tsr; /* MBAR+0x800: time set register */
  38. volatile ulong dsr; /* MBAR+0x804: data set register */
  39. volatile ulong nysr; /* MBAR+0x808: new year and stopwatch register */
  40. volatile ulong aier; /* MBAR+0x80C: alarm and interrupt enable register */
  41. volatile ulong ctr; /* MBAR+0x810: current time register */
  42. volatile ulong cdr; /* MBAR+0x814: current data register */
  43. volatile ulong asir; /* MBAR+0x818: alarm and stopwatch interrupt register */
  44. volatile ulong piber; /* MBAR+0x81C: periodic interrupt and bus error register */
  45. volatile ulong trdr; /* MBAR+0x820: test register/divides register */
  46. } RTC5200;
  47. #define RTC_SET 0x02000000
  48. #define RTC_PAUSE 0x01000000
  49. /*****************************************************************************
  50. * get time
  51. *****************************************************************************/
  52. int rtc_get (struct rtc_time *tmp)
  53. {
  54. RTC5200 *rtc = (RTC5200 *) (CONFIG_SYS_MBAR+0x800);
  55. ulong time, date, time2;
  56. /* read twice to avoid getting a funny time when the second is just changing */
  57. do {
  58. time = rtc->ctr;
  59. date = rtc->cdr;
  60. time2 = rtc->ctr;
  61. } while (time != time2);
  62. tmp->tm_year = date & 0xfff;
  63. tmp->tm_mon = (date >> 24) & 0xf;
  64. tmp->tm_mday = (date >> 16) & 0x1f;
  65. tmp->tm_wday = (date >> 21) & 7;
  66. /* sunday is 7 in 5200 but 0 in rtc_time */
  67. if (tmp->tm_wday == 7)
  68. tmp->tm_wday = 0;
  69. tmp->tm_hour = (time >> 16) & 0x1f;
  70. tmp->tm_min = (time >> 8) & 0x3f;
  71. tmp->tm_sec = time & 0x3f;
  72. debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  73. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  74. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  75. return 0;
  76. }
  77. /*****************************************************************************
  78. * set time
  79. *****************************************************************************/
  80. int rtc_set (struct rtc_time *tmp)
  81. {
  82. RTC5200 *rtc = (RTC5200 *) (CONFIG_SYS_MBAR+0x800);
  83. ulong time, date, year;
  84. debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  85. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  86. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  87. time = (tmp->tm_hour << 16) | (tmp->tm_min << 8) | tmp->tm_sec;
  88. date = (tmp->tm_mon << 16) | tmp->tm_mday;
  89. if (tmp->tm_wday == 0)
  90. date |= (7 << 8);
  91. else
  92. date |= (tmp->tm_wday << 8);
  93. year = tmp->tm_year;
  94. /* mask unwanted bits that might show up when rtc_time is corrupt */
  95. time &= 0x001f3f3f;
  96. date &= 0x001f071f;
  97. year &= 0x00000fff;
  98. /* pause and set the RTC */
  99. rtc->nysr = year;
  100. rtc->dsr = date | RTC_PAUSE;
  101. udelay (1000);
  102. rtc->dsr = date | RTC_PAUSE | RTC_SET;
  103. udelay (1000);
  104. rtc->dsr = date | RTC_PAUSE;
  105. udelay (1000);
  106. rtc->dsr = date;
  107. udelay (1000);
  108. rtc->tsr = time | RTC_PAUSE;
  109. udelay (1000);
  110. rtc->tsr = time | RTC_PAUSE | RTC_SET;
  111. udelay (1000);
  112. rtc->tsr = time | RTC_PAUSE;
  113. udelay (1000);
  114. rtc->tsr = time;
  115. udelay (1000);
  116. return 0;
  117. }
  118. /*****************************************************************************
  119. * reset rtc circuit
  120. *****************************************************************************/
  121. void rtc_reset (void)
  122. {
  123. return; /* nothing to do */
  124. }
  125. #endif