greth.c 18 KB

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  1. /* Gaisler.com GRETH 10/100/1000 Ethernet MAC driver
  2. *
  3. * Driver use polling mode (no Interrupt)
  4. *
  5. * (C) Copyright 2007
  6. * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. /* #define DEBUG */
  27. #include <common.h>
  28. #include <command.h>
  29. #include <net.h>
  30. #include <netdev.h>
  31. #include <malloc.h>
  32. #include <asm/processor.h>
  33. #include <ambapp.h>
  34. #include <asm/leon.h>
  35. #include "greth.h"
  36. /* Default to 3s timeout on autonegotiation */
  37. #ifndef GRETH_PHY_TIMEOUT_MS
  38. #define GRETH_PHY_TIMEOUT_MS 3000
  39. #endif
  40. /* Default to PHY adrress 0 not not specified */
  41. #ifdef CONFIG_SYS_GRLIB_GRETH_PHYADDR
  42. #define GRETH_PHY_ADR_DEFAULT CONFIG_SYS_GRLIB_GRETH_PHYADDR
  43. #else
  44. #define GRETH_PHY_ADR_DEFAULT 0
  45. #endif
  46. /* ByPass Cache when reading regs */
  47. #define GRETH_REGLOAD(addr) SPARC_NOCACHE_READ(addr)
  48. /* Write-through cache ==> no bypassing needed on writes */
  49. #define GRETH_REGSAVE(addr,data) (*(volatile unsigned int *)(addr) = (data))
  50. #define GRETH_REGORIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)|data)
  51. #define GRETH_REGANDIN(addr,data) GRETH_REGSAVE(addr,GRETH_REGLOAD(addr)&data)
  52. #define GRETH_RXBD_CNT 4
  53. #define GRETH_TXBD_CNT 1
  54. #define GRETH_RXBUF_SIZE 1540
  55. #define GRETH_BUF_ALIGN 4
  56. #define GRETH_RXBUF_EFF_SIZE \
  57. ( (GRETH_RXBUF_SIZE&~(GRETH_BUF_ALIGN-1))+GRETH_BUF_ALIGN )
  58. typedef struct {
  59. greth_regs *regs;
  60. int irq;
  61. struct eth_device *dev;
  62. /* Hardware info */
  63. unsigned char phyaddr;
  64. int gbit_mac;
  65. /* Current operating Mode */
  66. int gb; /* GigaBit */
  67. int fd; /* Full Duplex */
  68. int sp; /* 10/100Mbps speed (1=100,0=10) */
  69. int auto_neg; /* Auto negotiate done */
  70. unsigned char hwaddr[6]; /* MAC Address */
  71. /* Descriptors */
  72. greth_bd *rxbd_base, *rxbd_max;
  73. greth_bd *txbd_base, *txbd_max;
  74. greth_bd *rxbd_curr;
  75. /* rx buffers in rx descriptors */
  76. void *rxbuf_base; /* (GRETH_RXBUF_SIZE+ALIGNBYTES) * GRETH_RXBD_CNT */
  77. /* unused for gbit_mac, temp buffer for sending packets with unligned
  78. * start.
  79. * Pointer to packet allocated with malloc.
  80. */
  81. void *txbuf;
  82. struct {
  83. /* rx status */
  84. unsigned int rx_packets,
  85. rx_crc_errors, rx_frame_errors, rx_length_errors, rx_errors;
  86. /* tx stats */
  87. unsigned int tx_packets,
  88. tx_latecol_errors,
  89. tx_underrun_errors, tx_limit_errors, tx_errors;
  90. } stats;
  91. } greth_priv;
  92. /* Read MII register 'addr' from core 'regs' */
  93. static int read_mii(int phyaddr, int regaddr, volatile greth_regs * regs)
  94. {
  95. while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
  96. }
  97. GRETH_REGSAVE(&regs->mdio, ((phyaddr & 0x1F) << 11) | ((regaddr & 0x1F) << 6) | 2);
  98. while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
  99. }
  100. if (!(GRETH_REGLOAD(&regs->mdio) & GRETH_MII_NVALID)) {
  101. return (GRETH_REGLOAD(&regs->mdio) >> 16) & 0xFFFF;
  102. } else {
  103. return -1;
  104. }
  105. }
  106. static void write_mii(int phyaddr, int regaddr, int data, volatile greth_regs * regs)
  107. {
  108. while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
  109. }
  110. GRETH_REGSAVE(&regs->mdio,
  111. ((data & 0xFFFF) << 16) | ((phyaddr & 0x1F) << 11) |
  112. ((regaddr & 0x1F) << 6) | 1);
  113. while (GRETH_REGLOAD(&regs->mdio) & GRETH_MII_BUSY) {
  114. }
  115. }
  116. /* init/start hardware and allocate descriptor buffers for rx side
  117. *
  118. */
  119. int greth_init(struct eth_device *dev, bd_t * bis)
  120. {
  121. int i;
  122. greth_priv *greth = dev->priv;
  123. greth_regs *regs = greth->regs;
  124. debug("greth_init\n");
  125. /* Reset core */
  126. GRETH_REGSAVE(&regs->control, (GRETH_RESET | (greth->gb << 8) |
  127. (greth->sp << 7) | (greth->fd << 4)));
  128. /* Wait for Reset to complete */
  129. while ( GRETH_REGLOAD(&regs->control) & GRETH_RESET) ;
  130. GRETH_REGSAVE(&regs->control,
  131. ((greth->gb << 8) | (greth->sp << 7) | (greth->fd << 4)));
  132. if (!greth->rxbd_base) {
  133. /* allocate descriptors */
  134. greth->rxbd_base = (greth_bd *)
  135. memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
  136. greth->txbd_base = (greth_bd *)
  137. memalign(0x1000, GRETH_TXBD_CNT * sizeof(greth_bd));
  138. /* allocate buffers to all descriptors */
  139. greth->rxbuf_base =
  140. malloc(GRETH_RXBUF_EFF_SIZE * GRETH_RXBD_CNT);
  141. }
  142. /* initate rx decriptors */
  143. for (i = 0; i < GRETH_RXBD_CNT; i++) {
  144. greth->rxbd_base[i].addr = (unsigned int)
  145. greth->rxbuf_base + (GRETH_RXBUF_EFF_SIZE * i);
  146. /* enable desciptor & set wrap bit if last descriptor */
  147. if (i >= (GRETH_RXBD_CNT - 1)) {
  148. greth->rxbd_base[i].stat = GRETH_BD_EN | GRETH_BD_WR;
  149. } else {
  150. greth->rxbd_base[i].stat = GRETH_BD_EN;
  151. }
  152. }
  153. /* initiate indexes */
  154. greth->rxbd_curr = greth->rxbd_base;
  155. greth->rxbd_max = greth->rxbd_base + (GRETH_RXBD_CNT - 1);
  156. greth->txbd_max = greth->txbd_base + (GRETH_TXBD_CNT - 1);
  157. /*
  158. * greth->txbd_base->addr = 0;
  159. * greth->txbd_base->stat = GRETH_BD_WR;
  160. */
  161. /* initate tx decriptors */
  162. for (i = 0; i < GRETH_TXBD_CNT; i++) {
  163. greth->txbd_base[i].addr = 0;
  164. /* enable desciptor & set wrap bit if last descriptor */
  165. if (i >= (GRETH_TXBD_CNT - 1)) {
  166. greth->txbd_base[i].stat = GRETH_BD_WR;
  167. } else {
  168. greth->txbd_base[i].stat = 0;
  169. }
  170. }
  171. /**** SET HARDWARE REGS ****/
  172. /* Set pointer to tx/rx descriptor areas */
  173. GRETH_REGSAVE(&regs->rx_desc_p, (unsigned int)&greth->rxbd_base[0]);
  174. GRETH_REGSAVE(&regs->tx_desc_p, (unsigned int)&greth->txbd_base[0]);
  175. /* Enable Transmitter, GRETH will now scan descriptors for packets
  176. * to transmitt */
  177. debug("greth_init: enabling receiver\n");
  178. GRETH_REGORIN(&regs->control, GRETH_RXEN);
  179. return 0;
  180. }
  181. /* Initiate PHY to a relevant speed
  182. * return:
  183. * - 0 = success
  184. * - 1 = timeout/fail
  185. */
  186. int greth_init_phy(greth_priv * dev, bd_t * bis)
  187. {
  188. greth_regs *regs = dev->regs;
  189. int tmp, tmp1, tmp2, i;
  190. unsigned int start, timeout;
  191. int phyaddr = GRETH_PHY_ADR_DEFAULT;
  192. #ifndef CONFIG_SYS_GRLIB_GRETH_PHYADDR
  193. /* If BSP doesn't provide a hardcoded PHY address the driver will
  194. * try to autodetect PHY address by stopping the search on the first
  195. * PHY address which has REG0 implemented.
  196. */
  197. for (i=0; i<32; i++) {
  198. tmp = read_mii(i, 0, regs);
  199. if ( (tmp != 0) && (tmp != 0xffff) ) {
  200. phyaddr = i;
  201. break;
  202. }
  203. }
  204. #endif
  205. /* Save PHY Address */
  206. dev->phyaddr = phyaddr;
  207. debug("GRETH PHY ADDRESS: %d\n", phyaddr);
  208. /* X msecs to ticks */
  209. timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000);
  210. /* Get system timer0 current value
  211. * Total timeout is 5s
  212. */
  213. start = get_timer(0);
  214. /* get phy control register default values */
  215. while ((tmp = read_mii(phyaddr, 0, regs)) & 0x8000) {
  216. if (get_timer(start) > timeout) {
  217. debug("greth_init_phy: PHY read 1 failed\n");
  218. return 1; /* Fail */
  219. }
  220. }
  221. /* reset PHY and wait for completion */
  222. write_mii(phyaddr, 0, 0x8000 | tmp, regs);
  223. while (((tmp = read_mii(phyaddr, 0, regs))) & 0x8000) {
  224. if (get_timer(start) > timeout) {
  225. debug("greth_init_phy: PHY read 2 failed\n");
  226. return 1; /* Fail */
  227. }
  228. }
  229. /* Check if PHY is autoneg capable and then determine operating
  230. * mode, otherwise force it to 10 Mbit halfduplex
  231. */
  232. dev->gb = 0;
  233. dev->fd = 0;
  234. dev->sp = 0;
  235. dev->auto_neg = 0;
  236. if (!((tmp >> 12) & 1)) {
  237. write_mii(phyaddr, 0, 0, regs);
  238. } else {
  239. /* wait for auto negotiation to complete and then check operating mode */
  240. dev->auto_neg = 1;
  241. i = 0;
  242. while (!(((tmp = read_mii(phyaddr, 1, regs)) >> 5) & 1)) {
  243. if (get_timer(start) > timeout) {
  244. printf("Auto negotiation timed out. "
  245. "Selecting default config\n");
  246. tmp = read_mii(phyaddr, 0, regs);
  247. dev->gb = ((tmp >> 6) & 1)
  248. && !((tmp >> 13) & 1);
  249. dev->sp = !((tmp >> 6) & 1)
  250. && ((tmp >> 13) & 1);
  251. dev->fd = (tmp >> 8) & 1;
  252. goto auto_neg_done;
  253. }
  254. }
  255. if ((tmp >> 8) & 1) {
  256. tmp1 = read_mii(phyaddr, 9, regs);
  257. tmp2 = read_mii(phyaddr, 10, regs);
  258. if ((tmp1 & GRETH_MII_EXTADV_1000FD) &&
  259. (tmp2 & GRETH_MII_EXTPRT_1000FD)) {
  260. dev->gb = 1;
  261. dev->fd = 1;
  262. }
  263. if ((tmp1 & GRETH_MII_EXTADV_1000HD) &&
  264. (tmp2 & GRETH_MII_EXTPRT_1000HD)) {
  265. dev->gb = 1;
  266. dev->fd = 0;
  267. }
  268. }
  269. if ((dev->gb == 0) || ((dev->gb == 1) && (dev->gbit_mac == 0))) {
  270. tmp1 = read_mii(phyaddr, 4, regs);
  271. tmp2 = read_mii(phyaddr, 5, regs);
  272. if ((tmp1 & GRETH_MII_100TXFD) &&
  273. (tmp2 & GRETH_MII_100TXFD)) {
  274. dev->sp = 1;
  275. dev->fd = 1;
  276. }
  277. if ((tmp1 & GRETH_MII_100TXHD) &&
  278. (tmp2 & GRETH_MII_100TXHD)) {
  279. dev->sp = 1;
  280. dev->fd = 0;
  281. }
  282. if ((tmp1 & GRETH_MII_10FD) && (tmp2 & GRETH_MII_10FD)) {
  283. dev->fd = 1;
  284. }
  285. if ((dev->gb == 1) && (dev->gbit_mac == 0)) {
  286. dev->gb = 0;
  287. dev->fd = 0;
  288. write_mii(phyaddr, 0, dev->sp << 13, regs);
  289. }
  290. }
  291. }
  292. auto_neg_done:
  293. debug("%s GRETH Ethermac at [0x%x] irq %d. Running \
  294. %d Mbps %s duplex\n", dev->gbit_mac ? "10/100/1000" : "10/100", (unsigned int)(regs), (unsigned int)(dev->irq), dev->gb ? 1000 : (dev->sp ? 100 : 10), dev->fd ? "full" : "half");
  295. /* Read out PHY info if extended registers are available */
  296. if (tmp & 1) {
  297. tmp1 = read_mii(phyaddr, 2, regs);
  298. tmp2 = read_mii(phyaddr, 3, regs);
  299. tmp1 = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F);
  300. tmp = tmp2 & 0xF;
  301. tmp2 = (tmp2 >> 4) & 0x3F;
  302. debug("PHY: Vendor %x Device %x Revision %d\n", tmp1,
  303. tmp2, tmp);
  304. } else {
  305. printf("PHY info not available\n");
  306. }
  307. /* set speed and duplex bits in control register */
  308. GRETH_REGORIN(&regs->control,
  309. (dev->gb << 8) | (dev->sp << 7) | (dev->fd << 4));
  310. return 0;
  311. }
  312. void greth_halt(struct eth_device *dev)
  313. {
  314. greth_priv *greth;
  315. greth_regs *regs;
  316. int i;
  317. debug("greth_halt\n");
  318. if (!dev || !dev->priv)
  319. return;
  320. greth = dev->priv;
  321. regs = greth->regs;
  322. if (!regs)
  323. return;
  324. /* disable receiver/transmitter by clearing the enable bits */
  325. GRETH_REGANDIN(&regs->control, ~(GRETH_RXEN | GRETH_TXEN));
  326. /* reset rx/tx descriptors */
  327. if (greth->rxbd_base) {
  328. for (i = 0; i < GRETH_RXBD_CNT; i++) {
  329. greth->rxbd_base[i].stat =
  330. (i >= (GRETH_RXBD_CNT - 1)) ? GRETH_BD_WR : 0;
  331. }
  332. }
  333. if (greth->txbd_base) {
  334. for (i = 0; i < GRETH_TXBD_CNT; i++) {
  335. greth->txbd_base[i].stat =
  336. (i >= (GRETH_TXBD_CNT - 1)) ? GRETH_BD_WR : 0;
  337. }
  338. }
  339. }
  340. int greth_send(struct eth_device *dev, volatile void *eth_data, int data_length)
  341. {
  342. greth_priv *greth = dev->priv;
  343. greth_regs *regs = greth->regs;
  344. greth_bd *txbd;
  345. void *txbuf;
  346. unsigned int status;
  347. debug("greth_send\n");
  348. /* send data, wait for data to be sent, then return */
  349. if (((unsigned int)eth_data & (GRETH_BUF_ALIGN - 1))
  350. && !greth->gbit_mac) {
  351. /* data not aligned as needed by GRETH 10/100, solve this by allocating 4 byte aligned buffer
  352. * and copy data to before giving it to GRETH.
  353. */
  354. if (!greth->txbuf) {
  355. greth->txbuf = malloc(GRETH_RXBUF_SIZE);
  356. }
  357. txbuf = greth->txbuf;
  358. /* copy data info buffer */
  359. memcpy((char *)txbuf, (char *)eth_data, data_length);
  360. /* keep buffer to next time */
  361. } else {
  362. txbuf = (void *)eth_data;
  363. }
  364. /* get descriptor to use, only 1 supported... hehe easy */
  365. txbd = greth->txbd_base;
  366. /* setup descriptor to wrap around to it self */
  367. txbd->addr = (unsigned int)txbuf;
  368. txbd->stat = GRETH_BD_EN | GRETH_BD_WR | data_length;
  369. /* Remind Core which descriptor to use when sending */
  370. GRETH_REGSAVE(&regs->tx_desc_p, (unsigned int)txbd);
  371. /* initate send by enabling transmitter */
  372. GRETH_REGORIN(&regs->control, GRETH_TXEN);
  373. /* Wait for data to be sent */
  374. while ((status = GRETH_REGLOAD(&txbd->stat)) & GRETH_BD_EN) {
  375. ;
  376. }
  377. /* was the packet transmitted succesfully? */
  378. if (status & GRETH_TXBD_ERR_AL) {
  379. greth->stats.tx_limit_errors++;
  380. }
  381. if (status & GRETH_TXBD_ERR_UE) {
  382. greth->stats.tx_underrun_errors++;
  383. }
  384. if (status & GRETH_TXBD_ERR_LC) {
  385. greth->stats.tx_latecol_errors++;
  386. }
  387. if (status &
  388. (GRETH_TXBD_ERR_LC | GRETH_TXBD_ERR_UE | GRETH_TXBD_ERR_AL)) {
  389. /* any error */
  390. greth->stats.tx_errors++;
  391. return -1;
  392. }
  393. /* bump tx packet counter */
  394. greth->stats.tx_packets++;
  395. /* return succefully */
  396. return 0;
  397. }
  398. int greth_recv(struct eth_device *dev)
  399. {
  400. greth_priv *greth = dev->priv;
  401. greth_regs *regs = greth->regs;
  402. greth_bd *rxbd;
  403. unsigned int status, len = 0, bad;
  404. unsigned char *d;
  405. int enable = 0;
  406. int i;
  407. /* Receive One packet only, but clear as many error packets as there are
  408. * available.
  409. */
  410. {
  411. /* current receive descriptor */
  412. rxbd = greth->rxbd_curr;
  413. /* get status of next received packet */
  414. status = GRETH_REGLOAD(&rxbd->stat);
  415. bad = 0;
  416. /* stop if no more packets received */
  417. if (status & GRETH_BD_EN) {
  418. goto done;
  419. }
  420. debug("greth_recv: packet 0x%lx, 0x%lx, len: %d\n",
  421. (unsigned int)rxbd, status, status & GRETH_BD_LEN);
  422. /* Check status for errors.
  423. */
  424. if (status & GRETH_RXBD_ERR_FT) {
  425. greth->stats.rx_length_errors++;
  426. bad = 1;
  427. }
  428. if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) {
  429. greth->stats.rx_frame_errors++;
  430. bad = 1;
  431. }
  432. if (status & GRETH_RXBD_ERR_CRC) {
  433. greth->stats.rx_crc_errors++;
  434. bad = 1;
  435. }
  436. if (bad) {
  437. greth->stats.rx_errors++;
  438. printf
  439. ("greth_recv: Bad packet (%d, %d, %d, 0x%08x, %d)\n",
  440. greth->stats.rx_length_errors,
  441. greth->stats.rx_frame_errors,
  442. greth->stats.rx_crc_errors, status,
  443. greth->stats.rx_packets);
  444. /* print all rx descriptors */
  445. for (i = 0; i < GRETH_RXBD_CNT; i++) {
  446. printf("[%d]: Stat=0x%lx, Addr=0x%lx\n", i,
  447. GRETH_REGLOAD(&greth->rxbd_base[i].stat),
  448. GRETH_REGLOAD(&greth->rxbd_base[i].addr));
  449. }
  450. } else {
  451. /* Process the incoming packet. */
  452. len = status & GRETH_BD_LEN;
  453. d = (char *)rxbd->addr;
  454. debug
  455. ("greth_recv: new packet, length: %d. data: %x %x %x %x %x %x %x %x\n",
  456. len, d[0], d[1], d[2], d[3], d[4], d[5], d[6],
  457. d[7]);
  458. /* flush all data cache to make sure we're not reading old packet data */
  459. sparc_dcache_flush_all();
  460. /* pass packet on to network subsystem */
  461. NetReceive((void *)d, len);
  462. /* bump stats counters */
  463. greth->stats.rx_packets++;
  464. /* bad is now 0 ==> will stop loop */
  465. }
  466. /* reenable descriptor to receive more packet with this descriptor, wrap around if needed */
  467. rxbd->stat =
  468. GRETH_BD_EN |
  469. (((unsigned int)greth->rxbd_curr >=
  470. (unsigned int)greth->rxbd_max) ? GRETH_BD_WR : 0);
  471. enable = 1;
  472. /* increase index */
  473. greth->rxbd_curr =
  474. ((unsigned int)greth->rxbd_curr >=
  475. (unsigned int)greth->rxbd_max) ? greth->
  476. rxbd_base : (greth->rxbd_curr + 1);
  477. }
  478. if (enable) {
  479. GRETH_REGORIN(&regs->control, GRETH_RXEN);
  480. }
  481. done:
  482. /* return positive length of packet or 0 if non received */
  483. return len;
  484. }
  485. void greth_set_hwaddr(greth_priv * greth, unsigned char *mac)
  486. {
  487. /* save new MAC address */
  488. greth->dev->enetaddr[0] = greth->hwaddr[0] = mac[0];
  489. greth->dev->enetaddr[1] = greth->hwaddr[1] = mac[1];
  490. greth->dev->enetaddr[2] = greth->hwaddr[2] = mac[2];
  491. greth->dev->enetaddr[3] = greth->hwaddr[3] = mac[3];
  492. greth->dev->enetaddr[4] = greth->hwaddr[4] = mac[4];
  493. greth->dev->enetaddr[5] = greth->hwaddr[5] = mac[5];
  494. greth->regs->esa_msb = (mac[0] << 8) | mac[1];
  495. greth->regs->esa_lsb =
  496. (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5];
  497. debug("GRETH: New MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n",
  498. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  499. }
  500. int greth_initialize(bd_t * bis)
  501. {
  502. greth_priv *greth;
  503. ambapp_apbdev apbdev;
  504. struct eth_device *dev;
  505. int i;
  506. char *addr_str, *end;
  507. unsigned char addr[6];
  508. debug("Scanning for GRETH\n");
  509. /* Find Device & IRQ via AMBA Plug&Play information */
  510. if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_ETHMAC, &apbdev) != 1) {
  511. return -1; /* GRETH not found */
  512. }
  513. greth = (greth_priv *) malloc(sizeof(greth_priv));
  514. dev = (struct eth_device *)malloc(sizeof(struct eth_device));
  515. memset(dev, 0, sizeof(struct eth_device));
  516. memset(greth, 0, sizeof(greth_priv));
  517. greth->regs = (greth_regs *) apbdev.address;
  518. greth->irq = apbdev.irq;
  519. debug("Found GRETH at 0x%lx, irq %d\n", greth->regs, greth->irq);
  520. dev->priv = (void *)greth;
  521. dev->iobase = (unsigned int)greth->regs;
  522. dev->init = greth_init;
  523. dev->halt = greth_halt;
  524. dev->send = greth_send;
  525. dev->recv = greth_recv;
  526. greth->dev = dev;
  527. /* Reset Core */
  528. GRETH_REGSAVE(&greth->regs->control, GRETH_RESET);
  529. /* Wait for core to finish reset cycle */
  530. while (GRETH_REGLOAD(&greth->regs->control) & GRETH_RESET) ;
  531. /* Get the phy address which assumed to have been set
  532. correctly with the reset value in hardware */
  533. greth->phyaddr = (GRETH_REGLOAD(&greth->regs->mdio) >> 11) & 0x1F;
  534. /* Check if mac is gigabit capable */
  535. greth->gbit_mac = (GRETH_REGLOAD(&greth->regs->control) >> 27) & 1;
  536. /* Make descriptor string */
  537. if (greth->gbit_mac) {
  538. sprintf(dev->name, "GRETH_10/100/GB");
  539. } else {
  540. sprintf(dev->name, "GRETH_10/100");
  541. }
  542. /* initiate PHY, select speed/duplex depending on connected PHY */
  543. if (greth_init_phy(greth, bis)) {
  544. /* Failed to init PHY (timedout) */
  545. debug("GRETH[0x%08x]: Failed to init PHY\n", greth->regs);
  546. return -1;
  547. }
  548. /* Register Device to EtherNet subsystem */
  549. eth_register(dev);
  550. /* Get MAC address */
  551. if ((addr_str = getenv("ethaddr")) != NULL) {
  552. for (i = 0; i < 6; i++) {
  553. addr[i] =
  554. addr_str ? simple_strtoul(addr_str, &end, 16) : 0;
  555. if (addr_str) {
  556. addr_str = (*end) ? end + 1 : end;
  557. }
  558. }
  559. } else {
  560. /* HW Address not found in environment, Set default HW address */
  561. addr[0] = GRETH_HWADDR_0; /* MSB */
  562. addr[1] = GRETH_HWADDR_1;
  563. addr[2] = GRETH_HWADDR_2;
  564. addr[3] = GRETH_HWADDR_3;
  565. addr[4] = GRETH_HWADDR_4;
  566. addr[5] = GRETH_HWADDR_5; /* LSB */
  567. }
  568. /* set and remember MAC address */
  569. greth_set_hwaddr(greth, addr);
  570. debug("GRETH[0x%08x]: Initialized successfully\n", greth->regs);
  571. return 0;
  572. }