mcu25.c 5.1 KB

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  1. /*
  2. *(C) Copyright 2005-2008 Netstal Maschinen AG
  3. * Niklaus Giger (Niklaus.Giger@netstal.com)
  4. *
  5. * This source code is free software; you can redistribute it
  6. * and/or modify it in source code form under the terms of the GNU
  7. * General Public License as published by the Free Software
  8. * Foundation; either version 2 of the License, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  19. */
  20. #include <common.h>
  21. #include <asm/ppc4xx.h>
  22. #include <asm/processor.h>
  23. #include <asm/io.h>
  24. #include <asm/u-boot.h>
  25. #include "../common/nm.h"
  26. DECLARE_GLOBAL_DATA_PTR;
  27. #define MCU25_SLOT_ADDRESS (0x7A000000 + 0x0A)
  28. #define MCU25_DIGITAL_IO_REGISTER (0x7A000000 + 0xc0)
  29. #define MCU25_LED_REGISTER_ADDRESS (0x7C000000 + 0x10)
  30. #define MCU25_VERSIONS_REGISTER (0x7C000000 + 0x0C)
  31. #define MCU25_IO_CONFIGURATION (0x7C000000 + 0x0e)
  32. #define MCU_SW_INSTALL_REQUESTED 0x08
  33. #define SDRAM_LEN (32 << 20) /* 32 MB - RAM */
  34. /*
  35. * This function is run very early, out of flash, and before devices are
  36. * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue
  37. * of being in the init_sequence array.
  38. *
  39. * The SDRAM has been initialized already -- start.S:start called
  40. * init.S:init_sdram early on -- but it is not yet being used for
  41. * anything, not even stack. So be careful.
  42. */
  43. /* Attention: If you want 1 microsecs times from the external oscillator
  44. * 0x00004051 is okay for u-boot/linux, but different from old vxworks values
  45. * 0x00804051 causes problems with u-boot and linux!
  46. */
  47. #define CPC0_CR0_VALUE 0x0007F03C
  48. #define CPC0_CR1_VALUE 0x00004051
  49. int board_early_init_f (void)
  50. {
  51. /* Documented in A-1171
  52. *
  53. * Interrupt controller setup for the MCU25 board.
  54. * Note: IRQ 0-15 405GP internally generated; high; level sensitive
  55. * IRQ 16 405GP internally generated; low; level sensitive
  56. * IRQ 17-24 RESERVED/UNUSED
  57. * IRQ 31 (EXT IRQ 6) (unused)
  58. */
  59. mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
  60. mtdcr(UIC0ER, 0x00000000); /* disable all ints */
  61. mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
  62. mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */
  63. mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
  64. mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
  65. mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
  66. mtdcr(CPC0_ECR, 0x60606000);
  67. mtdcr(CPC0_EIRR, 0x7C000000);
  68. out32(GPIO0_OR, CONFIG_SYS_GPIO0_OR );
  69. out32(GPIO0_TCR, CONFIG_SYS_GPIO0_TCR);
  70. out32(GPIO0_ODR, CONFIG_SYS_GPIO0_ODR);
  71. mtspr(SPRN_CCR0, 0x00700000);
  72. return 0;
  73. }
  74. #ifdef CONFIG_BOARD_PRE_INIT
  75. int board_pre_init (void)
  76. {
  77. return board_early_init_f ();
  78. }
  79. #endif
  80. int sys_install_requested(void)
  81. {
  82. u16 ioValue = in_be16((u16 *)MCU25_DIGITAL_IO_REGISTER);
  83. return (ioValue & MCU_SW_INSTALL_REQUESTED) != 0;
  84. }
  85. int checkboard (void)
  86. {
  87. u16 boardVersReg = in_be16((u16 *)MCU25_VERSIONS_REGISTER);
  88. u16 hwConfig = in_be16((u16 *)MCU25_IO_CONFIGURATION);
  89. u16 generation = boardVersReg & 0x0f;
  90. u16 index = boardVersReg & 0xf0;
  91. /* Cannot be done in board_early_init */
  92. mtdcr(CPC0_CR0, CPC0_CR0_VALUE);
  93. /* Force /RTS to active. The board it not wired quite
  94. * correctly to use cts/rtc flow control, so just force the
  95. * /RST active and forget about it.
  96. */
  97. writeb (readb (0xef600404) | 0x03, 0xef600404);
  98. nm_show_print(generation, index, hwConfig);
  99. return 0;
  100. }
  101. u32 hcu_led_get(void)
  102. {
  103. return in_be16((u16 *)MCU25_LED_REGISTER_ADDRESS) & 0x3ff;
  104. }
  105. /*
  106. * hcu_led_set value to be placed into the LEDs (max 6 bit)
  107. */
  108. void hcu_led_set(u32 value)
  109. {
  110. out_be16((u16 *)MCU25_LED_REGISTER_ADDRESS, value);
  111. }
  112. /*
  113. * hcu_get_slot
  114. */
  115. u32 hcu_get_slot(void)
  116. {
  117. u16 slot = in_be16((u16 *)MCU25_SLOT_ADDRESS);
  118. return slot & 0x7f;
  119. }
  120. /*
  121. * get_serial_number
  122. */
  123. u32 get_serial_number(void)
  124. {
  125. u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE);
  126. if (serial == 0xffffffff)
  127. return 0;
  128. return serial;
  129. }
  130. /*
  131. * misc_init_r.
  132. */
  133. int misc_init_r(void)
  134. {
  135. common_misc_init_r();
  136. set_params_for_sw_install( sys_install_requested(), "mcu25" );
  137. return 0;
  138. }
  139. phys_size_t initdram(int board_type)
  140. {
  141. unsigned int dram_size = 64*1024*1024;
  142. init_ppc405_sdram(dram_size);
  143. #ifdef DEBUG
  144. show_sdram_registers();
  145. #endif
  146. return dram_size;
  147. }
  148. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  149. void ft_board_setup(void *blob, bd_t *bd)
  150. {
  151. ft_cpu_setup(blob, bd);
  152. }
  153. #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
  154. /*
  155. * Hardcoded flash setup:
  156. * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
  157. */
  158. ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
  159. {
  160. if (banknum == 0) { /* non-CFI boot flash */
  161. info->portwidth = 1;
  162. info->chipwidth = 1;
  163. info->interface = FLASH_CFI_X8;
  164. return 1;
  165. } else
  166. return 0;
  167. }