hcu4.c 5.0 KB

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  1. /*
  2. *(C) Copyright 2005-2008 Netstal Maschinen AG
  3. * Niklaus Giger (Niklaus.Giger@netstal.com)
  4. *
  5. * This source code is free software; you can redistribute it
  6. * and/or modify it in source code form under the terms of the GNU
  7. * General Public License as published by the Free Software
  8. * Foundation; either version 2 of the License, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  19. */
  20. #include <common.h>
  21. #include <asm/ppc4xx.h>
  22. #include <asm/processor.h>
  23. #include <asm/io.h>
  24. #include <asm/u-boot.h>
  25. #include "../common/nm.h"
  26. DECLARE_GLOBAL_DATA_PTR;
  27. #define HCU_MACH_VERSIONS_REGISTER (0x7C000000 + 0xF00000)
  28. #define HCU_SLOT_ADDRESS (0x7C000000 + 0x400000)
  29. #define HCU_DIGITAL_IO_REGISTER (0x7C000000 + 0x500000)
  30. #define HCU_SW_INSTALL_REQUESTED 0x10
  31. /*
  32. * This function is run very early, out of flash, and before devices are
  33. * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue
  34. * of being in the init_sequence array.
  35. *
  36. * The SDRAM has been initialized already -- start.S:start called
  37. * init.S:init_sdram early on -- but it is not yet being used for
  38. * anything, not even stack. So be careful.
  39. */
  40. /* Attention: If you want 1 microsecs times from the external oscillator
  41. * 0x00004051 is okay for u-boot/linux, but different from old vxworks values
  42. * 0x00804051 causes problems with u-boot and linux!
  43. */
  44. #define CPC0_CR0_VALUE 0x0030103c
  45. #define CPC0_CR1_VALUE 0x00004051
  46. int board_early_init_f (void)
  47. {
  48. /*
  49. * Interrupt controller setup for the HCU4 board.
  50. * Note: IRQ 0-15 405GP internally generated; high; level sensitive
  51. * IRQ 16 405GP internally generated; low; level sensitive
  52. * IRQ 17-24 RESERVED/UNUSED
  53. * IRQ 31 (EXT IRQ 6) (unused)
  54. */
  55. mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
  56. mtdcr(UIC0ER, 0x00000000); /* disable all ints */
  57. mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
  58. mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */
  59. mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
  60. mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
  61. mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
  62. mtdcr(CPC0_ECR, 0x60606000);
  63. mtdcr(CPC0_EIRR, 0x7C000000);
  64. return 0;
  65. }
  66. #ifdef CONFIG_BOARD_PRE_INIT
  67. int board_pre_init (void)
  68. {
  69. return board_early_init_f ();
  70. }
  71. #endif
  72. int sys_install_requested(void)
  73. {
  74. u16 ioValue = in_be16((u16 *)HCU_DIGITAL_IO_REGISTER);
  75. return (ioValue & HCU_SW_INSTALL_REQUESTED) != 0;
  76. }
  77. int checkboard (void)
  78. {
  79. u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
  80. u16 generation = boardVersReg & 0xf0;
  81. u16 index = boardVersReg & 0x0f;
  82. /* Cannot be done in board_early_init */
  83. mtdcr(CPC0_CR0, CPC0_CR0_VALUE);
  84. /* Force /RTS to active. The board it not wired quite
  85. * correctly to use cts/rtc flow control, so just force the
  86. * /RST active and forget about it.
  87. */
  88. writeb (readb (0xef600404) | 0x03, 0xef600404);
  89. nm_show_print(generation, index, 0);
  90. return 0;
  91. }
  92. u32 hcu_led_get(void)
  93. {
  94. return (~(in_be32((u32 *)GPIO0_OR)) >> 23) & 0xff;
  95. }
  96. /*
  97. * hcu_led_set value to be placed into the LEDs (max 6 bit)
  98. */
  99. void hcu_led_set(u32 value)
  100. {
  101. u32 tmp = ~value;
  102. tmp = (tmp << 23) | 0x7FFFFF;
  103. out_be32((u32 *)GPIO0_OR, tmp);
  104. }
  105. /*
  106. * hcu_get_slot
  107. */
  108. u32 hcu_get_slot(void)
  109. {
  110. u16 slot = in_be16((u16 *)HCU_SLOT_ADDRESS);
  111. return slot & 0x7f;
  112. }
  113. /*
  114. * get_serial_number
  115. */
  116. u32 get_serial_number(void)
  117. {
  118. u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE);
  119. if (serial == 0xffffffff)
  120. return 0;
  121. return serial;
  122. }
  123. /*
  124. * misc_init_r.
  125. */
  126. int misc_init_r(void)
  127. {
  128. common_misc_init_r();
  129. set_params_for_sw_install( sys_install_requested(), "hcu4" );
  130. return 0;
  131. }
  132. phys_size_t initdram(int board_type)
  133. {
  134. long dram_size = 0;
  135. u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER);
  136. u16 generation = boardVersReg & 0xf0;
  137. u16 index = boardVersReg & 0x0f;
  138. if (generation == HW_GENERATION_HCU3 && index < 0xf)
  139. dram_size = 32 << 20; /* 32 MB - RAM */
  140. else
  141. dram_size = 64 << 20; /* 64 MB - RAM */
  142. init_ppc405_sdram(dram_size);
  143. #ifdef DEBUG
  144. show_sdram_registers();
  145. #endif
  146. return dram_size;
  147. }
  148. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  149. void ft_board_setup(void *blob, bd_t *bd)
  150. {
  151. ft_cpu_setup(blob, bd);
  152. }
  153. #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
  154. /*
  155. * Hardcoded flash setup:
  156. * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
  157. */
  158. ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
  159. {
  160. if (banknum == 0) { /* non-CFI boot flash */
  161. info->portwidth = 1;
  162. info->chipwidth = 1;
  163. info->interface = FLASH_CFI_X8;
  164. return 1;
  165. } else
  166. return 0;
  167. }