i2c.c 13 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * Hacked for the DB64360 board by Ingo.Assmus@keymile.com
  24. * extra improvments by Brain Waite
  25. */
  26. #include <common.h>
  27. #include <mpc8xx.h>
  28. #include <malloc.h>
  29. #include <i2c.h>
  30. #include "../include/mv_gen_reg.h"
  31. #include "../include/core.h"
  32. #define MAX_I2C_RETRYS 10
  33. #define I2C_DELAY 1000 /* Should be at least the # of MHz of Tclk */
  34. #undef DEBUG_I2C
  35. /*#define DEBUG_I2C*/
  36. #ifdef DEBUG_I2C
  37. #define DP(x) x
  38. #else
  39. #define DP(x)
  40. #endif
  41. /* Assuming that there is only one master on the bus (us) */
  42. void i2c_init (int speed, int slaveaddr)
  43. {
  44. unsigned int n, m, freq, margin, power;
  45. unsigned int actualN = 0, actualM = 0;
  46. unsigned int control, status;
  47. unsigned int minMargin = 0xffffffff;
  48. unsigned int tclk = CONFIG_SYS_TCLK;
  49. unsigned int i2cFreq = speed; /* 100000 max. Fast mode not supported */
  50. DP (puts ("i2c_init\n"));
  51. /* gtI2cMasterInit */
  52. for (n = 0; n < 8; n++) {
  53. for (m = 0; m < 16; m++) {
  54. power = 2 << n; /* power = 2^(n+1) */
  55. freq = tclk / (10 * (m + 1) * power);
  56. if (i2cFreq > freq)
  57. margin = i2cFreq - freq;
  58. else
  59. margin = freq - i2cFreq;
  60. if (margin < minMargin) {
  61. minMargin = margin;
  62. actualN = n;
  63. actualM = m;
  64. }
  65. }
  66. }
  67. DP (puts ("setup i2c bus\n"));
  68. /* Setup bus */
  69. /* gtI2cReset */
  70. GT_REG_WRITE (I2C_SOFT_RESET, 0);
  71. DP (puts ("udelay...\n"));
  72. udelay (I2C_DELAY);
  73. DP (puts ("set baudrate\n"));
  74. GT_REG_WRITE (I2C_STATUS_BAUDE_RATE, (actualM << 3) | actualN);
  75. GT_REG_WRITE (I2C_CONTROL, (0x1 << 2) | (0x1 << 6));
  76. udelay (I2C_DELAY * 10);
  77. DP (puts ("read control, baudrate\n"));
  78. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  79. GT_REG_READ (I2C_CONTROL, &control);
  80. }
  81. static uchar i2c_start (void)
  82. { /* DB64360 checked -> ok */
  83. unsigned int control, status;
  84. int count = 0;
  85. DP (puts ("i2c_start\n"));
  86. /* Set the start bit */
  87. /* gtI2cGenerateStartBit() */
  88. GT_REG_READ (I2C_CONTROL, &control);
  89. control |= (0x1 << 5); /* generate the I2C_START_BIT */
  90. GT_REG_WRITE (I2C_CONTROL, control);
  91. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  92. count = 0;
  93. while ((status & 0xff) != 0x08) {
  94. udelay (I2C_DELAY);
  95. if (count > 20) {
  96. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  97. return (status);
  98. }
  99. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  100. count++;
  101. }
  102. return (0);
  103. }
  104. static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
  105. {
  106. unsigned int status, data, bits = 7;
  107. int count = 0;
  108. DP (puts ("i2c_select_device\n"));
  109. /* Output slave address */
  110. if (ten_bit) {
  111. bits = 10;
  112. }
  113. data = (dev_addr << 1);
  114. /* set the read bit */
  115. data |= read;
  116. GT_REG_WRITE (I2C_DATA, data);
  117. /* assert the address */
  118. RESET_REG_BITS (I2C_CONTROL, BIT3);
  119. udelay (I2C_DELAY);
  120. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  121. count = 0;
  122. while (((status & 0xff) != 0x40) && ((status & 0xff) != 0x18)) {
  123. udelay (I2C_DELAY);
  124. if (count > 20) {
  125. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  126. return (status);
  127. }
  128. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  129. count++;
  130. }
  131. if (bits == 10) {
  132. printf ("10 bit I2C addressing not yet implemented\n");
  133. return (0xff);
  134. }
  135. return (0);
  136. }
  137. static uchar i2c_get_data (uchar * return_data, int len)
  138. {
  139. unsigned int data, status = 0;
  140. int count = 0;
  141. DP (puts ("i2c_get_data\n"));
  142. while (len) {
  143. /* Get and return the data */
  144. RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
  145. udelay (I2C_DELAY * 5);
  146. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  147. count++;
  148. while ((status & 0xff) != 0x50) {
  149. udelay (I2C_DELAY);
  150. if (count > 2) {
  151. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  152. return 0;
  153. }
  154. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  155. count++;
  156. }
  157. GT_REG_READ (I2C_DATA, &data);
  158. len--;
  159. *return_data = (uchar) data;
  160. return_data++;
  161. }
  162. RESET_REG_BITS (I2C_CONTROL, BIT2 | BIT3);
  163. while ((status & 0xff) != 0x58) {
  164. udelay (I2C_DELAY);
  165. if (count > 200) {
  166. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  167. return (status);
  168. }
  169. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  170. count++;
  171. }
  172. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /* stop */
  173. return (0);
  174. }
  175. static uchar i2c_write_data (unsigned int *data, int len)
  176. {
  177. unsigned int status;
  178. int count = 0;
  179. unsigned int temp;
  180. unsigned int *temp_ptr = data;
  181. DP (puts ("i2c_write_data\n"));
  182. while (len) {
  183. temp = (unsigned int) (*temp_ptr);
  184. GT_REG_WRITE (I2C_DATA, temp);
  185. RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
  186. udelay (I2C_DELAY);
  187. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  188. count++;
  189. while ((status & 0xff) != 0x28) {
  190. udelay (I2C_DELAY);
  191. if (count > 20) {
  192. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  193. return (status);
  194. }
  195. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  196. count++;
  197. }
  198. len--;
  199. temp_ptr++;
  200. }
  201. /* 11-14-2002 Paul Marchese */
  202. /* Can't have the write issuing a stop command */
  203. /* it's wrong to have a stop bit in read stream or write stream */
  204. /* since we don't know if it's really the end of the command */
  205. /* or whether we have just send the device address + offset */
  206. /* we will push issuing the stop command off to the original */
  207. /* calling function */
  208. /* set the interrupt bit in the control register */
  209. GT_REG_WRITE (I2C_CONTROL, (0x1 << 3));
  210. udelay (I2C_DELAY * 10);
  211. return (0);
  212. }
  213. /* 11-14-2002 Paul Marchese */
  214. /* created this function to get the i2c_write() */
  215. /* function working properly. */
  216. /* function to write bytes out on the i2c bus */
  217. /* this is identical to the function i2c_write_data() */
  218. /* except that it requires a buffer that is an */
  219. /* unsigned character array. You can't use */
  220. /* i2c_write_data() to send an array of unsigned characters */
  221. /* since the byte of interest ends up on the wrong end of the bus */
  222. /* aah, the joys of big endian versus little endian! */
  223. /* */
  224. /* returns 0 = success */
  225. /* anything other than zero is failure */
  226. static uchar i2c_write_byte (unsigned char *data, int len)
  227. {
  228. unsigned int status;
  229. int count = 0;
  230. unsigned int temp;
  231. unsigned char *temp_ptr = data;
  232. DP (puts ("i2c_write_byte\n"));
  233. while (len) {
  234. /* Set and assert the data */
  235. temp = *temp_ptr;
  236. GT_REG_WRITE (I2C_DATA, temp);
  237. RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
  238. udelay (I2C_DELAY);
  239. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  240. count++;
  241. while ((status & 0xff) != 0x28) {
  242. udelay (I2C_DELAY);
  243. if (count > 20) {
  244. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  245. return (status);
  246. }
  247. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  248. count++;
  249. }
  250. len--;
  251. temp_ptr++;
  252. }
  253. /* Can't have the write issuing a stop command */
  254. /* it's wrong to have a stop bit in read stream or write stream */
  255. /* since we don't know if it's really the end of the command */
  256. /* or whether we have just send the device address + offset */
  257. /* we will push issuing the stop command off to the original */
  258. /* calling function */
  259. /* GT_REG_WRITE(I2C_CONTROL, (0x1 << 3) | (0x1 << 4));
  260. GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); */
  261. /* set the interrupt bit in the control register */
  262. GT_REG_WRITE (I2C_CONTROL, (0x1 << 3));
  263. udelay (I2C_DELAY * 10);
  264. return (0);
  265. }
  266. static uchar
  267. i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
  268. int alen)
  269. {
  270. uchar status;
  271. unsigned int table[2];
  272. /* initialize the table of address offset bytes */
  273. /* utilized for 2 byte address offsets */
  274. /* NOTE: the order is high byte first! */
  275. table[1] = offset & 0xff; /* low byte */
  276. table[0] = offset / 0x100; /* high byte */
  277. DP (puts ("i2c_set_dev_offset\n"));
  278. status = i2c_select_device (dev_addr, 0, ten_bit);
  279. if (status) {
  280. #ifdef DEBUG_I2C
  281. printf ("Failed to select device setting offset: 0x%02x\n",
  282. status);
  283. #endif
  284. return status;
  285. }
  286. /* check the address offset length */
  287. if (alen == 0)
  288. /* no address offset */
  289. return (0);
  290. else if (alen == 1) {
  291. /* 1 byte address offset */
  292. status = i2c_write_data (&offset, 1);
  293. if (status) {
  294. #ifdef DEBUG_I2C
  295. printf ("Failed to write data: 0x%02x\n", status);
  296. #endif
  297. return status;
  298. }
  299. } else if (alen == 2) {
  300. /* 2 bytes address offset */
  301. status = i2c_write_data (table, 2);
  302. if (status) {
  303. #ifdef DEBUG_I2C
  304. printf ("Failed to write data: 0x%02x\n", status);
  305. #endif
  306. return status;
  307. }
  308. } else {
  309. /* address offset unknown or not supported */
  310. printf ("Address length offset %d is not supported\n", alen);
  311. return 1;
  312. }
  313. return 0; /* sucessful completion */
  314. }
  315. int
  316. i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
  317. int len)
  318. {
  319. uchar status = 0;
  320. unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
  321. DP (puts ("i2c_read\n"));
  322. /* set the i2c frequency */
  323. i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
  324. status = i2c_start ();
  325. if (status) {
  326. #ifdef DEBUG_I2C
  327. printf ("Transaction start failed: 0x%02x\n", status);
  328. #endif
  329. return status;
  330. }
  331. status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
  332. if (status) {
  333. #ifdef DEBUG_I2C
  334. printf ("Failed to set slave address & offset: 0x%02x\n",
  335. status);
  336. #endif
  337. return status;
  338. }
  339. /* set the i2c frequency again */
  340. i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
  341. status = i2c_start ();
  342. if (status) {
  343. #ifdef DEBUG_I2C
  344. printf ("Transaction restart failed: 0x%02x\n", status);
  345. #endif
  346. return status;
  347. }
  348. status = i2c_select_device (dev_addr, 1, 0); /* send the slave address */
  349. if (status) {
  350. #ifdef DEBUG_I2C
  351. printf ("Address not acknowledged: 0x%02x\n", status);
  352. #endif
  353. return status;
  354. }
  355. status = i2c_get_data (data, len);
  356. if (status) {
  357. #ifdef DEBUG_I2C
  358. printf ("Data not received: 0x%02x\n", status);
  359. #endif
  360. return status;
  361. }
  362. return 0;
  363. }
  364. /* 11-14-2002 Paul Marchese */
  365. /* Function to set the I2C stop bit */
  366. void i2c_stop (void)
  367. {
  368. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4));
  369. }
  370. /* 11-14-2002 Paul Marchese */
  371. /* I2C write function */
  372. /* dev_addr = device address */
  373. /* offset = address offset */
  374. /* alen = length in bytes of the address offset */
  375. /* data = pointer to buffer to read data into */
  376. /* len = # of bytes to read */
  377. /* */
  378. /* returns 0 = succesful */
  379. /* anything but zero is failure */
  380. int
  381. i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
  382. int len)
  383. {
  384. uchar status = 0;
  385. unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
  386. DP (puts ("i2c_write\n"));
  387. /* set the i2c frequency */
  388. i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
  389. status = i2c_start (); /* send a start bit */
  390. if (status) {
  391. #ifdef DEBUG_I2C
  392. printf ("Transaction start failed: 0x%02x\n", status);
  393. #endif
  394. return status;
  395. }
  396. status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
  397. if (status) {
  398. #ifdef DEBUG_I2C
  399. printf ("Failed to set slave address & offset: 0x%02x\n",
  400. status);
  401. #endif
  402. return status;
  403. }
  404. status = i2c_write_byte (data, len); /* write the data */
  405. if (status) {
  406. #ifdef DEBUG_I2C
  407. printf ("Data not written: 0x%02x\n", status);
  408. #endif
  409. return status;
  410. }
  411. /* issue a stop bit */
  412. i2c_stop ();
  413. return 0;
  414. }
  415. /* 11-14-2002 Paul Marchese */
  416. /* function to determine if an I2C device is present */
  417. /* chip = device address of chip to check for */
  418. /* */
  419. /* returns 0 = sucessful, the device exists */
  420. /* anything other than zero is failure, no device */
  421. int i2c_probe (uchar chip)
  422. {
  423. /* We are just looking for an <ACK> back. */
  424. /* To see if the device/chip is there */
  425. #ifdef DEBUG_I2C
  426. unsigned int i2c_status;
  427. #endif
  428. uchar status = 0;
  429. unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
  430. DP (puts ("i2c_probe\n"));
  431. /* set the i2c frequency */
  432. i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
  433. status = i2c_start (); /* send a start bit */
  434. if (status) {
  435. #ifdef DEBUG_I2C
  436. printf ("Transaction start failed: 0x%02x\n", status);
  437. #endif
  438. return (int) status;
  439. }
  440. status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */
  441. if (status) {
  442. #ifdef DEBUG_I2C
  443. printf ("Failed to set slave address: 0x%02x\n", status);
  444. #endif
  445. return (int) status;
  446. }
  447. #ifdef DEBUG_I2C
  448. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &i2c_status);
  449. printf ("address %#x returned %#x\n", chip, i2c_status);
  450. #endif
  451. /* issue a stop bit */
  452. i2c_stop ();
  453. return 0; /* successful completion */
  454. }