timer.c 3.3 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Lineo, Inc. <www.lineo.com>
  4. * Bernhard Kuhn <bkuhn@lineo.com>
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Marius Groeger <mgroeger@sysgo.de>
  9. *
  10. * (C) Copyright 2002
  11. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  12. * Alex Zuepke <azu@sysgo.de>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. */
  32. #include <common.h>
  33. #include <asm/io.h>
  34. #include <asm/arch/hardware.h>
  35. #include <asm/arch/at91_tc.h>
  36. #include <asm/arch/at91_pmc.h>
  37. DECLARE_GLOBAL_DATA_PTR;
  38. /* the number of clocks per CONFIG_SYS_HZ */
  39. #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
  40. int timer_init(void)
  41. {
  42. at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
  43. at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
  44. /* enables TC1.0 clock */
  45. writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */
  46. writel(0, &tc->bcr);
  47. writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
  48. AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
  49. writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
  50. /* set to MCLK/2 and restart the timer
  51. when the value in TC_RC is reached */
  52. writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
  53. writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */
  54. writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
  55. writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
  56. gd->lastinc = 0;
  57. gd->tbl = 0;
  58. return 0;
  59. }
  60. /*
  61. * timer without interrupts
  62. */
  63. ulong get_timer(ulong base)
  64. {
  65. return get_timer_masked() - base;
  66. }
  67. void __udelay(unsigned long usec)
  68. {
  69. udelay_masked(usec);
  70. }
  71. ulong get_timer_raw(void)
  72. {
  73. at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
  74. u32 now;
  75. now = readl(&tc->tc[0].cv) & 0x0000ffff;
  76. if (now >= gd->lastinc) {
  77. /* normal mode */
  78. gd->tbl += now - gd->lastinc;
  79. } else {
  80. /* we have an overflow ... */
  81. gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc;
  82. }
  83. gd->lastinc = now;
  84. return gd->tbl;
  85. }
  86. ulong get_timer_masked(void)
  87. {
  88. return get_timer_raw()/TIMER_LOAD_VAL;
  89. }
  90. void udelay_masked(unsigned long usec)
  91. {
  92. u32 tmo;
  93. u32 endtime;
  94. signed long diff;
  95. tmo = CONFIG_SYS_HZ_CLOCK / 1000;
  96. tmo *= usec;
  97. tmo /= 1000;
  98. endtime = get_timer_raw() + tmo;
  99. do {
  100. u32 now = get_timer_raw();
  101. diff = endtime - now;
  102. } while (diff >= 0);
  103. }
  104. /*
  105. * This function is derived from PowerPC code (read timebase as long long).
  106. * On ARM it just returns the timer value.
  107. */
  108. unsigned long long get_ticks(void)
  109. {
  110. return get_timer(0);
  111. }
  112. /*
  113. * This function is derived from PowerPC code (timebase clock frequency).
  114. * On ARM it returns the number of timer ticks per second.
  115. */
  116. ulong get_tbclk(void)
  117. {
  118. return CONFIG_SYS_HZ;
  119. }