board_f.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <console.h>
  13. #include <cpu.h>
  14. #include <dm.h>
  15. #include <environment.h>
  16. #include <fdtdec.h>
  17. #include <fs.h>
  18. #include <i2c.h>
  19. #include <initcall.h>
  20. #include <malloc.h>
  21. #include <mapmem.h>
  22. #include <os.h>
  23. #include <post.h>
  24. #include <relocate.h>
  25. #include <spi.h>
  26. #include <status_led.h>
  27. #include <sysreset.h>
  28. #include <timer.h>
  29. #include <trace.h>
  30. #include <video.h>
  31. #include <watchdog.h>
  32. #ifdef CONFIG_MACH_TYPE
  33. #include <asm/mach-types.h>
  34. #endif
  35. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  36. #include <asm/mp.h>
  37. #endif
  38. #include <asm/io.h>
  39. #include <asm/sections.h>
  40. #include <dm/root.h>
  41. #include <linux/errno.h>
  42. /*
  43. * Pointer to initial global data area
  44. *
  45. * Here we initialize it if needed.
  46. */
  47. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  48. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  49. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  50. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  51. #else
  52. DECLARE_GLOBAL_DATA_PTR;
  53. #endif
  54. /*
  55. * TODO(sjg@chromium.org): IMO this code should be
  56. * refactored to a single function, something like:
  57. *
  58. * void led_set_state(enum led_colour_t colour, int on);
  59. */
  60. /************************************************************************
  61. * Coloured LED functionality
  62. ************************************************************************
  63. * May be supplied by boards if desired
  64. */
  65. __weak void coloured_LED_init(void) {}
  66. __weak void red_led_on(void) {}
  67. __weak void red_led_off(void) {}
  68. __weak void green_led_on(void) {}
  69. __weak void green_led_off(void) {}
  70. __weak void yellow_led_on(void) {}
  71. __weak void yellow_led_off(void) {}
  72. __weak void blue_led_on(void) {}
  73. __weak void blue_led_off(void) {}
  74. /*
  75. * Why is gd allocated a register? Prior to reloc it might be better to
  76. * just pass it around to each function in this file?
  77. *
  78. * After reloc one could argue that it is hardly used and doesn't need
  79. * to be in a register. Or if it is it should perhaps hold pointers to all
  80. * global data for all modules, so that post-reloc we can avoid the massive
  81. * literal pool we get on ARM. Or perhaps just encourage each module to use
  82. * a structure...
  83. */
  84. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  85. static int init_func_watchdog_init(void)
  86. {
  87. # if defined(CONFIG_HW_WATCHDOG) && \
  88. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  89. defined(CONFIG_SH) || \
  90. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  91. defined(CONFIG_IMX_WATCHDOG))
  92. hw_watchdog_init();
  93. puts(" Watchdog enabled\n");
  94. # endif
  95. WATCHDOG_RESET();
  96. return 0;
  97. }
  98. int init_func_watchdog_reset(void)
  99. {
  100. WATCHDOG_RESET();
  101. return 0;
  102. }
  103. #endif /* CONFIG_WATCHDOG */
  104. __weak void board_add_ram_info(int use_default)
  105. {
  106. /* please define platform specific board_add_ram_info() */
  107. }
  108. static int init_baud_rate(void)
  109. {
  110. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  111. return 0;
  112. }
  113. static int display_text_info(void)
  114. {
  115. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  116. ulong bss_start, bss_end, text_base;
  117. bss_start = (ulong)&__bss_start;
  118. bss_end = (ulong)&__bss_end;
  119. #ifdef CONFIG_SYS_TEXT_BASE
  120. text_base = CONFIG_SYS_TEXT_BASE;
  121. #else
  122. text_base = CONFIG_SYS_MONITOR_BASE;
  123. #endif
  124. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  125. text_base, bss_start, bss_end);
  126. #endif
  127. return 0;
  128. }
  129. #ifdef CONFIG_SYSRESET
  130. static int print_resetinfo(void)
  131. {
  132. struct udevice *dev;
  133. char status[256];
  134. int ret;
  135. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  136. if (ret) {
  137. debug("%s: No sysreset device found (error: %d)\n",
  138. __func__, ret);
  139. /* Not all boards have sysreset drivers available during early
  140. * boot, so don't fail if one can't be found.
  141. */
  142. return 0;
  143. }
  144. if (!sysreset_get_status(dev, status, sizeof(status)))
  145. printf("%s", status);
  146. return 0;
  147. }
  148. #endif
  149. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  150. static int print_cpuinfo(void)
  151. {
  152. struct udevice *dev;
  153. char desc[512];
  154. int ret;
  155. ret = uclass_first_device_err(UCLASS_CPU, &dev);
  156. if (ret) {
  157. debug("%s: Could not get CPU device (err = %d)\n",
  158. __func__, ret);
  159. return ret;
  160. }
  161. ret = cpu_get_desc(dev, desc, sizeof(desc));
  162. if (ret) {
  163. debug("%s: Could not get CPU description (err = %d)\n",
  164. dev->name, ret);
  165. return ret;
  166. }
  167. printf("CPU: %s\n", desc);
  168. return 0;
  169. }
  170. #endif
  171. static int announce_dram_init(void)
  172. {
  173. puts("DRAM: ");
  174. return 0;
  175. }
  176. static int show_dram_config(void)
  177. {
  178. unsigned long long size;
  179. #ifdef CONFIG_NR_DRAM_BANKS
  180. int i;
  181. debug("\nRAM Configuration:\n");
  182. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  183. size += gd->bd->bi_dram[i].size;
  184. debug("Bank #%d: %llx ", i,
  185. (unsigned long long)(gd->bd->bi_dram[i].start));
  186. #ifdef DEBUG
  187. print_size(gd->bd->bi_dram[i].size, "\n");
  188. #endif
  189. }
  190. debug("\nDRAM: ");
  191. #else
  192. size = gd->ram_size;
  193. #endif
  194. print_size(size, "");
  195. board_add_ram_info(0);
  196. putc('\n');
  197. return 0;
  198. }
  199. __weak int dram_init_banksize(void)
  200. {
  201. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  202. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  203. gd->bd->bi_dram[0].size = get_effective_memsize();
  204. #endif
  205. return 0;
  206. }
  207. #if defined(CONFIG_SYS_I2C)
  208. static int init_func_i2c(void)
  209. {
  210. puts("I2C: ");
  211. #ifdef CONFIG_SYS_I2C
  212. i2c_init_all();
  213. #else
  214. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  215. #endif
  216. puts("ready\n");
  217. return 0;
  218. }
  219. #endif
  220. #if defined(CONFIG_VID)
  221. __weak int init_func_vid(void)
  222. {
  223. return 0;
  224. }
  225. #endif
  226. #if defined(CONFIG_HARD_SPI)
  227. static int init_func_spi(void)
  228. {
  229. puts("SPI: ");
  230. spi_init();
  231. puts("ready\n");
  232. return 0;
  233. }
  234. #endif
  235. static int setup_mon_len(void)
  236. {
  237. #if defined(__ARM__) || defined(__MICROBLAZE__)
  238. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  239. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  240. gd->mon_len = (ulong)&_end - (ulong)_init;
  241. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  242. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  243. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  244. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  245. #elif defined(CONFIG_SYS_MONITOR_BASE)
  246. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  247. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  248. #endif
  249. return 0;
  250. }
  251. __weak int arch_cpu_init(void)
  252. {
  253. return 0;
  254. }
  255. __weak int mach_cpu_init(void)
  256. {
  257. return 0;
  258. }
  259. /* Get the top of usable RAM */
  260. __weak ulong board_get_usable_ram_top(ulong total_size)
  261. {
  262. #ifdef CONFIG_SYS_SDRAM_BASE
  263. /*
  264. * Detect whether we have so much RAM that it goes past the end of our
  265. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  266. */
  267. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  268. /*
  269. * Will wrap back to top of 32-bit space when reservations
  270. * are made.
  271. */
  272. return 0;
  273. #endif
  274. return gd->ram_top;
  275. }
  276. static int setup_dest_addr(void)
  277. {
  278. debug("Monitor len: %08lX\n", gd->mon_len);
  279. /*
  280. * Ram is setup, size stored in gd !!
  281. */
  282. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  283. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  284. /*
  285. * Subtract specified amount of memory to hide so that it won't
  286. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  287. * the Linux kernel should now get passed the now "corrected"
  288. * memory size and won't touch it either. This should work
  289. * for arch/ppc and arch/powerpc. Only Linux board ports in
  290. * arch/powerpc with bootwrapper support, that recalculate the
  291. * memory size from the SDRAM controller setup will have to
  292. * get fixed.
  293. */
  294. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  295. #endif
  296. #ifdef CONFIG_SYS_SDRAM_BASE
  297. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  298. #endif
  299. gd->ram_top = gd->ram_base + get_effective_memsize();
  300. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  301. gd->relocaddr = gd->ram_top;
  302. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  303. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  304. /*
  305. * We need to make sure the location we intend to put secondary core
  306. * boot code is reserved and not used by any part of u-boot
  307. */
  308. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  309. gd->relocaddr = determine_mp_bootpg(NULL);
  310. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  311. }
  312. #endif
  313. return 0;
  314. }
  315. #ifdef CONFIG_PRAM
  316. /* reserve protected RAM */
  317. static int reserve_pram(void)
  318. {
  319. ulong reg;
  320. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  321. gd->relocaddr -= (reg << 10); /* size is in kB */
  322. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  323. gd->relocaddr);
  324. return 0;
  325. }
  326. #endif /* CONFIG_PRAM */
  327. /* Round memory pointer down to next 4 kB limit */
  328. static int reserve_round_4k(void)
  329. {
  330. gd->relocaddr &= ~(4096 - 1);
  331. return 0;
  332. }
  333. #ifdef CONFIG_ARM
  334. __weak int reserve_mmu(void)
  335. {
  336. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
  337. /* reserve TLB table */
  338. gd->arch.tlb_size = PGTABLE_SIZE;
  339. gd->relocaddr -= gd->arch.tlb_size;
  340. /* round down to next 64 kB limit */
  341. gd->relocaddr &= ~(0x10000 - 1);
  342. gd->arch.tlb_addr = gd->relocaddr;
  343. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  344. gd->arch.tlb_addr + gd->arch.tlb_size);
  345. #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
  346. /*
  347. * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
  348. * with location within secure ram.
  349. */
  350. gd->arch.tlb_allocated = gd->arch.tlb_addr;
  351. #endif
  352. #endif
  353. return 0;
  354. }
  355. #endif
  356. static int reserve_video(void)
  357. {
  358. #ifdef CONFIG_DM_VIDEO
  359. ulong addr;
  360. int ret;
  361. addr = gd->relocaddr;
  362. ret = video_reserve(&addr);
  363. if (ret)
  364. return ret;
  365. gd->relocaddr = addr;
  366. #elif defined(CONFIG_LCD)
  367. # ifdef CONFIG_FB_ADDR
  368. gd->fb_base = CONFIG_FB_ADDR;
  369. # else
  370. /* reserve memory for LCD display (always full pages) */
  371. gd->relocaddr = lcd_setmem(gd->relocaddr);
  372. gd->fb_base = gd->relocaddr;
  373. # endif /* CONFIG_FB_ADDR */
  374. #elif defined(CONFIG_VIDEO) && \
  375. (!defined(CONFIG_PPC)) && \
  376. !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
  377. !defined(CONFIG_M68K)
  378. /* reserve memory for video display (always full pages) */
  379. gd->relocaddr = video_setmem(gd->relocaddr);
  380. gd->fb_base = gd->relocaddr;
  381. #endif
  382. return 0;
  383. }
  384. static int reserve_trace(void)
  385. {
  386. #ifdef CONFIG_TRACE
  387. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  388. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  389. debug("Reserving %dk for trace data at: %08lx\n",
  390. CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  391. #endif
  392. return 0;
  393. }
  394. static int reserve_uboot(void)
  395. {
  396. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  397. /*
  398. * reserve memory for U-Boot code, data & bss
  399. * round down to next 4 kB limit
  400. */
  401. gd->relocaddr -= gd->mon_len;
  402. gd->relocaddr &= ~(4096 - 1);
  403. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  404. /* round down to next 64 kB limit so that IVPR stays aligned */
  405. gd->relocaddr &= ~(65536 - 1);
  406. #endif
  407. debug("Reserving %ldk for U-Boot at: %08lx\n",
  408. gd->mon_len >> 10, gd->relocaddr);
  409. }
  410. gd->start_addr_sp = gd->relocaddr;
  411. return 0;
  412. }
  413. /* reserve memory for malloc() area */
  414. static int reserve_malloc(void)
  415. {
  416. gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
  417. debug("Reserving %dk for malloc() at: %08lx\n",
  418. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  419. return 0;
  420. }
  421. /* (permanently) allocate a Board Info struct */
  422. static int reserve_board(void)
  423. {
  424. if (!gd->bd) {
  425. gd->start_addr_sp -= sizeof(bd_t);
  426. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  427. memset(gd->bd, '\0', sizeof(bd_t));
  428. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  429. sizeof(bd_t), gd->start_addr_sp);
  430. }
  431. return 0;
  432. }
  433. static int setup_machine(void)
  434. {
  435. #ifdef CONFIG_MACH_TYPE
  436. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  437. #endif
  438. return 0;
  439. }
  440. static int reserve_global_data(void)
  441. {
  442. gd->start_addr_sp -= sizeof(gd_t);
  443. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  444. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  445. sizeof(gd_t), gd->start_addr_sp);
  446. return 0;
  447. }
  448. static int reserve_fdt(void)
  449. {
  450. #ifndef CONFIG_OF_EMBED
  451. /*
  452. * If the device tree is sitting immediately above our image then we
  453. * must relocate it. If it is embedded in the data section, then it
  454. * will be relocated with other data.
  455. */
  456. if (gd->fdt_blob) {
  457. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  458. gd->start_addr_sp -= gd->fdt_size;
  459. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  460. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  461. gd->fdt_size, gd->start_addr_sp);
  462. }
  463. #endif
  464. return 0;
  465. }
  466. static int reserve_bootstage(void)
  467. {
  468. #ifdef CONFIG_BOOTSTAGE
  469. int size = bootstage_get_size();
  470. gd->start_addr_sp -= size;
  471. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  472. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  473. gd->start_addr_sp);
  474. #endif
  475. return 0;
  476. }
  477. __weak int arch_reserve_stacks(void)
  478. {
  479. return 0;
  480. }
  481. static int reserve_stacks(void)
  482. {
  483. /* make stack pointer 16-byte aligned */
  484. gd->start_addr_sp -= 16;
  485. gd->start_addr_sp &= ~0xf;
  486. /*
  487. * let the architecture-specific code tailor gd->start_addr_sp and
  488. * gd->irq_sp
  489. */
  490. return arch_reserve_stacks();
  491. }
  492. static int display_new_sp(void)
  493. {
  494. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  495. return 0;
  496. }
  497. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  498. defined(CONFIG_SH)
  499. static int setup_board_part1(void)
  500. {
  501. bd_t *bd = gd->bd;
  502. /*
  503. * Save local variables to board info struct
  504. */
  505. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  506. bd->bi_memsize = gd->ram_size; /* size in bytes */
  507. #ifdef CONFIG_SYS_SRAM_BASE
  508. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  509. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  510. #endif
  511. #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  512. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  513. #endif
  514. #if defined(CONFIG_M68K)
  515. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  516. #endif
  517. #if defined(CONFIG_MPC83xx)
  518. bd->bi_immrbar = CONFIG_SYS_IMMR;
  519. #endif
  520. return 0;
  521. }
  522. #endif
  523. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  524. static int setup_board_part2(void)
  525. {
  526. bd_t *bd = gd->bd;
  527. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  528. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  529. #if defined(CONFIG_CPM2)
  530. bd->bi_cpmfreq = gd->arch.cpm_clk;
  531. bd->bi_brgfreq = gd->arch.brg_clk;
  532. bd->bi_sccfreq = gd->arch.scc_clk;
  533. bd->bi_vco = gd->arch.vco_out;
  534. #endif /* CONFIG_CPM2 */
  535. #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
  536. bd->bi_pcifreq = gd->pci_clk;
  537. #endif
  538. #if defined(CONFIG_EXTRA_CLOCK)
  539. bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
  540. bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
  541. bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
  542. #endif
  543. return 0;
  544. }
  545. #endif
  546. #ifdef CONFIG_POST
  547. static int init_post(void)
  548. {
  549. post_bootmode_init();
  550. post_run(NULL, POST_ROM | post_bootmode_get(0));
  551. return 0;
  552. }
  553. #endif
  554. static int reloc_fdt(void)
  555. {
  556. #ifndef CONFIG_OF_EMBED
  557. if (gd->flags & GD_FLG_SKIP_RELOC)
  558. return 0;
  559. if (gd->new_fdt) {
  560. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  561. gd->fdt_blob = gd->new_fdt;
  562. }
  563. #endif
  564. return 0;
  565. }
  566. static int reloc_bootstage(void)
  567. {
  568. #ifdef CONFIG_BOOTSTAGE
  569. if (gd->flags & GD_FLG_SKIP_RELOC)
  570. return 0;
  571. if (gd->new_bootstage) {
  572. int size = bootstage_get_size();
  573. debug("Copying bootstage from %p to %p, size %x\n",
  574. gd->bootstage, gd->new_bootstage, size);
  575. memcpy(gd->new_bootstage, gd->bootstage, size);
  576. gd->bootstage = gd->new_bootstage;
  577. }
  578. #endif
  579. return 0;
  580. }
  581. static int setup_reloc(void)
  582. {
  583. if (gd->flags & GD_FLG_SKIP_RELOC) {
  584. debug("Skipping relocation due to flag\n");
  585. return 0;
  586. }
  587. #ifdef CONFIG_SYS_TEXT_BASE
  588. #ifdef ARM
  589. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  590. #elif defined(CONFIG_M68K)
  591. /*
  592. * On all ColdFire arch cpu, monitor code starts always
  593. * just after the default vector table location, so at 0x400
  594. */
  595. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  596. #else
  597. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  598. #endif
  599. #endif
  600. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  601. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  602. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  603. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  604. gd->start_addr_sp);
  605. return 0;
  606. }
  607. #ifdef CONFIG_OF_BOARD_FIXUP
  608. static int fix_fdt(void)
  609. {
  610. return board_fix_fdt((void *)gd->fdt_blob);
  611. }
  612. #endif
  613. /* ARM calls relocate_code from its crt0.S */
  614. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  615. !CONFIG_IS_ENABLED(X86_64)
  616. static int jump_to_copy(void)
  617. {
  618. if (gd->flags & GD_FLG_SKIP_RELOC)
  619. return 0;
  620. /*
  621. * x86 is special, but in a nice way. It uses a trampoline which
  622. * enables the dcache if possible.
  623. *
  624. * For now, other archs use relocate_code(), which is implemented
  625. * similarly for all archs. When we do generic relocation, hopefully
  626. * we can make all archs enable the dcache prior to relocation.
  627. */
  628. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  629. /*
  630. * SDRAM and console are now initialised. The final stack can now
  631. * be setup in SDRAM. Code execution will continue in Flash, but
  632. * with the stack in SDRAM and Global Data in temporary memory
  633. * (CPU cache)
  634. */
  635. arch_setup_gd(gd->new_gd);
  636. board_init_f_r_trampoline(gd->start_addr_sp);
  637. #else
  638. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  639. #endif
  640. return 0;
  641. }
  642. #endif
  643. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  644. static int initf_bootstage(void)
  645. {
  646. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  647. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  648. int ret;
  649. ret = bootstage_init(!from_spl);
  650. if (ret)
  651. return ret;
  652. if (from_spl) {
  653. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  654. CONFIG_BOOTSTAGE_STASH_SIZE);
  655. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  656. if (ret && ret != -ENOENT) {
  657. debug("Failed to unstash bootstage: err=%d\n", ret);
  658. return ret;
  659. }
  660. }
  661. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  662. return 0;
  663. }
  664. static int initf_console_record(void)
  665. {
  666. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  667. return console_record_init();
  668. #else
  669. return 0;
  670. #endif
  671. }
  672. static int initf_dm(void)
  673. {
  674. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  675. int ret;
  676. bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
  677. ret = dm_init_and_scan(true);
  678. bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
  679. if (ret)
  680. return ret;
  681. #endif
  682. #ifdef CONFIG_TIMER_EARLY
  683. ret = dm_timer_init();
  684. if (ret)
  685. return ret;
  686. #endif
  687. return 0;
  688. }
  689. /* Architecture-specific memory reservation */
  690. __weak int reserve_arch(void)
  691. {
  692. return 0;
  693. }
  694. __weak int arch_cpu_init_dm(void)
  695. {
  696. return 0;
  697. }
  698. static const init_fnc_t init_sequence_f[] = {
  699. setup_mon_len,
  700. #ifdef CONFIG_OF_CONTROL
  701. fdtdec_setup,
  702. #endif
  703. #ifdef CONFIG_TRACE
  704. trace_early_init,
  705. #endif
  706. initf_malloc,
  707. log_init,
  708. initf_bootstage, /* uses its own timer, so does not need DM */
  709. initf_console_record,
  710. #if defined(CONFIG_HAVE_FSP)
  711. arch_fsp_init,
  712. #endif
  713. arch_cpu_init, /* basic arch cpu dependent setup */
  714. mach_cpu_init, /* SoC/machine dependent CPU setup */
  715. initf_dm,
  716. arch_cpu_init_dm,
  717. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  718. board_early_init_f,
  719. #endif
  720. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  721. /* get CPU and bus clocks according to the environment variable */
  722. get_clocks, /* get CPU and bus clocks (etc.) */
  723. #endif
  724. #if !defined(CONFIG_M68K)
  725. timer_init, /* initialize timer */
  726. #endif
  727. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  728. board_postclk_init,
  729. #endif
  730. env_init, /* initialize environment */
  731. init_baud_rate, /* initialze baudrate settings */
  732. serial_init, /* serial communications setup */
  733. console_init_f, /* stage 1 init of console */
  734. display_options, /* say that we are here */
  735. display_text_info, /* show debugging info if required */
  736. #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
  737. checkcpu,
  738. #endif
  739. #if defined(CONFIG_SYSRESET)
  740. print_resetinfo,
  741. #endif
  742. #if defined(CONFIG_DISPLAY_CPUINFO)
  743. print_cpuinfo, /* display cpu info (and speed) */
  744. #endif
  745. #if defined(CONFIG_DTB_RESELECT)
  746. embedded_dtb_select,
  747. #endif
  748. #if defined(CONFIG_DISPLAY_BOARDINFO)
  749. show_board_info,
  750. #endif
  751. INIT_FUNC_WATCHDOG_INIT
  752. #if defined(CONFIG_MISC_INIT_F)
  753. misc_init_f,
  754. #endif
  755. INIT_FUNC_WATCHDOG_RESET
  756. #if defined(CONFIG_SYS_I2C)
  757. init_func_i2c,
  758. #endif
  759. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  760. init_func_vid,
  761. #endif
  762. #if defined(CONFIG_HARD_SPI)
  763. init_func_spi,
  764. #endif
  765. announce_dram_init,
  766. dram_init, /* configure available RAM banks */
  767. #ifdef CONFIG_POST
  768. post_init_f,
  769. #endif
  770. INIT_FUNC_WATCHDOG_RESET
  771. #if defined(CONFIG_SYS_DRAM_TEST)
  772. testdram,
  773. #endif /* CONFIG_SYS_DRAM_TEST */
  774. INIT_FUNC_WATCHDOG_RESET
  775. #ifdef CONFIG_POST
  776. init_post,
  777. #endif
  778. INIT_FUNC_WATCHDOG_RESET
  779. /*
  780. * Now that we have DRAM mapped and working, we can
  781. * relocate the code and continue running from DRAM.
  782. *
  783. * Reserve memory at end of RAM for (top down in that order):
  784. * - area that won't get touched by U-Boot and Linux (optional)
  785. * - kernel log buffer
  786. * - protected RAM
  787. * - LCD framebuffer
  788. * - monitor code
  789. * - board info struct
  790. */
  791. setup_dest_addr,
  792. #ifdef CONFIG_PRAM
  793. reserve_pram,
  794. #endif
  795. reserve_round_4k,
  796. #ifdef CONFIG_ARM
  797. reserve_mmu,
  798. #endif
  799. reserve_video,
  800. reserve_trace,
  801. reserve_uboot,
  802. reserve_malloc,
  803. reserve_board,
  804. setup_machine,
  805. reserve_global_data,
  806. reserve_fdt,
  807. reserve_bootstage,
  808. reserve_arch,
  809. reserve_stacks,
  810. dram_init_banksize,
  811. show_dram_config,
  812. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  813. defined(CONFIG_SH)
  814. setup_board_part1,
  815. #endif
  816. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  817. INIT_FUNC_WATCHDOG_RESET
  818. setup_board_part2,
  819. #endif
  820. display_new_sp,
  821. #ifdef CONFIG_OF_BOARD_FIXUP
  822. fix_fdt,
  823. #endif
  824. INIT_FUNC_WATCHDOG_RESET
  825. reloc_fdt,
  826. reloc_bootstage,
  827. setup_reloc,
  828. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  829. copy_uboot_to_ram,
  830. do_elf_reloc_fixups,
  831. clear_bss,
  832. #endif
  833. #if defined(CONFIG_XTENSA)
  834. clear_bss,
  835. #endif
  836. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  837. !CONFIG_IS_ENABLED(X86_64)
  838. jump_to_copy,
  839. #endif
  840. NULL,
  841. };
  842. void board_init_f(ulong boot_flags)
  843. {
  844. gd->flags = boot_flags;
  845. gd->have_console = 0;
  846. if (initcall_run_list(init_sequence_f))
  847. hang();
  848. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  849. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  850. !defined(CONFIG_ARC)
  851. /* NOTREACHED - jump_to_copy() does not return */
  852. hang();
  853. #endif
  854. }
  855. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  856. /*
  857. * For now this code is only used on x86.
  858. *
  859. * init_sequence_f_r is the list of init functions which are run when
  860. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  861. * The following limitations must be considered when implementing an
  862. * '_f_r' function:
  863. * - 'static' variables are read-only
  864. * - Global Data (gd->xxx) is read/write
  865. *
  866. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  867. * supported). It _should_, if possible, copy global data to RAM and
  868. * initialise the CPU caches (to speed up the relocation process)
  869. *
  870. * NOTE: At present only x86 uses this route, but it is intended that
  871. * all archs will move to this when generic relocation is implemented.
  872. */
  873. static const init_fnc_t init_sequence_f_r[] = {
  874. #if !CONFIG_IS_ENABLED(X86_64)
  875. init_cache_f_r,
  876. #endif
  877. NULL,
  878. };
  879. void board_init_f_r(void)
  880. {
  881. if (initcall_run_list(init_sequence_f_r))
  882. hang();
  883. /*
  884. * The pre-relocation drivers may be using memory that has now gone
  885. * away. Mark serial as unavailable - this will fall back to the debug
  886. * UART if available.
  887. *
  888. * Do the same with log drivers since the memory may not be available.
  889. */
  890. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  891. #ifdef CONFIG_TIMER
  892. gd->timer = NULL;
  893. #endif
  894. /*
  895. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  896. * Transfer execution from Flash to RAM by calculating the address
  897. * of the in-RAM copy of board_init_r() and calling it
  898. */
  899. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  900. /* NOTREACHED - board_init_r() does not return */
  901. hang();
  902. }
  903. #endif /* CONFIG_X86 */