timer.c 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007-2011
  4. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  5. * Tom Cubie <tangliang@allwinnertech.com>
  6. */
  7. #include <common.h>
  8. #include <time.h>
  9. #include <asm/io.h>
  10. #include <asm/arch/timer.h>
  11. DECLARE_GLOBAL_DATA_PTR;
  12. #define TIMER_MODE (0x0 << 7) /* continuous mode */
  13. #define TIMER_DIV (0x0 << 4) /* pre scale 1 */
  14. #define TIMER_SRC (0x1 << 2) /* osc24m */
  15. #define TIMER_RELOAD (0x1 << 1) /* reload internal value */
  16. #define TIMER_EN (0x1 << 0) /* enable timer */
  17. #define TIMER_CLOCK (24 * 1000 * 1000)
  18. #define COUNT_TO_USEC(x) ((x) / 24)
  19. #define USEC_TO_COUNT(x) ((x) * 24)
  20. #define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
  21. #define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
  22. #define TIMER_LOAD_VAL 0xffffffff
  23. #define TIMER_NUM 0 /* we use timer 0 */
  24. /* read the 32-bit timer */
  25. static ulong read_timer(void)
  26. {
  27. struct sunxi_timer_reg *timers =
  28. (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
  29. struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
  30. /*
  31. * The hardware timer counts down, therefore we invert to
  32. * produce an incrementing timer.
  33. */
  34. return ~readl(&timer->val);
  35. }
  36. /* init timer register */
  37. int timer_init(void)
  38. {
  39. struct sunxi_timer_reg *timers =
  40. (struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
  41. struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
  42. writel(TIMER_LOAD_VAL, &timer->inter);
  43. writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN,
  44. &timer->ctl);
  45. return 0;
  46. }
  47. /* timer without interrupts */
  48. static ulong get_timer_masked(void)
  49. {
  50. /* current tick value */
  51. ulong now = TICKS_TO_HZ(read_timer());
  52. if (now >= gd->arch.lastinc) /* normal (non rollover) */
  53. gd->arch.tbl += (now - gd->arch.lastinc);
  54. else {
  55. /* rollover */
  56. gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL)
  57. - gd->arch.lastinc) + now;
  58. }
  59. gd->arch.lastinc = now;
  60. return gd->arch.tbl;
  61. }
  62. ulong get_timer(ulong base)
  63. {
  64. return get_timer_masked() - base;
  65. }
  66. /* delay x useconds */
  67. void __udelay(unsigned long usec)
  68. {
  69. long tmo = USEC_TO_COUNT(usec);
  70. ulong now, last = read_timer();
  71. while (tmo > 0) {
  72. now = read_timer();
  73. if (now > last) /* normal (non rollover) */
  74. tmo -= now - last;
  75. else /* rollover */
  76. tmo -= TIMER_LOAD_VAL - last + now;
  77. last = now;
  78. }
  79. }
  80. /*
  81. * This function is derived from PowerPC code (read timebase as long long).
  82. * On ARM it just returns the timer value.
  83. */
  84. unsigned long long get_ticks(void)
  85. {
  86. return get_timer(0);
  87. }
  88. /*
  89. * This function is derived from PowerPC code (timebase clock frequency).
  90. * On ARM it returns the number of timer ticks per second.
  91. */
  92. ulong get_tbclk(void)
  93. {
  94. return CONFIG_SYS_HZ;
  95. }