timer.c 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  5. */
  6. #include <common.h>
  7. #include <time.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/hardware.h>
  10. #include <asm/arch/spr_gpt.h>
  11. #include <asm/arch/spr_misc.h>
  12. #define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
  13. #define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
  14. static struct gpt_regs *const gpt_regs_p =
  15. (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
  16. static struct misc_regs *const misc_regs_p =
  17. (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
  18. DECLARE_GLOBAL_DATA_PTR;
  19. static ulong get_timer_masked(void);
  20. #define timestamp gd->arch.tbl
  21. #define lastdec gd->arch.lastinc
  22. int timer_init(void)
  23. {
  24. u32 synth;
  25. /* Prescaler setting */
  26. #if defined(CONFIG_SPEAR3XX)
  27. writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
  28. synth = MISC_GPT4SYNTH;
  29. #elif defined(CONFIG_SPEAR600)
  30. writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
  31. synth = MISC_GPT3SYNTH;
  32. #else
  33. # error Incorrect config. Can only be SPEAR{600|300|310|320}
  34. #endif
  35. writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
  36. &misc_regs_p->periph_clk_cfg);
  37. /* disable timers */
  38. writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
  39. /* load value for free running */
  40. writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
  41. /* auto reload, start timer */
  42. writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
  43. /* Reset the timer */
  44. lastdec = READ_TIMER();
  45. timestamp = 0;
  46. return 0;
  47. }
  48. /*
  49. * timer without interrupts
  50. */
  51. ulong get_timer(ulong base)
  52. {
  53. return (get_timer_masked() / GPT_RESOLUTION) - base;
  54. }
  55. void __udelay(unsigned long usec)
  56. {
  57. ulong tmo;
  58. ulong start = get_timer_masked();
  59. ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
  60. ulong rndoff;
  61. rndoff = (usec % 10) ? 1 : 0;
  62. /* tenudelcnt timer tick gives 10 microsecconds delay */
  63. tmo = ((usec / 10) + rndoff) * tenudelcnt;
  64. while ((ulong) (get_timer_masked() - start) < tmo)
  65. ;
  66. }
  67. static ulong get_timer_masked(void)
  68. {
  69. ulong now = READ_TIMER();
  70. if (now >= lastdec) {
  71. /* normal mode */
  72. timestamp += now - lastdec;
  73. } else {
  74. /* we have an overflow ... */
  75. timestamp += now + GPT_FREE_RUNNING - lastdec;
  76. }
  77. lastdec = now;
  78. return timestamp;
  79. }
  80. /*
  81. * This function is derived from PowerPC code (read timebase as long long).
  82. * On ARM it just returns the timer value.
  83. */
  84. unsigned long long get_ticks(void)
  85. {
  86. return get_timer(0);
  87. }
  88. /*
  89. * This function is derived from PowerPC code (timebase clock frequency).
  90. * On ARM it returns the number of timer ticks per second.
  91. */
  92. ulong get_tbclk(void)
  93. {
  94. return CONFIG_SPEAR_HZ;
  95. }