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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Andesboot - Startup Code for Whitiger core
  4. *
  5. * Copyright (C) 2006 Andes Technology Corporation
  6. * Copyright (C) 2006 Shawn Lin <nobuhiro@andestech.com>
  7. * Copyright (C) 2011 Macpaul Lin <macpaul@andestech.com>
  8. * Greentime Hu <greentime@andestech.com>
  9. */
  10. .pic
  11. #include <asm-offsets.h>
  12. #include <config.h>
  13. #include <common.h>
  14. #include <asm/macro.h>
  15. /*
  16. * Jump vector table for EVIC mode
  17. */
  18. #define ENA_DCAC 2UL
  19. #define DIS_DCAC ~ENA_DCAC
  20. #define ICAC_MEM_KBF_ISET (0x07) ! I Cache sets per way
  21. #define ICAC_MEM_KBF_IWAY (0x07<<3) ! I cache ways
  22. #define ICAC_MEM_KBF_ISZ (0x07<<6) ! I cache line size
  23. #define DCAC_MEM_KBF_DSET (0x07) ! D Cache sets per way
  24. #define DCAC_MEM_KBF_DWAY (0x07<<3) ! D cache ways
  25. #define DCAC_MEM_KBF_DSZ (0x07<<6) ! D cache line size
  26. #define PSW $ir0
  27. #define EIT_INTR_PSW $ir1 ! interruption $PSW
  28. #define EIT_PREV_IPSW $ir2 ! previous $IPSW
  29. #define EIT_IVB $ir3 ! intr vector base address
  30. #define EIT_EVA $ir4 ! MMU related Exception VA reg
  31. #define EIT_PREV_EVA $ir5 ! previous $eva
  32. #define EIT_ITYPE $ir6 ! interruption type
  33. #define EIT_PREV_ITYPE $ir7 ! prev intr type
  34. #define EIT_MACH_ERR $ir8 ! machine error log
  35. #define EIT_INTR_PC $ir9 ! Interruption PC
  36. #define EIT_PREV_IPC $ir10 ! previous $IPC
  37. #define EIT_OVL_INTR_PC $ir11 ! overflow interruption PC
  38. #define EIT_PREV_P0 $ir12 ! prev $P0
  39. #define EIT_PREV_P1 $ir13 ! prev $p1
  40. #define CR_ICAC_MEM $cr1 ! I-cache/memory config reg
  41. #define CR_DCAC_MEM $cr2 ! D-cache/memory config reg
  42. #define MR_CAC_CTL $mr8
  43. .globl _start
  44. _start: j reset
  45. j tlb_fill
  46. j tlb_not_present
  47. j tlb_misc
  48. j tlb_vlpt_miss
  49. j machine_error
  50. j debug
  51. j general_exception
  52. j syscall
  53. j internal_interrupt ! H0I
  54. j internal_interrupt ! H1I
  55. j internal_interrupt ! H2I
  56. j internal_interrupt ! H3I
  57. j internal_interrupt ! H4I
  58. j internal_interrupt ! H5I
  59. j software_interrupt ! S0I
  60. .balign 16
  61. /*
  62. * Andesboot Startup Code (reset vector)
  63. *
  64. * 1. bootstrap
  65. * 1.1 reset - start of u-boot
  66. * 1.2 to superuser mode - as is when reset
  67. * 1.4 Do lowlevel_init
  68. * - (this will jump out to lowlevel_init.S in SoC)
  69. * - (lowlevel_init)
  70. * 1.3 Turn off watchdog timer
  71. * - (this will jump out to watchdog.S in SoC)
  72. * - (turnoff_watchdog)
  73. * 2. Do critical init when reboot (not from mem)
  74. * 3. Relocate andesboot to ram
  75. * 4. Setup stack
  76. * 5. Jump to second stage (board_init_r)
  77. */
  78. /* Note: TEXT_BASE is defined by the (board-dependent) linker script */
  79. .globl _TEXT_BASE
  80. _TEXT_BASE:
  81. .word CONFIG_SYS_TEXT_BASE
  82. /* IRQ stack memory (calculated at run-time) + 8 bytes */
  83. .globl IRQ_STACK_START_IN
  84. IRQ_STACK_START_IN:
  85. .word 0x0badc0de
  86. /*
  87. * The bootstrap code of nds32 core
  88. */
  89. reset:
  90. /*
  91. * gp = ~0 for burn mode
  92. * = ~load_address for load mode
  93. */
  94. reset_gp:
  95. .relax_hint 0
  96. sethi $gp, hi20(_GLOBAL_OFFSET_TABLE_-8)
  97. .relax_hint 0
  98. ori $gp, $gp, lo12(_GLOBAL_OFFSET_TABLE_-4)
  99. add5.pc $gp
  100. set_ivb:
  101. li $r0, 0x0
  102. /* turn on BTB */
  103. mtsr $r0, $misc_ctl
  104. /* set IVIC, vector size: 4 bytes, base: 0x0 */
  105. mtsr $r0, $ivb
  106. /*
  107. * MMU_CTL NTC0 Non-cacheable
  108. */
  109. li $r0, ~0x6
  110. mfsr $r1, $mr0
  111. and $r1, $r1, $r0
  112. mtsr $r1, $mr0
  113. li $r0, ~0x3
  114. mfsr $r1, $mr8
  115. and $r1, $r1, $r0
  116. mtsr $r1, $mr8
  117. #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
  118. /*
  119. * MMU_CTL NTC0 Cacheable/Write-Back
  120. */
  121. li $r0, 0x4
  122. mfsr $r1, $mr0
  123. or $r1, $r1, $r0
  124. mtsr $r1, $mr0
  125. #endif
  126. #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
  127. #ifdef CONFIG_ARCH_MAP_SYSMEM
  128. /*
  129. * MMU_CTL NTC1 Non-cacheable
  130. */
  131. li $r0, ~0x18
  132. mfsr $r1, $mr0
  133. and $r1, $r1, $r0
  134. mtsr $r1, $mr0
  135. /*
  136. * MMU_CTL NTM1 mapping for partition 0
  137. */
  138. li $r0, ~0x6000
  139. mfsr $r1, $mr0
  140. and $r1, $r1, $r0
  141. mtsr $r1, $mr0
  142. #endif
  143. #endif
  144. #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
  145. li $r0, 0x1
  146. mfsr $r1, $mr8
  147. or $r1, $r1, $r0
  148. mtsr $r1, $mr8
  149. #endif
  150. #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
  151. li $r0, 0x2
  152. mfsr $r1, $mr8
  153. or $r1, $r1, $r0
  154. mtsr $r1, $mr8
  155. #endif
  156. jal mem_init
  157. #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
  158. jal lowlevel_init
  159. /*
  160. * gp = ~VMA for burn mode
  161. * = ~load_address for load mode
  162. */
  163. update_gp:
  164. .relax_hint 0
  165. sethi $gp, hi20(_GLOBAL_OFFSET_TABLE_-8)
  166. .relax_hint 0
  167. ori $gp, $gp, lo12(_GLOBAL_OFFSET_TABLE_-4)
  168. add5.pc $gp
  169. #endif
  170. /*
  171. * do critical initializations first (shall be in short time)
  172. * do self_relocation ASAP.
  173. */
  174. /*
  175. * Set the N1213 (Whitiger) core to superuser mode
  176. * According to spec, it is already when reset
  177. */
  178. #ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
  179. jal turnoff_watchdog
  180. #endif
  181. /*
  182. * Set stackpointer in internal RAM to call board_init_f
  183. * $sp must be 8-byte alignment for ABI compliance.
  184. */
  185. call_board_init_f:
  186. li $sp, CONFIG_SYS_INIT_SP_ADDR
  187. move $r0, $sp
  188. bal board_init_f_alloc_reserve
  189. move $sp, $r0
  190. bal board_init_f_init_reserve
  191. #ifdef CONFIG_DEBUG_UART
  192. bal debug_uart_init
  193. #endif
  194. li $r0, 0x00000000
  195. #ifdef __PIC__
  196. #ifdef __NDS32_N1213_43U1H__
  197. /* __NDS32_N1213_43U1H__ implies NDS32 V0 ISA */
  198. la $r15, board_init_f ! store function address into $r15
  199. #endif
  200. #endif
  201. j board_init_f ! jump to board_init_f() in lib/board.c
  202. /*
  203. * void relocate_code(addr_sp, gd, addr_moni)
  204. *
  205. * This "function" does not return, instead it continues in RAM
  206. * after relocating the monitor code.
  207. *
  208. */
  209. /*
  210. * gp = ~RAM_SIZE - TEXT_SIZE for burn/load mode
  211. */
  212. .globl relocate_code
  213. relocate_code:
  214. move $r4, $r0 /* save addr_sp */
  215. move $r5, $r1 /* save addr of gd */
  216. move $r6, $r2 /* save addr of destination */
  217. /* Set up the stack */
  218. stack_setup:
  219. move $sp, $r4
  220. la $r0, _start@GOTOFF
  221. beq $r0, $r6, clear_bss /* skip relocation */
  222. la $r1, _end@GOTOFF
  223. move $r2, $r6 /* r2 <- scratch for copy_loop */
  224. copy_loop:
  225. lmw.bim $r11, [$r0], $r18
  226. smw.bim $r11, [$r2], $r18
  227. blt $r0, $r1, copy_loop
  228. /*
  229. * fix relocations related issues
  230. */
  231. fix_relocations:
  232. l.w $r0, _TEXT_BASE@GOTOFF /* r0 <- Text base */
  233. sub $r9, $r6, $r0 /* r9 <- relocation offset */
  234. la $r7, __rel_dyn_start@GOTOFF
  235. add $r7, $r7, $r9 /* r2 <- rel __got_start in RAM */
  236. la $r8, __rel_dyn_end@GOTOFF
  237. add $r8, $r8, $r9 /* r2 <- rel __got_start in RAM */
  238. li $r3, #0x2a /* R_NDS32_RELATIVE */
  239. 1:
  240. lmw.bim $r0, [$r7], $r2 /* r0,r1,r2 <- adr,type,addend */
  241. bne $r1, $r3, 2f
  242. add $r0, $r0, $r9
  243. add $r2, $r2, $r9
  244. sw $r2, [$r0]
  245. 2:
  246. blt $r7, $r8, 1b
  247. clear_bss:
  248. la $r0, __bss_start@GOTOFF /* r0 <- rel __bss_start in FLASH */
  249. add $r0, $r0, $r9 /* r0 <- rel __bss_start in FLASH */
  250. la $r1, __bss_end@GOTOFF /* r1 <- rel __bss_end in RAM */
  251. add $r1, $r1, $r9 /* r0 <- rel __bss_end in RAM */
  252. li $r2, 0x00000000 /* clear */
  253. clbss_l:
  254. sw $r2, [$r0] /* clear loop... */
  255. addi $r0, $r0, #4
  256. bne $r0, $r1, clbss_l
  257. /*
  258. * We are done. Do not return, instead branch to second part of board
  259. * initialization, now running from RAM.
  260. */
  261. call_board_init_r:
  262. bal invalidate_icache_all
  263. bal flush_dcache_all
  264. la $r0, board_init_r@GOTOFF
  265. move $lp, $r0 /* offset of board_init_r() */
  266. add $lp, $lp, $r9 /* real address of board_init_r() */
  267. /* setup parameters for board_init_r */
  268. move $r0, $r5 /* gd_t */
  269. move $r1, $r6 /* dest_addr */
  270. #ifdef __PIC__
  271. #ifdef __NDS32_N1213_43U1H__ /* NDS32 V0 ISA */
  272. move $r15, $lp /* store function address into $r15 */
  273. #endif
  274. #endif
  275. /* jump to it ... */
  276. jr $lp /* jump to board_init_r() */
  277. /*
  278. * Invalidate I$
  279. */
  280. invalidate_icac:
  281. ! read $cr1(I CAC/MEM cfg. reg.) configuration
  282. mfsr $t0, CR_ICAC_MEM
  283. ! Get the ISZ field
  284. andi $p0, $t0, ICAC_MEM_KBF_ISZ
  285. ! if $p0=0, then no I CAC existed
  286. beqz $p0, end_flush_icache
  287. ! get $p0 the index of I$ block
  288. srli $p0, $p0, 6
  289. ! $t1= bit width of I cache line size(ISZ)
  290. addi $t1, $p0, 2
  291. li $t4, 1
  292. sll $t5, $t4, $t1 ! get $t5 cache line size
  293. andi $p1, $t0, ICAC_MEM_KBF_ISET ! get the ISET field
  294. addi $t2, $p1, 6 ! $t2= bit width of ISET
  295. andi $p1, $t0, ICAC_MEM_KBF_IWAY ! get bitfield of Iway
  296. srli $p1, $p1, 3
  297. addi $p1, $p1, 1 ! then $p1 is I way number
  298. add $t3, $t2, $t1 ! SHIFT
  299. sll $p1, $p1, $t3 ! GET the total cache size
  300. ICAC_LOOP:
  301. sub $p1, $p1, $t5
  302. cctl $p1, L1I_IX_INVAL
  303. bnez $p1, ICAC_LOOP
  304. end_flush_icache:
  305. ret
  306. /*
  307. * Invalidate D$
  308. */
  309. invalidate_dcac:
  310. ! read $cr2(D CAC/MEM cfg. reg.) configuration
  311. mfsr $t0, CR_DCAC_MEM
  312. ! Get the DSZ field
  313. andi $p0, $t0, DCAC_MEM_KBF_DSZ
  314. ! if $p0=0, then no D CAC existed
  315. beqz $p0, end_flush_dcache
  316. ! get $p0 the index of D$ block
  317. srli $p0, $p0, 6
  318. ! $t1= bit width of D cache line size(DSZ)
  319. addi $t1, $p0, 2
  320. li $t4, 1
  321. sll $t5, $t4, $t1 ! get $t5 cache line size
  322. andi $p1, $t0, DCAC_MEM_KBF_DSET ! get the DSET field
  323. addi $t2, $p1, 6 ! $t2= bit width of DSET
  324. andi $p1, $t0, DCAC_MEM_KBF_DWAY ! get bitfield of D way
  325. srli $p1, $p1, 3
  326. addi $p1, $p1, 1 ! then $p1 is D way number
  327. add $t3, $t2, $t1 ! SHIFT
  328. sll $p1, $p1, $t3 ! GET the total cache size
  329. DCAC_LOOP:
  330. sub $p1, $p1, $t5
  331. cctl $p1, L1D_IX_INVAL
  332. bnez $p1, DCAC_LOOP
  333. end_flush_dcache:
  334. ret
  335. /*
  336. * Interrupt handling
  337. */
  338. /*
  339. * exception handlers
  340. */
  341. .align 5
  342. .macro SAVE_ALL
  343. ! FIXME: Other way to get PC?
  344. ! FIXME: Update according to the newest spec!!
  345. 1:
  346. li $r28, 1
  347. push $r28
  348. mfsr $r28, PSW ! $PSW
  349. push $r28
  350. mfsr $r28, EIT_EVA ! $ir1 $EVA
  351. push $r28
  352. mfsr $r28, EIT_ITYPE ! $ir2 $ITYPE
  353. push $r28
  354. mfsr $r28, EIT_MACH_ERR ! $ir3 Mach Error
  355. push $r28
  356. mfsr $r28, EIT_INTR_PSW ! $ir5 $IPSW
  357. push $r28
  358. mfsr $r28, EIT_PREV_IPSW ! $ir6 prev $IPSW
  359. push $r28
  360. mfsr $r28, EIT_PREV_EVA ! $ir7 prev $EVA
  361. push $r28
  362. mfsr $r28, EIT_PREV_ITYPE ! $ir8 prev $ITYPE
  363. push $r28
  364. mfsr $r28, EIT_INTR_PC ! $ir9 Interruption PC
  365. push $r28
  366. mfsr $r28, EIT_PREV_IPC ! $ir10 prev INTR_PC
  367. push $r28
  368. mfsr $r28, EIT_OVL_INTR_PC ! $ir11 Overflowed INTR_PC
  369. push $r28
  370. mfusr $r28, $d1.lo
  371. push $r28
  372. mfusr $r28, $d1.hi
  373. push $r28
  374. mfusr $r28, $d0.lo
  375. push $r28
  376. mfusr $r28, $d0.hi
  377. push $r28
  378. pushm $r0, $r30 ! store $sp-$r31, ra-$r30, $gp-$r29, $r28-$fp
  379. addi $sp, $sp, -4 ! make room for implicit pt_regs parameters
  380. .endm
  381. .align 5
  382. tlb_fill:
  383. SAVE_ALL
  384. move $r0, $sp ! To get the kernel stack
  385. li $r1, 1 ! Determine interruption type
  386. bal do_interruption
  387. .align 5
  388. tlb_not_present:
  389. SAVE_ALL
  390. move $r0, $sp ! To get the kernel stack
  391. li $r1, 2 ! Determine interruption type
  392. bal do_interruption
  393. .align 5
  394. tlb_misc:
  395. SAVE_ALL
  396. move $r0, $sp ! To get the kernel stack
  397. li $r1, 3 ! Determine interruption type
  398. bal do_interruption
  399. .align 5
  400. tlb_vlpt_miss:
  401. SAVE_ALL
  402. move $r0, $sp ! To get the kernel stack
  403. li $r1, 4 ! Determine interruption type
  404. bal do_interruption
  405. .align 5
  406. machine_error:
  407. SAVE_ALL
  408. move $r0, $sp ! To get the kernel stack
  409. li $r1, 5 ! Determine interruption type
  410. bal do_interruption
  411. .align 5
  412. debug:
  413. SAVE_ALL
  414. move $r0, $sp ! To get the kernel stack
  415. li $r1, 6 ! Determine interruption type
  416. bal do_interruption
  417. .align 5
  418. general_exception:
  419. SAVE_ALL
  420. move $r0, $sp ! To get the kernel stack
  421. li $r1, 7 ! Determine interruption type
  422. bal do_interruption
  423. .align 5
  424. syscall:
  425. SAVE_ALL
  426. move $r0, $sp ! To get the kernel stack
  427. li $r1, 8 ! Determine interruption type
  428. bal do_interruption
  429. .align 5
  430. internal_interrupt:
  431. SAVE_ALL
  432. move $r0, $sp ! To get the kernel stack
  433. li $r1, 9 ! Determine interruption type
  434. bal do_interruption
  435. .align 5
  436. software_interrupt:
  437. SAVE_ALL
  438. move $r0, $sp ! To get the kernel stack
  439. li $r1, 10 ! Determine interruption type
  440. bal do_interruption
  441. .align 5