cpu.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. *
  4. * (C) Copyright 2000-2003
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
  8. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  9. */
  10. #include <common.h>
  11. #include <init.h>
  12. #include <net.h>
  13. #include <vsprintf.h>
  14. #include <watchdog.h>
  15. #include <command.h>
  16. #include <netdev.h>
  17. #include <asm/global_data.h>
  18. #include <linux/delay.h>
  19. #include <asm/immap.h>
  20. #include <asm/io.h>
  21. DECLARE_GLOBAL_DATA_PTR;
  22. int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  23. {
  24. rcm_t *rcm = (rcm_t *) (MMAP_RCM);
  25. udelay(1000);
  26. setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
  27. /* we don't return! */
  28. return 0;
  29. };
  30. #if defined(CONFIG_DISPLAY_CPUINFO)
  31. int print_cpuinfo(void)
  32. {
  33. ccm_t *ccm = (ccm_t *) MMAP_CCM;
  34. u16 msk;
  35. u16 id = 0;
  36. u8 ver;
  37. puts("CPU: ");
  38. msk = (in_be16(&ccm->cir) >> 6);
  39. ver = (in_be16(&ccm->cir) & 0x003f);
  40. switch (msk) {
  41. #ifdef CONFIG_MCF5301x
  42. case 0x78:
  43. id = 53010;
  44. break;
  45. case 0x77:
  46. id = 53012;
  47. break;
  48. case 0x76:
  49. id = 53015;
  50. break;
  51. case 0x74:
  52. id = 53011;
  53. break;
  54. case 0x73:
  55. id = 53013;
  56. break;
  57. #endif
  58. #ifdef CONFIG_MCF532x
  59. case 0x54:
  60. id = 5329;
  61. break;
  62. case 0x59:
  63. id = 5328;
  64. break;
  65. case 0x61:
  66. id = 5327;
  67. break;
  68. case 0x65:
  69. id = 5373;
  70. break;
  71. case 0x68:
  72. id = 53721;
  73. break;
  74. case 0x69:
  75. id = 5372;
  76. break;
  77. case 0x6B:
  78. id = 5372;
  79. break;
  80. #endif
  81. }
  82. if (id) {
  83. char buf1[32], buf2[32];
  84. printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
  85. ver);
  86. printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
  87. strmhz(buf1, gd->cpu_clk),
  88. strmhz(buf2, gd->bus_clk));
  89. }
  90. return 0;
  91. };
  92. #endif /* CONFIG_DISPLAY_CPUINFO */
  93. #if defined(CONFIG_WATCHDOG)
  94. /* Called by macro WATCHDOG_RESET */
  95. void watchdog_reset(void)
  96. {
  97. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  98. /* Count register */
  99. out_be16(&wdp->sr, 0x5555);
  100. out_be16(&wdp->sr, 0xaaaa);
  101. }
  102. int watchdog_disable(void)
  103. {
  104. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  105. /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
  106. /* halted watchdog timer */
  107. setbits_be16(&wdp->cr, WTM_WCR_HALTED);
  108. puts("WATCHDOG:disabled\n");
  109. return (0);
  110. }
  111. int watchdog_init(void)
  112. {
  113. wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  114. u32 wdog_module = 0;
  115. /* set timeout and enable watchdog */
  116. wdog_module = ((CONFIG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
  117. #ifdef CONFIG_M5329
  118. out_be16(&wdp->mr, wdog_module / 8192);
  119. #else
  120. out_be16(&wdp->mr, wdog_module / 4096);
  121. #endif
  122. out_be16(&wdp->cr, WTM_WCR_EN);
  123. puts("WATCHDOG:enabled\n");
  124. return (0);
  125. }
  126. #endif /* CONFIG_WATCHDOG */
  127. #if defined(CONFIG_MCFFEC)
  128. /* Default initializations for MCFFEC controllers. To override,
  129. * create a board-specific function called:
  130. * int board_eth_init(struct bd_info *bis)
  131. */
  132. int cpu_eth_init(struct bd_info *bis)
  133. {
  134. return mcffec_initialize(bis);
  135. }
  136. #endif