start.S 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
  4. * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
  5. */
  6. #include <asm-offsets.h>
  7. #include <config.h>
  8. #include <asm/cache.h>
  9. #define _START _start
  10. #define _FAULT _fault
  11. #define SAVE_ALL \
  12. move.w #0x2700,%sr; /* disable intrs */ \
  13. subl #60,%sp; /* space for 15 regs */ \
  14. moveml %d0-%d7/%a0-%a6,%sp@;
  15. #define RESTORE_ALL \
  16. moveml %sp@,%d0-%d7/%a0-%a6; \
  17. addl #60,%sp; /* space for 15 regs */ \
  18. rte;
  19. #if defined(CONFIG_CF_SBF)
  20. #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
  21. CONFIG_SYS_INIT_RAM_ADDR)
  22. #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
  23. CONFIG_SYS_INIT_RAM_ADDR)
  24. #endif
  25. .text
  26. /*
  27. * Vector table. This is used for initial platform startup.
  28. * These vectors are to catch any un-intended traps.
  29. */
  30. _vectors:
  31. #if defined(CONFIG_CF_SBF)
  32. INITSP: .long 0 /* Initial SP */
  33. INITPC: .long ASM_DRAMINIT /* Initial PC */
  34. #else
  35. INITSP: .long 0 /* Initial SP */
  36. INITPC: .long _START /* Initial PC */
  37. #endif
  38. vector02_0F:
  39. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  40. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  41. /* Reserved */
  42. vector10_17:
  43. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  44. vector18_1F:
  45. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  46. #if !defined(CONFIG_CF_SBF)
  47. /* TRAP #0 - #15 */
  48. vector20_2F:
  49. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  50. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  51. /* Reserved */
  52. vector30_3F:
  53. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  54. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  55. vector64_127:
  56. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  57. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  58. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  59. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  60. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  61. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  62. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  63. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  64. vector128_191:
  65. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  66. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  67. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  68. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  69. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  70. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  71. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  72. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  73. vector192_255:
  74. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  75. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  76. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  77. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  78. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  79. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  80. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  81. .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
  82. #endif
  83. #if defined(CONFIG_CF_SBF)
  84. /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
  85. asm_sbf_img_hdr:
  86. .long 0x00000000 /* checksum, not yet implemented */
  87. .long 0x00020000 /* image length */
  88. .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
  89. asm_dram_init:
  90. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
  91. movec %d0, %RAMBAR1 /* init Rambar */
  92. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
  93. clr.l %sp@-
  94. /* Must disable global address */
  95. move.l #0xFC008000, %a1
  96. move.l #(CONFIG_SYS_CS0_BASE), (%a1)
  97. move.l #0xFC008008, %a1
  98. move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
  99. move.l #0xFC008004, %a1
  100. move.l #(CONFIG_SYS_CS0_MASK), (%a1)
  101. /*
  102. * Dram Initialization
  103. * a1, a2, and d0
  104. */
  105. move.l #0xFC0A4074, %a1
  106. move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
  107. nop
  108. /* SDRAM Chip 0 and 1 */
  109. move.l #0xFC0B8110, %a1
  110. move.l #0xFC0B8114, %a2
  111. /* calculate the size */
  112. move.l #0x13, %d1
  113. move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
  114. #ifdef CONFIG_SYS_SDRAM_BASE1
  115. lsr.l #1, %d2
  116. #endif
  117. dramsz_loop:
  118. lsr.l #1, %d2
  119. add.l #1, %d1
  120. cmp.l #1, %d2
  121. bne dramsz_loop
  122. /* SDRAM Chip 0 and 1 */
  123. move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
  124. or.l %d1, (%a1)
  125. #ifdef CONFIG_SYS_SDRAM_BASE1
  126. move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
  127. or.l %d1, (%a2)
  128. #endif
  129. nop
  130. /* dram cfg1 and cfg2 */
  131. move.l #0xFC0B8008, %a1
  132. move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
  133. nop
  134. move.l #0xFC0B800C, %a2
  135. move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
  136. nop
  137. move.l #0xFC0B8000, %a1 /* Mode */
  138. move.l #0xFC0B8004, %a2 /* Ctrl */
  139. /* Issue PALL */
  140. move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
  141. nop
  142. /* Issue LEMR */
  143. move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
  144. nop
  145. move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
  146. nop
  147. move.l #1000, %d0
  148. wait1000:
  149. nop
  150. subq.l #1, %d0
  151. bne wait1000
  152. /* Issue PALL */
  153. move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
  154. nop
  155. /* Perform two refresh cycles */
  156. move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
  157. nop
  158. move.l %d0, (%a2)
  159. move.l %d0, (%a2)
  160. nop
  161. move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
  162. and.l #0x7FFFFFFF, %d0
  163. or.l #0x10000c00, %d0
  164. move.l %d0, (%a2)
  165. nop
  166. /*
  167. * DSPI Initialization
  168. * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
  169. * a1 - dspi status
  170. * a2 - dtfr
  171. * a3 - drfr
  172. * a4 - Dst addr
  173. */
  174. /* Enable pins for DSPI mode - chip-selects are enabled later */
  175. move.l #0xFC0A4036, %a0
  176. move.b #0x3F, %d0
  177. move.b %d0, (%a0)
  178. /* DSPI CS */
  179. #ifdef CONFIG_SYS_DSPI_CS0
  180. move.b (%a0), %d0
  181. or.l #0xC0, %d0
  182. move.b %d0, (%a0)
  183. #endif
  184. #ifdef CONFIG_SYS_DSPI_CS2
  185. move.l #0xFC0A4037, %a0
  186. move.b (%a0), %d0
  187. or.l #0x10, %d0
  188. move.b %d0, (%a0)
  189. #endif
  190. nop
  191. /* Configure DSPI module */
  192. move.l #0xFC05C000, %a0
  193. move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
  194. move.l #0xFC05C00C, %a0
  195. move.l #0x3E000011, (%a0)
  196. move.l #0xFC05C034, %a2 /* dtfr */
  197. move.l #0xFC05C03B, %a3 /* drfr */
  198. move.l #(ASM_SBF_IMG_HDR + 4), %a1
  199. move.l (%a1)+, %d5
  200. move.l (%a1), %a4
  201. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
  202. move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
  203. move.l #0xFC05C02C, %a1 /* dspi status */
  204. /* Issue commands and address */
  205. move.l #0x8004000B, %d2 /* Fast Read Cmd */
  206. jsr asm_dspi_wr_status
  207. jsr asm_dspi_rd_status
  208. move.l #0x80040000, %d2 /* Address byte 2 */
  209. jsr asm_dspi_wr_status
  210. jsr asm_dspi_rd_status
  211. move.l #0x80040000, %d2 /* Address byte 1 */
  212. jsr asm_dspi_wr_status
  213. jsr asm_dspi_rd_status
  214. move.l #0x80040000, %d2 /* Address byte 0 */
  215. jsr asm_dspi_wr_status
  216. jsr asm_dspi_rd_status
  217. move.l #0x80040000, %d2 /* Dummy Wr and Rd */
  218. jsr asm_dspi_wr_status
  219. jsr asm_dspi_rd_status
  220. /* Transfer serial boot header to sram */
  221. asm_dspi_rd_loop1:
  222. move.l #0x80040000, %d2
  223. jsr asm_dspi_wr_status
  224. jsr asm_dspi_rd_status
  225. move.b %d1, (%a0) /* read, copy to dst */
  226. add.l #1, %a0 /* inc dst by 1 */
  227. sub.l #1, %d4 /* dec cnt by 1 */
  228. bne asm_dspi_rd_loop1
  229. /* Transfer u-boot from serial flash to memory */
  230. asm_dspi_rd_loop2:
  231. move.l #0x80040000, %d2
  232. jsr asm_dspi_wr_status
  233. jsr asm_dspi_rd_status
  234. move.b %d1, (%a4) /* read, copy to dst */
  235. add.l #1, %a4 /* inc dst by 1 */
  236. sub.l #1, %d5 /* dec cnt by 1 */
  237. bne asm_dspi_rd_loop2
  238. move.l #0x00040000, %d2 /* Terminate */
  239. jsr asm_dspi_wr_status
  240. jsr asm_dspi_rd_status
  241. /* jump to memory and execute */
  242. move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
  243. move.l %a0, (%a1)
  244. jmp (%a0)
  245. asm_dspi_wr_status:
  246. move.l (%a1), %d0 /* status */
  247. and.l #0x0000F000, %d0
  248. cmp.l #0x00003000, %d0
  249. bgt asm_dspi_wr_status
  250. move.l %d2, (%a2)
  251. rts
  252. asm_dspi_rd_status:
  253. move.l (%a1), %d0 /* status */
  254. and.l #0x000000F0, %d0
  255. lsr.l #4, %d0
  256. cmp.l #0, %d0
  257. beq asm_dspi_rd_status
  258. move.b (%a3), %d1
  259. rts
  260. #endif /* CONFIG_CF_SBF */
  261. .text
  262. . = 0x400
  263. .globl _start
  264. _start:
  265. nop
  266. nop
  267. move.w #0x2700,%sr /* Mask off Interrupt */
  268. /* Set vector base register at the beginning of the Flash */
  269. #if defined(CONFIG_CF_SBF)
  270. move.l #CONFIG_SYS_TEXT_BASE, %d0
  271. movec %d0, %VBR
  272. #else
  273. move.l #CONFIG_SYS_FLASH_BASE, %d0
  274. movec %d0, %VBR
  275. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
  276. movec %d0, %RAMBAR1
  277. #endif
  278. /* invalidate and disable cache */
  279. move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
  280. movec %d0, %CACR /* Invalidate cache */
  281. move.l #0, %d0
  282. movec %d0, %ACR0
  283. movec %d0, %ACR1
  284. /* initialize general use internal ram */
  285. move.l #0, %d0
  286. move.l #(ICACHE_STATUS), %a1 /* icache */
  287. move.l #(DCACHE_STATUS), %a2 /* icache */
  288. move.l %d0, (%a1)
  289. move.l %d0, (%a2)
  290. /* put relocation table address to a5 */
  291. move.l #__got_start, %a5
  292. /* setup stack initially on top of internal static ram */
  293. move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
  294. /*
  295. * if configured, malloc_f arena will be reserved first,
  296. * then (and always) gd struct space will be reserved
  297. */
  298. move.l %sp, -(%sp)
  299. bsr board_init_f_alloc_reserve
  300. /* update stack and frame-pointers */
  301. move.l %d0, %sp
  302. move.l %sp, %fp
  303. /* initialize reserved area */
  304. move.l %d0, -(%sp)
  305. bsr board_init_f_init_reserve
  306. /* run low-level CPU init code (from flash) */
  307. bsr cpu_init_f
  308. clr.l %sp@-
  309. /* run low-level board init code (from flash) */
  310. move.l #board_init_f, %a1
  311. jsr (%a1)
  312. /* board_init_f() does not return */
  313. /******************************************************************************/
  314. /*
  315. * void relocate_code(addr_sp, gd, addr_moni)
  316. *
  317. * This "function" does not return, instead it continues in RAM
  318. * after relocating the monitor code.
  319. *
  320. * r3 = dest
  321. * r4 = src
  322. * r5 = length in bytes
  323. * r6 = cachelinesize
  324. */
  325. .globl relocate_code
  326. relocate_code:
  327. link.w %a6,#0
  328. move.l 8(%a6), %sp /* set new stack pointer */
  329. move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
  330. move.l 16(%a6), %a0 /* Save copy of Destination Address */
  331. move.l #CONFIG_SYS_MONITOR_BASE, %a1
  332. move.l #__init_end, %a2
  333. move.l %a0, %a3
  334. /* copy the code to RAM */
  335. 1:
  336. move.l (%a1)+, (%a3)+
  337. cmp.l %a1,%a2
  338. bgt.s 1b
  339. /*
  340. * We are done. Do not return, instead branch to second part of board
  341. * initialization, now running from RAM.
  342. */
  343. move.l %a0, %a1
  344. add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
  345. jmp (%a1)
  346. in_ram:
  347. clear_bss:
  348. /*
  349. * Now clear BSS segment
  350. */
  351. move.l %a0, %a1
  352. add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
  353. move.l %a0, %d1
  354. add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
  355. 6:
  356. clr.l (%a1)+
  357. cmp.l %a1,%d1
  358. bgt.s 6b
  359. /*
  360. * fix got table in RAM
  361. */
  362. move.l %a0, %a1
  363. add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
  364. move.l %a1,%a5 /* fix got pointer register a5 */
  365. move.l %a0, %a2
  366. add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
  367. 7:
  368. move.l (%a1),%d1
  369. sub.l #_start,%d1
  370. add.l %a0,%d1
  371. move.l %d1,(%a1)+
  372. cmp.l %a2, %a1
  373. bne 7b
  374. /* calculate relative jump to board_init_r in ram */
  375. move.l %a0, %a1
  376. add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
  377. /* set parameters for board_init_r */
  378. move.l %a0,-(%sp) /* dest_addr */
  379. move.l %d0,-(%sp) /* gd */
  380. jsr (%a1)
  381. /******************************************************************************/
  382. /* exception code */
  383. .globl _fault
  384. _fault:
  385. bra _fault
  386. .globl _exc_handler
  387. _exc_handler:
  388. SAVE_ALL
  389. movel %sp,%sp@-
  390. bsr exc_handler
  391. addql #4,%sp
  392. RESTORE_ALL
  393. .globl _int_handler
  394. _int_handler:
  395. SAVE_ALL
  396. movel %sp,%sp@-
  397. bsr int_handler
  398. addql #4,%sp
  399. RESTORE_ALL
  400. /******************************************************************************/
  401. .align 4