mx7_plugin.S 2.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2016 Freescale Semiconductor, Inc.
  4. */
  5. #include <config.h>
  6. #define ROM_API_TABLE_BASE_ADDR_LEGACY 0x180
  7. #define ROM_VERSION_OFFSET 0x80
  8. #define ROM_API_HWCNFG_SETUP_OFFSET 0x08
  9. plugin_start:
  10. push {r0-r4, lr}
  11. imx7_ddr_setting
  12. imx7_clock_gating
  13. imx7_qos_setting
  14. /*
  15. * Check if we are in USB serial download mode and immediately return to ROM
  16. * Need to check USB CTRL clock firstly, then check the USBx_nASYNCLISTADDR
  17. */
  18. ldr r0, =0x30384680
  19. ldr r1, [r0]
  20. cmp r1, #0
  21. beq normal_boot
  22. ldr r0, =0x30B10158
  23. ldr r1, [r0]
  24. cmp r1, #0
  25. beq normal_boot
  26. pop {r0-r4, lr}
  27. bx lr
  28. normal_boot:
  29. /*
  30. * The following is to fill in those arguments for this ROM function
  31. * pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data)
  32. * This function is used to copy data from the storage media into DDR.
  33. * start - Initial (possibly partial) image load address on entry.
  34. * Final image load address on exit.
  35. * bytes - Initial (possibly partial) image size on entry.
  36. * Final image size on exit.
  37. * boot_data - Initial @ref ivt Boot Data load address.
  38. */
  39. adr r0, boot_data2
  40. adr r1, image_len2
  41. adr r2, boot_data2
  42. /*
  43. * check the _pu_irom_api_table for the address
  44. */
  45. before_calling_rom___pu_irom_hwcnfg_setup:
  46. ldr r3, =ROM_VERSION_OFFSET
  47. ldr r4, [r3]
  48. ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
  49. ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET]
  50. blx r4
  51. after_calling_rom___pu_irom_hwcnfg_setup:
  52. /* To return to ROM from plugin, we need to fill in these argument.
  53. * Here is what need to do:
  54. * Need to construct the paramters for this function before return to ROM:
  55. * plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset)
  56. */
  57. pop {r0-r4, lr}
  58. push {r5}
  59. ldr r5, boot_data2
  60. str r5, [r0]
  61. ldr r5, image_len2
  62. str r5, [r1]
  63. ldr r5, second_ivt_offset
  64. str r5, [r2]
  65. mov r0, #1
  66. pop {r5}
  67. /* return back to ROM code */
  68. bx lr
  69. /* make the following data right in the end of the output*/
  70. .ltorg
  71. #define FLASH_OFFSET 0x400
  72. /*
  73. * second_ivt_offset is the offset from the "second_ivt_header" to
  74. * "image_copy_start", which involves FLASH_OFFSET, plus the first
  75. * ivt_header, the plugin code size itself recorded by "ivt2_header"
  76. */
  77. second_ivt_offset: .long (ivt2_header + 0x2C + FLASH_OFFSET)
  78. /*
  79. * The following is the second IVT header plus the second boot data
  80. */
  81. ivt2_header: .long 0x0
  82. app2_code_jump_v: .long 0x0
  83. reserv3: .long 0x0
  84. dcd2_ptr: .long 0x0
  85. boot_data2_ptr: .long 0x0
  86. self_ptr2: .long 0x0
  87. app_code_csf2: .long 0x0
  88. reserv4: .long 0x0
  89. boot_data2: .long 0x0
  90. image_len2: .long 0x0
  91. plugin2: .long 0x0