phy.h 16 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Andy Fleming <afleming@gmail.com>
  5. *
  6. * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
  7. */
  8. #ifndef _PHY_H
  9. #define _PHY_H
  10. #include <log.h>
  11. #include <phy_interface.h>
  12. #include <dm/ofnode.h>
  13. #include <dm/read.h>
  14. #include <linux/errno.h>
  15. #include <linux/list.h>
  16. #include <linux/mii.h>
  17. #include <linux/ethtool.h>
  18. #include <linux/mdio.h>
  19. struct udevice;
  20. #define PHY_FIXED_ID 0xa5a55a5a
  21. #define PHY_NCSI_ID 0xbeefcafe
  22. /*
  23. * There is no actual id for this.
  24. * This is just a dummy id for gmii2rgmmi converter.
  25. */
  26. #define PHY_GMII2RGMII_ID 0x5a5a5a5a
  27. #define PHY_MAX_ADDR 32
  28. #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
  29. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  30. SUPPORTED_TP | \
  31. SUPPORTED_MII)
  32. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  33. SUPPORTED_10baseT_Full)
  34. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  35. SUPPORTED_100baseT_Full)
  36. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  37. SUPPORTED_1000baseT_Full)
  38. #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
  39. PHY_100BT_FEATURES | \
  40. PHY_DEFAULT_FEATURES)
  41. #define PHY_100BT1_FEATURES (SUPPORTED_TP | \
  42. SUPPORTED_MII | \
  43. SUPPORTED_100baseT_Full)
  44. #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
  45. PHY_1000BT_FEATURES)
  46. #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
  47. SUPPORTED_10000baseT_Full)
  48. #ifndef PHY_ANEG_TIMEOUT
  49. #define PHY_ANEG_TIMEOUT 4000
  50. #endif
  51. struct phy_device;
  52. #define MDIO_NAME_LEN 32
  53. struct mii_dev {
  54. struct list_head link;
  55. char name[MDIO_NAME_LEN];
  56. void *priv;
  57. int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
  58. int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
  59. u16 val);
  60. int (*reset)(struct mii_dev *bus);
  61. struct phy_device *phymap[PHY_MAX_ADDR];
  62. u32 phy_mask;
  63. };
  64. /* struct phy_driver: a structure which defines PHY behavior
  65. *
  66. * uid will contain a number which represents the PHY. During
  67. * startup, the driver will poll the PHY to find out what its
  68. * UID--as defined by registers 2 and 3--is. The 32-bit result
  69. * gotten from the PHY will be masked to
  70. * discard any bits which may change based on revision numbers
  71. * unimportant to functionality
  72. *
  73. */
  74. struct phy_driver {
  75. char *name;
  76. unsigned int uid;
  77. unsigned int mask;
  78. unsigned int mmds;
  79. u32 features;
  80. /* Called to do any driver startup necessities */
  81. /* Will be called during phy_connect */
  82. int (*probe)(struct phy_device *phydev);
  83. /* Called to configure the PHY, and modify the controller
  84. * based on the results. Should be called after phy_connect */
  85. int (*config)(struct phy_device *phydev);
  86. /* Called when starting up the controller */
  87. int (*startup)(struct phy_device *phydev);
  88. /* Called when bringing down the controller */
  89. int (*shutdown)(struct phy_device *phydev);
  90. int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
  91. int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
  92. u16 val);
  93. /* Phy specific driver override for reading a MMD register */
  94. int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
  95. /* Phy specific driver override for writing a MMD register */
  96. int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
  97. u16 val);
  98. struct list_head list;
  99. /* driver private data */
  100. ulong data;
  101. };
  102. struct phy_device {
  103. /* Information about the PHY type */
  104. /* And management functions */
  105. struct mii_dev *bus;
  106. struct phy_driver *drv;
  107. void *priv;
  108. #ifdef CONFIG_DM_ETH
  109. struct udevice *dev;
  110. ofnode node;
  111. #else
  112. struct eth_device *dev;
  113. #endif
  114. /* forced speed & duplex (no autoneg)
  115. * partner speed & duplex & pause (autoneg)
  116. */
  117. int speed;
  118. int duplex;
  119. /* The most recently read link state */
  120. int link;
  121. int port;
  122. phy_interface_t interface;
  123. u32 advertising;
  124. u32 supported;
  125. u32 mmds;
  126. int autoneg;
  127. int addr;
  128. int pause;
  129. int asym_pause;
  130. u32 phy_id;
  131. bool is_c45;
  132. u32 flags;
  133. };
  134. struct fixed_link {
  135. int phy_id;
  136. int duplex;
  137. int link_speed;
  138. int pause;
  139. int asym_pause;
  140. };
  141. /**
  142. * phy_read - Convenience function for reading a given PHY register
  143. * @phydev: the phy_device struct
  144. * @devad: The MMD to read from
  145. * @regnum: register number to read
  146. * @return: value for success or negative errno for failure
  147. */
  148. static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
  149. {
  150. struct mii_dev *bus = phydev->bus;
  151. if (!bus || !bus->read) {
  152. debug("%s: No bus configured\n", __func__);
  153. return -1;
  154. }
  155. return bus->read(bus, phydev->addr, devad, regnum);
  156. }
  157. /**
  158. * phy_write - Convenience function for writing a given PHY register
  159. * @phydev: the phy_device struct
  160. * @devad: The MMD to read from
  161. * @regnum: register number to write
  162. * @val: value to write to @regnum
  163. * @return: 0 for success or negative errno for failure
  164. */
  165. static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
  166. u16 val)
  167. {
  168. struct mii_dev *bus = phydev->bus;
  169. if (!bus || !bus->write) {
  170. debug("%s: No bus configured\n", __func__);
  171. return -1;
  172. }
  173. return bus->write(bus, phydev->addr, devad, regnum, val);
  174. }
  175. /**
  176. * phy_mmd_start_indirect - Convenience function for writing MMD registers
  177. * @phydev: the phy_device struct
  178. * @devad: The MMD to read from
  179. * @regnum: register number to write
  180. * @return: None
  181. */
  182. static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
  183. int regnum)
  184. {
  185. /* Write the desired MMD Devad */
  186. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
  187. /* Write the desired MMD register address */
  188. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
  189. /* Select the Function : DATA with no post increment */
  190. phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
  191. (devad | MII_MMD_CTRL_NOINCR));
  192. }
  193. /**
  194. * phy_read_mmd - Convenience function for reading a register
  195. * from an MMD on a given PHY.
  196. * @phydev: The phy_device struct
  197. * @devad: The MMD to read from
  198. * @regnum: The register on the MMD to read
  199. * @return: Value for success or negative errno for failure
  200. */
  201. static inline int phy_read_mmd(struct phy_device *phydev, int devad,
  202. int regnum)
  203. {
  204. struct phy_driver *drv = phydev->drv;
  205. if (regnum > (u16)~0 || devad > 32)
  206. return -EINVAL;
  207. /* driver-specific access */
  208. if (drv->read_mmd)
  209. return drv->read_mmd(phydev, devad, regnum);
  210. /* direct C45 / C22 access */
  211. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  212. devad == MDIO_DEVAD_NONE || !devad)
  213. return phy_read(phydev, devad, regnum);
  214. /* indirect C22 access */
  215. phy_mmd_start_indirect(phydev, devad, regnum);
  216. /* Read the content of the MMD's selected register */
  217. return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
  218. }
  219. /**
  220. * phy_write_mmd - Convenience function for writing a register
  221. * on an MMD on a given PHY.
  222. * @phydev: The phy_device struct
  223. * @devad: The MMD to read from
  224. * @regnum: The register on the MMD to read
  225. * @val: value to write to @regnum
  226. * @return: 0 for success or negative errno for failure
  227. */
  228. static inline int phy_write_mmd(struct phy_device *phydev, int devad,
  229. int regnum, u16 val)
  230. {
  231. struct phy_driver *drv = phydev->drv;
  232. if (regnum > (u16)~0 || devad > 32)
  233. return -EINVAL;
  234. /* driver-specific access */
  235. if (drv->write_mmd)
  236. return drv->write_mmd(phydev, devad, regnum, val);
  237. /* direct C45 / C22 access */
  238. if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
  239. devad == MDIO_DEVAD_NONE || !devad)
  240. return phy_write(phydev, devad, regnum, val);
  241. /* indirect C22 access */
  242. phy_mmd_start_indirect(phydev, devad, regnum);
  243. /* Write the data into MMD's selected register */
  244. return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
  245. }
  246. /**
  247. * phy_set_bits_mmd - Convenience function for setting bits in a register
  248. * on MMD
  249. * @phydev: the phy_device struct
  250. * @devad: the MMD containing register to modify
  251. * @regnum: register number to modify
  252. * @val: bits to set
  253. * @return: 0 for success or negative errno for failure
  254. */
  255. static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
  256. u32 regnum, u16 val)
  257. {
  258. int value, ret;
  259. value = phy_read_mmd(phydev, devad, regnum);
  260. if (value < 0)
  261. return value;
  262. value |= val;
  263. ret = phy_write_mmd(phydev, devad, regnum, value);
  264. if (ret < 0)
  265. return ret;
  266. return 0;
  267. }
  268. /**
  269. * phy_clear_bits_mmd - Convenience function for clearing bits in a register
  270. * on MMD
  271. * @phydev: the phy_device struct
  272. * @devad: the MMD containing register to modify
  273. * @regnum: register number to modify
  274. * @val: bits to clear
  275. * @return: 0 for success or negative errno for failure
  276. */
  277. static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
  278. u32 regnum, u16 val)
  279. {
  280. int value, ret;
  281. value = phy_read_mmd(phydev, devad, regnum);
  282. if (value < 0)
  283. return value;
  284. value &= ~val;
  285. ret = phy_write_mmd(phydev, devad, regnum, value);
  286. if (ret < 0)
  287. return ret;
  288. return 0;
  289. }
  290. #ifdef CONFIG_PHYLIB_10G
  291. extern struct phy_driver gen10g_driver;
  292. /*
  293. * List all 10G interfaces here, the assumption being that PHYs on these
  294. * interfaces are C45
  295. */
  296. static inline int is_10g_interface(phy_interface_t interface)
  297. {
  298. return interface == PHY_INTERFACE_MODE_XGMII ||
  299. interface == PHY_INTERFACE_MODE_USXGMII ||
  300. interface == PHY_INTERFACE_MODE_XFI;
  301. }
  302. #endif
  303. /**
  304. * phy_init() - Initializes the PHY drivers
  305. * This function registers all available PHY drivers
  306. *
  307. * @return: 0 if OK, -ve on error
  308. */
  309. int phy_init(void);
  310. /**
  311. * phy_reset() - Resets the specified PHY
  312. * Issues a reset of the PHY and waits for it to complete
  313. *
  314. * @phydev: PHY to reset
  315. * @return: 0 if OK, -ve on error
  316. */
  317. int phy_reset(struct phy_device *phydev);
  318. /**
  319. * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
  320. * The function checks the PHY addresses flagged in phy_mask and returns a
  321. * phy_device pointer if it detects a PHY.
  322. * This function should only be called if just one PHY is expected to be present
  323. * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
  324. * it is undefined which of these PHYs is returned.
  325. *
  326. * @bus: MII/MDIO bus to scan
  327. * @phy_mask: bitmap of PYH addresses to scan
  328. * @interface: type of MAC-PHY interface
  329. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  330. */
  331. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  332. phy_interface_t interface);
  333. #ifdef CONFIG_PHY_FIXED
  334. /**
  335. * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
  336. * @node: OF node for the container of the fixed-link node
  337. *
  338. * Description: Creates a struct phy_device based on a fixed-link of_node
  339. * description. Can be used without phy_connect by drivers which do not expose
  340. * a UCLASS_ETH udevice.
  341. */
  342. struct phy_device *fixed_phy_create(ofnode node);
  343. #else
  344. static inline struct phy_device *fixed_phy_create(ofnode node)
  345. {
  346. return NULL;
  347. }
  348. #endif
  349. #ifdef CONFIG_DM_ETH
  350. /**
  351. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  352. * @phydev: PHY device
  353. * @dev: Ethernet device
  354. */
  355. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
  356. /**
  357. * phy_connect() - Creates a PHY device for the Ethernet interface
  358. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  359. * already, and associates it with the Ethernet device.
  360. * The function may be called with addr <= 0, in this case addr value is ignored
  361. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  362. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  363. * which PHY is returned.
  364. *
  365. * @bus: MII/MDIO bus that hosts the PHY
  366. * @addr: PHY address on MDIO bus
  367. * @dev: Ethernet device to associate to the PHY
  368. * @interface: type of MAC-PHY interface
  369. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  370. */
  371. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  372. struct udevice *dev,
  373. phy_interface_t interface);
  374. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  375. {
  376. if (ofnode_valid(phydev->node))
  377. return phydev->node;
  378. else
  379. return dev_ofnode(phydev->dev);
  380. }
  381. #else
  382. /**
  383. * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
  384. * @phydev: PHY device
  385. * @dev: Ethernet device
  386. */
  387. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
  388. /**
  389. * phy_connect() - Creates a PHY device for the Ethernet interface
  390. * Creates a PHY device for the PHY at the given address, if one doesn't exist
  391. * already, and associates it with the Ethernet device.
  392. * The function may be called with addr <= 0, in this case addr value is ignored
  393. * and the bus is scanned to detect a PHY. Scanning should only be used if only
  394. * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
  395. * which PHY is returned.
  396. *
  397. * @bus: MII/MDIO bus that hosts the PHY
  398. * @addr: PHY address on MDIO bus
  399. * @dev: Ethernet device to associate to the PHY
  400. * @interface: type of MAC-PHY interface
  401. * @return: pointer to phy_device if a PHY is found, or NULL otherwise
  402. */
  403. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  404. struct eth_device *dev,
  405. phy_interface_t interface);
  406. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  407. {
  408. return ofnode_null();
  409. }
  410. #endif
  411. int phy_startup(struct phy_device *phydev);
  412. int phy_config(struct phy_device *phydev);
  413. int phy_shutdown(struct phy_device *phydev);
  414. int phy_register(struct phy_driver *drv);
  415. int phy_set_supported(struct phy_device *phydev, u32 max_speed);
  416. int genphy_config_aneg(struct phy_device *phydev);
  417. int genphy_restart_aneg(struct phy_device *phydev);
  418. int genphy_update_link(struct phy_device *phydev);
  419. int genphy_parse_link(struct phy_device *phydev);
  420. int genphy_config(struct phy_device *phydev);
  421. int genphy_startup(struct phy_device *phydev);
  422. int genphy_shutdown(struct phy_device *phydev);
  423. int gen10g_config(struct phy_device *phydev);
  424. int gen10g_startup(struct phy_device *phydev);
  425. int gen10g_shutdown(struct phy_device *phydev);
  426. int gen10g_discover_mmds(struct phy_device *phydev);
  427. int phy_b53_init(void);
  428. int phy_mv88e61xx_init(void);
  429. int phy_aquantia_init(void);
  430. int phy_atheros_init(void);
  431. int phy_broadcom_init(void);
  432. int phy_cortina_init(void);
  433. int phy_cortina_access_init(void);
  434. int phy_davicom_init(void);
  435. int phy_et1011c_init(void);
  436. int phy_lxt_init(void);
  437. int phy_marvell_init(void);
  438. int phy_micrel_ksz8xxx_init(void);
  439. int phy_micrel_ksz90x1_init(void);
  440. int phy_meson_gxl_init(void);
  441. int phy_natsemi_init(void);
  442. int phy_nxp_tja11xx_init(void);
  443. int phy_realtek_init(void);
  444. int phy_smsc_init(void);
  445. int phy_teranetics_init(void);
  446. int phy_ti_init(void);
  447. int phy_vitesse_init(void);
  448. int phy_xilinx_init(void);
  449. int phy_mscc_init(void);
  450. int phy_fixed_init(void);
  451. int phy_ncsi_init(void);
  452. int phy_xilinx_gmii2rgmii_init(void);
  453. int board_phy_config(struct phy_device *phydev);
  454. int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
  455. /**
  456. * phy_get_interface_by_name() - Look up a PHY interface name
  457. *
  458. * @str: PHY interface name, e.g. "mii"
  459. * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
  460. */
  461. int phy_get_interface_by_name(const char *str);
  462. /**
  463. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  464. * is RGMII (all variants)
  465. * @phydev: the phy_device struct
  466. * @return: true if MII bus is RGMII or false if it is not
  467. */
  468. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  469. {
  470. return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
  471. phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
  472. }
  473. /**
  474. * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
  475. * is SGMII (all variants)
  476. * @phydev: the phy_device struct
  477. * @return: true if MII bus is SGMII or false if it is not
  478. */
  479. static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
  480. {
  481. return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
  482. phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
  483. }
  484. /* PHY UIDs for various PHYs that are referenced in external code */
  485. #define PHY_UID_CS4340 0x13e51002
  486. #define PHY_UID_CS4223 0x03e57003
  487. #define PHY_UID_TN2020 0x00a19410
  488. #define PHY_UID_IN112525_S03 0x02107440
  489. #endif