i2c.h 28 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
  4. * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
  5. * Changes for multibus/multiadapter I2C support.
  6. *
  7. * (C) Copyright 2001
  8. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  9. *
  10. * The original I2C interface was
  11. * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  12. * AIRVENT SAM s.p.a - RIMINI(ITALY)
  13. * but has been changed substantially.
  14. */
  15. #ifndef _I2C_H_
  16. #define _I2C_H_
  17. #include <linker_lists.h>
  18. /*
  19. * For now there are essentially two parts to this file - driver model
  20. * here at the top, and the older code below (with CONFIG_SYS_I2C_LEGACY being
  21. * most recent). The plan is to migrate everything to driver model.
  22. * The driver model structures and API are separate as they are different
  23. * enough as to be incompatible for compilation purposes.
  24. */
  25. enum dm_i2c_chip_flags {
  26. DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
  27. DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
  28. DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
  29. };
  30. /** enum i2c_speed_mode - standard I2C speed modes */
  31. enum i2c_speed_mode {
  32. IC_SPEED_MODE_STANDARD,
  33. IC_SPEED_MODE_FAST,
  34. IC_SPEED_MODE_FAST_PLUS,
  35. IC_SPEED_MODE_HIGH,
  36. IC_SPEED_MODE_FAST_ULTRA,
  37. IC_SPEED_MODE_COUNT,
  38. };
  39. /** enum i2c_speed_rate - standard I2C speeds in Hz */
  40. enum i2c_speed_rate {
  41. I2C_SPEED_STANDARD_RATE = 100000,
  42. I2C_SPEED_FAST_RATE = 400000,
  43. I2C_SPEED_FAST_PLUS_RATE = 1000000,
  44. I2C_SPEED_HIGH_RATE = 3400000,
  45. I2C_SPEED_FAST_ULTRA_RATE = 5000000,
  46. };
  47. /** enum i2c_address_mode - available address modes */
  48. enum i2c_address_mode {
  49. I2C_MODE_7_BIT,
  50. I2C_MODE_10_BIT
  51. };
  52. /** enum i2c_device_t - Types of I2C devices, used for compatible strings */
  53. enum i2c_device_t {
  54. I2C_DEVICE_GENERIC,
  55. I2C_DEVICE_HID_OVER_I2C,
  56. };
  57. struct udevice;
  58. /**
  59. * struct dm_i2c_chip - information about an i2c chip
  60. *
  61. * An I2C chip is a device on the I2C bus. It sits at a particular address
  62. * and normally supports 7-bit or 10-bit addressing.
  63. *
  64. * To obtain this structure, use dev_get_parent_plat(dev) where dev is
  65. * the chip to examine.
  66. *
  67. * @chip_addr: Chip address on bus
  68. * @offset_len: Length of offset in bytes. A single byte offset can
  69. * represent up to 256 bytes. A value larger than 1 may be
  70. * needed for larger devices.
  71. * @flags: Flags for this chip (dm_i2c_chip_flags)
  72. * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
  73. * devices which steal addresses as part of offset.
  74. * If offset_len is zero, then the offset is encoded
  75. * completely within the chip address itself.
  76. * e.g. a devce with chip address of 0x2c with 512
  77. * registers might use the bottom bit of the address
  78. * to indicate which half of the address space is being
  79. * accessed while still only using 1 byte offset.
  80. * This means it will respond to chip address 0x2c and
  81. * 0x2d.
  82. * A real world example is the Atmel AT24C04. It's
  83. * datasheet explains it's usage of this addressing
  84. * mode.
  85. * @emul: Emulator for this chip address (only used for emulation)
  86. * @emul_idx: Emulator index, used for of-platdata and set by each i2c chip's
  87. * bind() method. This allows i2c_emul_find() to work with of-platdata.
  88. */
  89. struct dm_i2c_chip {
  90. uint chip_addr;
  91. uint offset_len;
  92. uint flags;
  93. uint chip_addr_offset_mask;
  94. #ifdef CONFIG_SANDBOX
  95. struct udevice *emul;
  96. bool test_mode;
  97. int emul_idx;
  98. #endif
  99. };
  100. /**
  101. * struct dm_i2c_bus- information about an i2c bus
  102. *
  103. * An I2C bus contains 0 or more chips on it, each at its own address. The
  104. * bus can operate at different speeds (measured in Hz, typically 100KHz
  105. * or 400KHz).
  106. *
  107. * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
  108. * I2C bus udevice.
  109. *
  110. * @speed_hz: Bus speed in hertz (typically 100000)
  111. * @max_transaction_bytes: Maximal size of single I2C transfer
  112. */
  113. struct dm_i2c_bus {
  114. int speed_hz;
  115. int max_transaction_bytes;
  116. };
  117. /*
  118. * Not all of these flags are implemented in the U-Boot API
  119. */
  120. enum dm_i2c_msg_flags {
  121. I2C_M_TEN = 0x0010, /* ten-bit chip address */
  122. I2C_M_RD = 0x0001, /* read data, from slave to master */
  123. I2C_M_STOP = 0x8000, /* send stop after this message */
  124. I2C_M_NOSTART = 0x4000, /* no start before this message */
  125. I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
  126. I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
  127. I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
  128. I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
  129. };
  130. /**
  131. * struct i2c_msg - an I2C message
  132. *
  133. * @addr: Slave address
  134. * @flags: Flags (see enum dm_i2c_msg_flags)
  135. * @len: Length of buffer in bytes, may be 0 for a probe
  136. * @buf: Buffer to send/receive, or NULL if no data
  137. */
  138. struct i2c_msg {
  139. uint addr;
  140. uint flags;
  141. uint len;
  142. u8 *buf;
  143. };
  144. /**
  145. * struct i2c_msg_list - a list of I2C messages
  146. *
  147. * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
  148. * appropriate in U-Boot.
  149. *
  150. * @msg: Pointer to i2c_msg array
  151. * @nmsgs: Number of elements in the array
  152. */
  153. struct i2c_msg_list {
  154. struct i2c_msg *msgs;
  155. uint nmsgs;
  156. };
  157. /**
  158. * dm_i2c_read() - read bytes from an I2C chip
  159. *
  160. * To obtain an I2C device (called a 'chip') given the I2C bus address you
  161. * can use i2c_get_chip(). To obtain a bus by bus number use
  162. * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  163. *
  164. * To set the address length of a devce use i2c_set_addr_len(). It
  165. * defaults to 1.
  166. *
  167. * @dev: Chip to read from
  168. * @offset: Offset within chip to start reading
  169. * @buffer: Place to put data
  170. * @len: Number of bytes to read
  171. *
  172. * @return 0 on success, -ve on failure
  173. */
  174. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  175. /**
  176. * dm_i2c_write() - write bytes to an I2C chip
  177. *
  178. * See notes for dm_i2c_read() above.
  179. *
  180. * @dev: Chip to write to
  181. * @offset: Offset within chip to start writing
  182. * @buffer: Buffer containing data to write
  183. * @len: Number of bytes to write
  184. *
  185. * @return 0 on success, -ve on failure
  186. */
  187. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  188. int len);
  189. /**
  190. * dm_i2c_probe() - probe a particular chip address
  191. *
  192. * This can be useful to check for the existence of a chip on the bus.
  193. * It is typically implemented by writing the chip address to the bus
  194. * and checking that the chip replies with an ACK.
  195. *
  196. * @bus: Bus to probe
  197. * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
  198. * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
  199. * @devp: Returns the device found, or NULL if none
  200. * @return 0 if a chip was found at that address, -ve if not
  201. */
  202. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  203. struct udevice **devp);
  204. /**
  205. * dm_i2c_reg_read() - Read a value from an I2C register
  206. *
  207. * This reads a single value from the given address in an I2C chip
  208. *
  209. * @dev: Device to use for transfer
  210. * @addr: Address to read from
  211. * @return value read, or -ve on error
  212. */
  213. int dm_i2c_reg_read(struct udevice *dev, uint offset);
  214. /**
  215. * dm_i2c_reg_write() - Write a value to an I2C register
  216. *
  217. * This writes a single value to the given address in an I2C chip
  218. *
  219. * @dev: Device to use for transfer
  220. * @addr: Address to write to
  221. * @val: Value to write (normally a byte)
  222. * @return 0 on success, -ve on error
  223. */
  224. int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
  225. /**
  226. * dm_i2c_xfer() - Transfer messages over I2C
  227. *
  228. * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
  229. * instead.
  230. *
  231. * @dev: Device to use for transfer
  232. * @msg: List of messages to transfer
  233. * @nmsgs: Number of messages to transfer
  234. * @return 0 on success, -ve on error
  235. */
  236. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
  237. /**
  238. * dm_i2c_set_bus_speed() - set the speed of a bus
  239. *
  240. * @bus: Bus to adjust
  241. * @speed: Requested speed in Hz
  242. * @return 0 if OK, -EINVAL for invalid values
  243. */
  244. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
  245. /**
  246. * dm_i2c_get_bus_speed() - get the speed of a bus
  247. *
  248. * @bus: Bus to check
  249. * @return speed of selected I2C bus in Hz, -ve on error
  250. */
  251. int dm_i2c_get_bus_speed(struct udevice *bus);
  252. /**
  253. * i2c_set_chip_flags() - set flags for a chip
  254. *
  255. * Typically addresses are 7 bits, but for 10-bit addresses you should set
  256. * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
  257. *
  258. * @dev: Chip to adjust
  259. * @flags: New flags
  260. * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
  261. */
  262. int i2c_set_chip_flags(struct udevice *dev, uint flags);
  263. /**
  264. * i2c_get_chip_flags() - get flags for a chip
  265. *
  266. * @dev: Chip to check
  267. * @flagsp: Place to put flags
  268. * @return 0 if OK, other -ve value on error
  269. */
  270. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
  271. /**
  272. * i2c_set_offset_len() - set the offset length for a chip
  273. *
  274. * The offset used to access a chip may be up to 4 bytes long. Typically it
  275. * is only 1 byte, which is enough for chips with 256 bytes of memory or
  276. * registers. The default value is 1, but you can call this function to
  277. * change it.
  278. *
  279. * @offset_len: New offset length value (typically 1 or 2)
  280. */
  281. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
  282. /**
  283. * i2c_get_offset_len() - get the offset length for a chip
  284. *
  285. * @return: Current offset length value (typically 1 or 2)
  286. */
  287. int i2c_get_chip_offset_len(struct udevice *dev);
  288. /**
  289. * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
  290. *
  291. * Some devices listen on multiple chip addresses to achieve larger offsets
  292. * than their single or multiple byte offsets would allow for. You can use this
  293. * function to set the bits that are valid to be used for offset overflow.
  294. *
  295. * @mask: The mask to be used for high offset bits within address
  296. * @return 0 if OK, other -ve value on error
  297. */
  298. int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
  299. /*
  300. * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
  301. *
  302. * @return current chip addr offset mask
  303. */
  304. uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
  305. /**
  306. * i2c_deblock() - recover a bus that is in an unknown state
  307. *
  308. * See the deblock() method in 'struct dm_i2c_ops' for full information
  309. *
  310. * @bus: Bus to recover
  311. * @return 0 if OK, -ve on error
  312. */
  313. int i2c_deblock(struct udevice *bus);
  314. /**
  315. * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
  316. *
  317. * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
  318. * for deblocking the I2C bus.
  319. *
  320. * @sda_pin: SDA GPIO
  321. * @scl_pin: SCL GPIO
  322. * @scl_count: Number of SCL clock cycles generated to deblock SDA
  323. * @start_count:Number of I2C start conditions sent after deblocking SDA
  324. * @delay: Delay between SCL clock line changes
  325. * @return 0 if OK, -ve on error
  326. */
  327. struct gpio_desc;
  328. int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
  329. unsigned int scl_count, unsigned int start_count,
  330. unsigned int delay);
  331. /**
  332. * struct dm_i2c_ops - driver operations for I2C uclass
  333. *
  334. * Drivers should support these operations unless otherwise noted. These
  335. * operations are intended to be used by uclass code, not directly from
  336. * other code.
  337. */
  338. struct dm_i2c_ops {
  339. /**
  340. * xfer() - transfer a list of I2C messages
  341. *
  342. * @bus: Bus to read from
  343. * @msg: List of messages to transfer
  344. * @nmsgs: Number of messages in the list
  345. * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
  346. * -ECOMM if the speed cannot be supported, -EPROTO if the chip
  347. * flags cannot be supported, other -ve value on some other error
  348. */
  349. int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
  350. /**
  351. * probe_chip() - probe for the presense of a chip address
  352. *
  353. * This function is optional. If omitted, the uclass will send a zero
  354. * length message instead.
  355. *
  356. * @bus: Bus to probe
  357. * @chip_addr: Chip address to probe
  358. * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
  359. * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
  360. * to default probem other -ve value on error
  361. */
  362. int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
  363. /**
  364. * set_bus_speed() - set the speed of a bus (optional)
  365. *
  366. * The bus speed value will be updated by the uclass if this function
  367. * does not return an error. This method is optional - if it is not
  368. * provided then the driver can read the speed from
  369. * dev_get_uclass_priv(bus)->speed_hz
  370. *
  371. * @bus: Bus to adjust
  372. * @speed: Requested speed in Hz
  373. * @return 0 if OK, -EINVAL for invalid values
  374. */
  375. int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
  376. /**
  377. * get_bus_speed() - get the speed of a bus (optional)
  378. *
  379. * Normally this can be provided by the uclass, but if you want your
  380. * driver to check the bus speed by looking at the hardware, you can
  381. * implement that here. This method is optional. This method would
  382. * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
  383. *
  384. * @bus: Bus to check
  385. * @return speed of selected I2C bus in Hz, -ve on error
  386. */
  387. int (*get_bus_speed)(struct udevice *bus);
  388. /**
  389. * set_flags() - set the flags for a chip (optional)
  390. *
  391. * This is generally implemented by the uclass, but drivers can
  392. * check the value to ensure that unsupported options are not used.
  393. * This method is optional. If provided, this method will always be
  394. * called when the flags change.
  395. *
  396. * @dev: Chip to adjust
  397. * @flags: New flags value
  398. * @return 0 if OK, -EINVAL if value is unsupported
  399. */
  400. int (*set_flags)(struct udevice *dev, uint flags);
  401. /**
  402. * deblock() - recover a bus that is in an unknown state
  403. *
  404. * I2C is a synchronous protocol and resets of the processor in the
  405. * middle of an access can block the I2C Bus until a powerdown of
  406. * the full unit is done. This is because slaves can be stuck
  407. * waiting for addition bus transitions for a transaction that will
  408. * never complete. Resetting the I2C master does not help. The only
  409. * way is to force the bus through a series of transitions to make
  410. * sure that all slaves are done with the transaction. This method
  411. * performs this 'deblocking' if support by the driver.
  412. *
  413. * This method is optional.
  414. */
  415. int (*deblock)(struct udevice *bus);
  416. };
  417. #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
  418. /**
  419. * struct i2c_mux_ops - operations for an I2C mux
  420. *
  421. * The current mux state is expected to be stored in the mux itself since
  422. * it is the only thing that knows how to make things work. The mux can
  423. * record the current state and then avoid switching unless it is necessary.
  424. * So select() can be skipped if the mux is already in the correct state.
  425. * Also deselect() can be made a nop if required.
  426. */
  427. struct i2c_mux_ops {
  428. /**
  429. * select() - select one of of I2C buses attached to a mux
  430. *
  431. * This will be called when there is no bus currently selected by the
  432. * mux. This method does not need to deselect the old bus since
  433. * deselect() will be already have been called if necessary.
  434. *
  435. * @mux: Mux device
  436. * @bus: I2C bus to select
  437. * @channel: Channel number correponding to the bus to select
  438. * @return 0 if OK, -ve on error
  439. */
  440. int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
  441. /**
  442. * deselect() - select one of of I2C buses attached to a mux
  443. *
  444. * This is used to deselect the currently selected I2C bus.
  445. *
  446. * @mux: Mux device
  447. * @bus: I2C bus to deselect
  448. * @channel: Channel number correponding to the bus to deselect
  449. * @return 0 if OK, -ve on error
  450. */
  451. int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
  452. };
  453. #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
  454. /**
  455. * i2c_get_chip() - get a device to use to access a chip on a bus
  456. *
  457. * This returns the device for the given chip address. The device can then
  458. * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
  459. *
  460. * @bus: Bus to examine
  461. * @chip_addr: Chip address for the new device
  462. * @offset_len: Length of a register offset in bytes (normally 1)
  463. * @devp: Returns pointer to new device if found or -ENODEV if not
  464. * found
  465. */
  466. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  467. struct udevice **devp);
  468. /**
  469. * i2c_get_chip_for_busnum() - get a device to use to access a chip on
  470. * a bus number
  471. *
  472. * This returns the device for the given chip address on a particular bus
  473. * number.
  474. *
  475. * @busnum: Bus number to examine
  476. * @chip_addr: Chip address for the new device
  477. * @offset_len: Length of a register offset in bytes (normally 1)
  478. * @devp: Returns pointer to new device if found or -ENODEV if not
  479. * found
  480. */
  481. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  482. struct udevice **devp);
  483. /**
  484. * i2c_chip_of_to_plat() - Decode standard I2C platform data
  485. *
  486. * This decodes the chip address from a device tree node and puts it into
  487. * its dm_i2c_chip structure. This should be called in your driver's
  488. * of_to_plat() method.
  489. *
  490. * @blob: Device tree blob
  491. * @node: Node offset to read from
  492. * @spi: Place to put the decoded information
  493. */
  494. int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip);
  495. /**
  496. * i2c_dump_msgs() - Dump a list of I2C messages
  497. *
  498. * This may be useful for debugging.
  499. *
  500. * @msg: Message list to dump
  501. * @nmsgs: Number of messages
  502. */
  503. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
  504. /**
  505. * i2c_emul_find() - Find an emulator for an i2c sandbox device
  506. *
  507. * This looks at the device's 'emul' phandle
  508. *
  509. * @dev: Device to find an emulator for
  510. * @emulp: Returns the associated emulator, if found *
  511. * @return 0 if OK, -ENOENT or -ENODEV if not found
  512. */
  513. int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
  514. /**
  515. * i2c_emul_set_idx() - Set the emulator index for an i2c sandbox device
  516. *
  517. * With of-platdata we cannot find the emulator using the device tree, so rely
  518. * on the bind() method of each i2c driver calling this function to tell us
  519. * the of-platdata idx of the emulator
  520. *
  521. * @dev: i2c device to set the emulator for
  522. * @emul_idx: of-platdata index for that emulator
  523. */
  524. void i2c_emul_set_idx(struct udevice *dev, int emul_idx);
  525. /**
  526. * i2c_emul_get_device() - Find the device being emulated
  527. *
  528. * Given an emulator this returns the associated device
  529. *
  530. * @emul: Emulator for the device
  531. * @return device that @emul is emulating
  532. */
  533. struct udevice *i2c_emul_get_device(struct udevice *emul);
  534. /* ACPI operations for generic I2C devices */
  535. extern struct acpi_ops i2c_acpi_ops;
  536. /**
  537. * acpi_i2c_of_to_plat() - Read properties intended for ACPI
  538. *
  539. * This reads the generic I2C properties from the device tree, so that these
  540. * can be used to create ACPI information for the device.
  541. *
  542. * See the i2c/generic-acpi.txt binding file for information about the
  543. * properties.
  544. *
  545. * @dev: I2C device to process
  546. * @return 0 if OK, -EINVAL if acpi,hid is not present
  547. */
  548. int acpi_i2c_of_to_plat(struct udevice *dev);
  549. #if !CONFIG_IS_ENABLED(DM_I2C)
  550. /*
  551. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  552. *
  553. * The implementation MUST NOT use static or global variables if the
  554. * I2C routines are used to read SDRAM configuration information
  555. * because this is done before the memories are initialized. Limited
  556. * use of stack-based variables are OK (the initial stack size is
  557. * limited).
  558. *
  559. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  560. */
  561. /*
  562. * Configuration items.
  563. */
  564. #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
  565. #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
  566. /* no muxes used bus = i2c adapters */
  567. #define CONFIG_SYS_I2C_DIRECT_BUS 1
  568. #define CONFIG_SYS_I2C_MAX_HOPS 0
  569. #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
  570. #else
  571. /* we use i2c muxes */
  572. #undef CONFIG_SYS_I2C_DIRECT_BUS
  573. #endif
  574. /* define the I2C bus number for RTC and DTT if not already done */
  575. #if !defined(CONFIG_SYS_RTC_BUS_NUM)
  576. #define CONFIG_SYS_RTC_BUS_NUM 0
  577. #endif
  578. #if !defined(CONFIG_SYS_SPD_BUS_NUM)
  579. #define CONFIG_SYS_SPD_BUS_NUM 0
  580. #endif
  581. struct i2c_adapter {
  582. void (*init)(struct i2c_adapter *adap, int speed,
  583. int slaveaddr);
  584. int (*probe)(struct i2c_adapter *adap, uint8_t chip);
  585. int (*read)(struct i2c_adapter *adap, uint8_t chip,
  586. uint addr, int alen, uint8_t *buffer,
  587. int len);
  588. int (*write)(struct i2c_adapter *adap, uint8_t chip,
  589. uint addr, int alen, uint8_t *buffer,
  590. int len);
  591. uint (*set_bus_speed)(struct i2c_adapter *adap,
  592. uint speed);
  593. int speed;
  594. int waitdelay;
  595. int slaveaddr;
  596. int init_done;
  597. int hwadapnr;
  598. char *name;
  599. };
  600. #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  601. _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
  602. { \
  603. .init = _init, \
  604. .probe = _probe, \
  605. .read = _read, \
  606. .write = _write, \
  607. .set_bus_speed = _set_speed, \
  608. .speed = _speed, \
  609. .slaveaddr = _slaveaddr, \
  610. .init_done = 0, \
  611. .hwadapnr = _hwadapnr, \
  612. .name = #_name \
  613. };
  614. #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
  615. _set_speed, _speed, _slaveaddr, _hwadapnr) \
  616. ll_entry_declare(struct i2c_adapter, _name, i2c) = \
  617. U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  618. _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
  619. struct i2c_adapter *i2c_get_adapter(int index);
  620. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  621. struct i2c_mux {
  622. int id;
  623. char name[16];
  624. };
  625. struct i2c_next_hop {
  626. struct i2c_mux mux;
  627. uint8_t chip;
  628. uint8_t channel;
  629. };
  630. struct i2c_bus_hose {
  631. int adapter;
  632. struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
  633. };
  634. #define I2C_NULL_HOP {{-1, ""}, 0, 0}
  635. extern struct i2c_bus_hose i2c_bus[];
  636. #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
  637. #else
  638. #define I2C_ADAPTER(bus) bus
  639. #endif
  640. #define I2C_BUS gd->cur_i2c_bus
  641. #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
  642. #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
  643. #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
  644. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  645. #define I2C_MUX_PCA9540_ID 1
  646. #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
  647. #define I2C_MUX_PCA9542_ID 2
  648. #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
  649. #define I2C_MUX_PCA9544_ID 3
  650. #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
  651. #define I2C_MUX_PCA9547_ID 4
  652. #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
  653. #define I2C_MUX_PCA9548_ID 5
  654. #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
  655. #endif
  656. #ifndef I2C_SOFT_DECLARATIONS
  657. # if (defined(CONFIG_AT91RM9200) || \
  658. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  659. defined(CONFIG_AT91SAM9263))
  660. # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
  661. # else
  662. # define I2C_SOFT_DECLARATIONS
  663. # endif
  664. #endif
  665. /*
  666. * Many boards/controllers/drivers don't support an I2C slave interface so
  667. * provide a default slave address for them for use in common code. A real
  668. * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
  669. * support a slave interface.
  670. */
  671. #ifndef CONFIG_SYS_I2C_SLAVE
  672. #define CONFIG_SYS_I2C_SLAVE 0xfe
  673. #endif
  674. /*
  675. * Initialization, must be called once on start up, may be called
  676. * repeatedly to change the speed and slave addresses.
  677. */
  678. #ifdef CONFIG_SYS_I2C_EARLY_INIT
  679. void i2c_early_init_f(void);
  680. #endif
  681. void i2c_init(int speed, int slaveaddr);
  682. void i2c_init_board(void);
  683. #ifdef CONFIG_SYS_I2C_LEGACY
  684. /*
  685. * i2c_get_bus_num:
  686. *
  687. * Returns index of currently active I2C bus. Zero-based.
  688. */
  689. unsigned int i2c_get_bus_num(void);
  690. /*
  691. * i2c_set_bus_num:
  692. *
  693. * Change the active I2C bus. Subsequent read/write calls will
  694. * go to this one.
  695. *
  696. * bus - bus index, zero based
  697. *
  698. * Returns: 0 on success, not 0 on failure
  699. *
  700. */
  701. int i2c_set_bus_num(unsigned int bus);
  702. /*
  703. * i2c_init_all():
  704. *
  705. * Initializes all I2C adapters in the system. All i2c_adap structures must
  706. * be initialized beforehead with function pointers and data, including
  707. * speed and slaveaddr. Returns 0 on success, non-0 on failure.
  708. */
  709. void i2c_init_all(void);
  710. /*
  711. * Probe the given I2C chip address. Returns 0 if a chip responded,
  712. * not 0 on failure.
  713. */
  714. int i2c_probe(uint8_t chip);
  715. /*
  716. * Read/Write interface:
  717. * chip: I2C chip address, range 0..127
  718. * addr: Memory (register) address within the chip
  719. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  720. * memories, 0 for register type devices with only one
  721. * register)
  722. * buffer: Where to read/write the data
  723. * len: How many bytes to read/write
  724. *
  725. * Returns: 0 on success, not 0 on failure
  726. */
  727. int i2c_read(uint8_t chip, unsigned int addr, int alen,
  728. uint8_t *buffer, int len);
  729. int i2c_write(uint8_t chip, unsigned int addr, int alen,
  730. uint8_t *buffer, int len);
  731. /*
  732. * Utility routines to read/write registers.
  733. */
  734. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  735. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  736. /*
  737. * i2c_set_bus_speed:
  738. *
  739. * Change the speed of the active I2C bus
  740. *
  741. * speed - bus speed in Hz
  742. *
  743. * Returns: new bus speed
  744. *
  745. */
  746. unsigned int i2c_set_bus_speed(unsigned int speed);
  747. /*
  748. * i2c_get_bus_speed:
  749. *
  750. * Returns speed of currently active I2C bus in Hz
  751. */
  752. unsigned int i2c_get_bus_speed(void);
  753. #else
  754. /*
  755. * Probe the given I2C chip address. Returns 0 if a chip responded,
  756. * not 0 on failure.
  757. */
  758. int i2c_probe(uchar chip);
  759. /*
  760. * Read/Write interface:
  761. * chip: I2C chip address, range 0..127
  762. * addr: Memory (register) address within the chip
  763. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  764. * memories, 0 for register type devices with only one
  765. * register)
  766. * buffer: Where to read/write the data
  767. * len: How many bytes to read/write
  768. *
  769. * Returns: 0 on success, not 0 on failure
  770. */
  771. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  772. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  773. /*
  774. * Utility routines to read/write registers.
  775. */
  776. static inline u8 i2c_reg_read(u8 addr, u8 reg)
  777. {
  778. u8 buf;
  779. #ifdef DEBUG
  780. printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
  781. #endif
  782. i2c_read(addr, reg, 1, &buf, 1);
  783. return buf;
  784. }
  785. static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
  786. {
  787. #ifdef DEBUG
  788. printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
  789. __func__, addr, reg, val);
  790. #endif
  791. i2c_write(addr, reg, 1, &val, 1);
  792. }
  793. /*
  794. * Functions for setting the current I2C bus and its speed
  795. */
  796. /*
  797. * i2c_set_bus_num:
  798. *
  799. * Change the active I2C bus. Subsequent read/write calls will
  800. * go to this one.
  801. *
  802. * bus - bus index, zero based
  803. *
  804. * Returns: 0 on success, not 0 on failure
  805. *
  806. */
  807. int i2c_set_bus_num(unsigned int bus);
  808. /*
  809. * i2c_get_bus_num:
  810. *
  811. * Returns index of currently active I2C bus. Zero-based.
  812. */
  813. unsigned int i2c_get_bus_num(void);
  814. /*
  815. * i2c_set_bus_speed:
  816. *
  817. * Change the speed of the active I2C bus
  818. *
  819. * speed - bus speed in Hz
  820. *
  821. * Returns: 0 on success, not 0 on failure
  822. *
  823. */
  824. int i2c_set_bus_speed(unsigned int);
  825. /*
  826. * i2c_get_bus_speed:
  827. *
  828. * Returns speed of currently active I2C bus in Hz
  829. */
  830. unsigned int i2c_get_bus_speed(void);
  831. #endif /* CONFIG_SYS_I2C_LEGACY */
  832. /*
  833. * only for backwardcompatibility, should go away if we switched
  834. * completely to new multibus support.
  835. */
  836. #if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
  837. # if !defined(CONFIG_SYS_MAX_I2C_BUS)
  838. # define CONFIG_SYS_MAX_I2C_BUS 2
  839. # endif
  840. # define I2C_MULTI_BUS 1
  841. #else
  842. # define CONFIG_SYS_MAX_I2C_BUS 1
  843. # define I2C_MULTI_BUS 0
  844. #endif
  845. /* NOTE: These two functions MUST be always_inline to avoid code growth! */
  846. static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
  847. static inline unsigned int I2C_GET_BUS(void)
  848. {
  849. return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
  850. }
  851. static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
  852. static inline void I2C_SET_BUS(unsigned int bus)
  853. {
  854. if (I2C_MULTI_BUS)
  855. i2c_set_bus_num(bus);
  856. }
  857. /* Multi I2C definitions */
  858. enum {
  859. I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
  860. I2C_8, I2C_9, I2C_10,
  861. };
  862. /**
  863. * Get FDT values for i2c bus.
  864. *
  865. * @param blob Device tree blbo
  866. * @return the number of I2C bus
  867. */
  868. void board_i2c_init(const void *blob);
  869. /**
  870. * Find the I2C bus number by given a FDT I2C node.
  871. *
  872. * @param blob Device tree blbo
  873. * @param node FDT I2C node to find
  874. * @return the number of I2C bus (zero based), or -1 on error
  875. */
  876. int i2c_get_bus_num_fdt(int node);
  877. /**
  878. * Reset the I2C bus represented by the given a FDT I2C node.
  879. *
  880. * @param blob Device tree blbo
  881. * @param node FDT I2C node to find
  882. * @return 0 if port was reset, -1 if not found
  883. */
  884. int i2c_reset_port_fdt(const void *blob, int node);
  885. #endif /* !CONFIG_DM_I2C */
  886. #endif /* _I2C_H_ */