README 2.9 KB

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  1. Work_92105 from Work Microwave is an LPC3250- based board with the
  2. following features:
  3. - 64MB SDR DRAM
  4. - 1 GB SLC NAND, managed through MLC controller.
  5. - Ethernet
  6. - Ethernet + PHY SMSC8710
  7. - I2C:
  8. - EEPROM (24M01-compatible)
  9. - RTC (DS1374-compatible)
  10. - Temperature sensor (DS620)
  11. - DACs (2 x MAX518)
  12. - SPI (through SSP interface)
  13. - Port expander MAX6957
  14. - LCD display (HD44780-compatible), controlled
  15. through the port expander and DACs
  16. Standard SPL and U-Boot binaries
  17. --------------------------------
  18. The default 'make' (or the 'make all') command will produce the
  19. following files:
  20. 1. spl/u-boot-spl.bin SPL, intended to run from SRAM at address 0.
  21. This file can be loaded in SRAM through a JTAG
  22. debugger or through the LPC32XX Service Boot
  23. mechanism.
  24. 2. u-boot.bin The raw U-Boot image, which can be loaded in
  25. DDR through a JTAG debugger (for instance by
  26. breaking SPL after DDR init), or by a running
  27. U-Boot through e.g. 'loady' or 'tftp' and then
  28. executed with 'go'.
  29. 3. u-boot.img A U-Boot image with a mkimage header prepended.
  30. SPL assumes (even when loaded through JTAG or
  31. Service Boot) that such an image will be found
  32. at offset 0x00040000 in NAND.
  33. NAND cold-boot binaries
  34. -----------------------
  35. The board can boot entirely from power-on with only SPL and U-Boot in
  36. NAND. The LPC32XX-specific 'make lpc32xx-full.bin' command will produce
  37. (in addition to spl/u-boot-spl.bin and u-boot.img if they were not made
  38. already) the following files:
  39. 4. lpc32xx-spl.img spl/u-boot-spl.bin, with a LPC32XX boot header
  40. prepended. This header is required for the ROM
  41. code to load SPL into SRAM and branch into it.
  42. The content of this file is expected to reside
  43. in NAND at addresses 0x00000000 and 0x00020000
  44. (two copies).
  45. 5. lpc32xx-boot-0.bin lpc32xx-spl.img, padded with 0xFF bytes to a
  46. size of 0x20000 bytes. This file covers exactly
  47. the reserved area for the first bootloader copy
  48. in NAND.
  49. 6. lpc32xx-boot-1.bin Same as lpc32xx-boot-0.bin. This is intended to
  50. be used as the second bootloader copy.
  51. 7. lpc32xx-full.bin lpc32xx-boot-0.bin, lpc32xx-boot-1.bin and
  52. u-boot.img concatenated. This file represents
  53. the content of whole bootloader as present in
  54. NAND at offset 00x00000000.
  55. Flashing instructions
  56. ---------------------
  57. The following assumes a working U-Boot on the target, with the ability
  58. to load files into DDR.
  59. To update the whole bootloader:
  60. nand erase 0x00000000 0x80000
  61. (load lpc32xx-full.bin at location $loadaddr)
  62. nand write $loadaddr 0x00000000 $filesize
  63. To update SPL only (note the double nand write) :
  64. nand erase 0x00000000 0x40000
  65. (load lpc32xx-spl.img or lpc32xx-boot-N.bin at location $loadaddr)
  66. nand write $loadaddr 0x00000000 $filesize
  67. nand write $loadaddr 0x00020000 $filesize
  68. To update U-Boot only:
  69. nand erase 0x00040000 0x40000
  70. (load u-boot.img at location $loadaddr)
  71. nand write $loadaddr 0x00040000 $filesize