taurus.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
  4. * (C) Copyright Siemens AG
  5. *
  6. * Based on:
  7. * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
  8. *
  9. * (C) Copyright 2007-2008
  10. * Stelian Pop <stelian@popies.net>
  11. * Lead Tech Design <www.leadtechdesign.com>
  12. */
  13. #include <command.h>
  14. #include <common.h>
  15. #include <dm.h>
  16. #include <env.h>
  17. #include <flash.h>
  18. #include <init.h>
  19. #include <asm/global_data.h>
  20. #include <asm/io.h>
  21. #include <asm/arch/at91sam9260_matrix.h>
  22. #include <asm/arch/at91sam9_smc.h>
  23. #include <asm/arch/at91_common.h>
  24. #include <asm/arch/at91_rstc.h>
  25. #include <asm/arch/gpio.h>
  26. #include <asm/arch/at91sam9_sdramc.h>
  27. #include <asm/arch/atmel_serial.h>
  28. #include <asm/arch/clk.h>
  29. #include <asm/gpio.h>
  30. #include <linux/mtd/rawnand.h>
  31. #include <atmel_mci.h>
  32. #include <asm/arch/at91_spi.h>
  33. #include <spi.h>
  34. #include <net.h>
  35. #ifndef CONFIG_DM_ETH
  36. #include <netdev.h>
  37. #endif
  38. DECLARE_GLOBAL_DATA_PTR;
  39. static void taurus_request_gpio(void)
  40. {
  41. gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
  42. gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
  43. gpio_request(AT91_PIN_PA25, "ena PHY");
  44. }
  45. static void taurus_nand_hw_init(void)
  46. {
  47. struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  48. struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  49. unsigned long csa;
  50. /* Assign CS3 to NAND/SmartMedia Interface */
  51. csa = readl(&matrix->ebicsa);
  52. csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  53. writel(csa, &matrix->ebicsa);
  54. /* Configure SMC CS3 for NAND/SmartMedia */
  55. writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
  56. AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
  57. &smc->cs[3].setup);
  58. writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
  59. AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
  60. &smc->cs[3].pulse);
  61. writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
  62. &smc->cs[3].cycle);
  63. writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  64. AT91_SMC_MODE_EXNW_DISABLE |
  65. AT91_SMC_MODE_DBW_8 |
  66. AT91_SMC_MODE_TDF_CYCLE(3),
  67. &smc->cs[3].mode);
  68. /* Configure RDY/BSY */
  69. at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  70. /* Enable NandFlash */
  71. at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  72. }
  73. #if defined(CONFIG_SPL_BUILD)
  74. #include <spl.h>
  75. #include <nand.h>
  76. #include <spi_flash.h>
  77. void matrix_init(void)
  78. {
  79. struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  80. writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE))
  81. | AT91_MATRIX_SLOT_CYCLE_(0x40),
  82. &mat->scfg[3]);
  83. }
  84. #if defined(CONFIG_BOARD_AXM)
  85. static int at91_is_recovery(void)
  86. {
  87. if ((at91_get_gpio_value(AT91_PIN_PA26) == 0) &&
  88. (at91_get_gpio_value(AT91_PIN_PA27) == 0))
  89. return 1;
  90. return 0;
  91. }
  92. #elif defined(CONFIG_BOARD_TAURUS)
  93. static int at91_is_recovery(void)
  94. {
  95. if (at91_get_gpio_value(AT91_PIN_PA31) == 0)
  96. return 1;
  97. return 0;
  98. }
  99. #endif
  100. void spl_board_init(void)
  101. {
  102. taurus_nand_hw_init();
  103. at91_spi0_hw_init(TAURUS_SPI_MASK);
  104. #if defined(CONFIG_BOARD_AXM)
  105. /* Configure LED PINs */
  106. at91_set_gpio_output(AT91_PIN_PA6, 0);
  107. at91_set_gpio_output(AT91_PIN_PA8, 0);
  108. at91_set_gpio_output(AT91_PIN_PA9, 0);
  109. at91_set_gpio_output(AT91_PIN_PA10, 0);
  110. at91_set_gpio_output(AT91_PIN_PA11, 0);
  111. at91_set_gpio_output(AT91_PIN_PA12, 0);
  112. /* Configure recovery button PINs */
  113. at91_set_gpio_input(AT91_PIN_PA26, 1);
  114. at91_set_gpio_input(AT91_PIN_PA27, 1);
  115. #elif defined(CONFIG_BOARD_TAURUS)
  116. at91_set_gpio_input(AT91_PIN_PA31, 1);
  117. #endif
  118. /* check for recovery mode */
  119. if (at91_is_recovery() == 1) {
  120. struct spi_flash *flash;
  121. puts("Recovery button pressed\n");
  122. nand_init();
  123. spl_nand_erase_one(0, 0);
  124. flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
  125. 0,
  126. CONFIG_SF_DEFAULT_SPEED,
  127. CONFIG_SF_DEFAULT_MODE);
  128. if (!flash) {
  129. puts("no flash\n");
  130. } else {
  131. puts("erase spi flash sector 0\n");
  132. spi_flash_erase(flash, 0,
  133. CONFIG_SYS_NAND_U_BOOT_SIZE);
  134. }
  135. }
  136. }
  137. #define SDRAM_BASE_CONF (AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_3 \
  138. |AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \
  139. | AT91_SDRAMC_TWR_VAL(3) | AT91_SDRAMC_TRC_VAL(9) \
  140. | AT91_SDRAMC_TRP_VAL(3) | AT91_SDRAMC_TRCD_VAL(3) \
  141. | AT91_SDRAMC_TRAS_VAL(6) | AT91_SDRAMC_TXSR_VAL(10))
  142. void sdramc_configure(unsigned int mask)
  143. {
  144. struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  145. struct sdramc_reg setting;
  146. at91_sdram_hw_init();
  147. setting.cr = SDRAM_BASE_CONF | mask;
  148. setting.mdr = AT91_SDRAMC_MD_SDRAM;
  149. setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
  150. writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
  151. AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
  152. &ma->ebicsa);
  153. sdramc_initialize(ATMEL_BASE_CS1, &setting);
  154. }
  155. void mem_init(void)
  156. {
  157. unsigned int ram_size = 0;
  158. /* Configure SDRAM for 128MB */
  159. sdramc_configure(AT91_SDRAMC_NC_10);
  160. /* Do memtest for 128MB */
  161. ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  162. CONFIG_SYS_SDRAM_SIZE);
  163. /*
  164. * If 32MB or 16MB should be supported check also for
  165. * expected mirroring at A16 and A17
  166. * To find mirror addresses depends how the collumns are connected
  167. * at RAM (internaly or externaly)
  168. * If the collumns are not in inverted order the mirror size effect
  169. * behaves like normal SRAM with A0,A1,A2,etc. connected incremantal
  170. */
  171. /* Mirrors at A15 on ATMEL G20 SDRAM Controller with 64MB*/
  172. if (ram_size == 0x800) {
  173. printf("\n\r 64MB\n");
  174. sdramc_configure(AT91_SDRAMC_NC_9);
  175. } else {
  176. /* Size already initialized */
  177. printf("\n\r 128MB\n");
  178. }
  179. }
  180. #endif
  181. #ifdef CONFIG_MACB
  182. static void siemens_phy_reset(void)
  183. {
  184. /*
  185. * we need to reset PHY for 200us
  186. * because of bug in ATMEL G20 CPU (undefined initial state of GPIO)
  187. */
  188. if ((readl(AT91_ASM_RSTC_SR) & AT91_RSTC_RSTTYP) ==
  189. AT91_RSTC_RSTTYP_GENERAL)
  190. at91_set_gpio_value(AT91_PIN_PA25, 0); /* reset eth switch */
  191. }
  192. static void taurus_macb_hw_init(void)
  193. {
  194. /* Enable EMAC clock */
  195. at91_periph_clk_enable(ATMEL_ID_EMAC0);
  196. /*
  197. * Disable pull-up on:
  198. * RXDV (PA17) => PHY normal mode (not Test mode)
  199. * ERX0 (PA14) => PHY ADDR0
  200. * ERX1 (PA15) => PHY ADDR1
  201. * ERX2 (PA25) => PHY ADDR2
  202. * ERX3 (PA26) => PHY ADDR3
  203. * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
  204. *
  205. * PHY has internal pull-down
  206. */
  207. at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
  208. at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
  209. at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
  210. at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
  211. at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
  212. at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
  213. siemens_phy_reset();
  214. at91_phy_reset();
  215. at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
  216. /* Re-enable pull-up */
  217. at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
  218. at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
  219. at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
  220. at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
  221. at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
  222. at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
  223. /* Initialize EMAC=MACB hardware */
  224. at91_macb_hw_init();
  225. }
  226. #endif
  227. #ifdef CONFIG_GENERIC_ATMEL_MCI
  228. int board_mmc_init(struct bd_info *bd)
  229. {
  230. at91_mci_hw_init();
  231. return atmel_mci_init((void *)ATMEL_BASE_MCI);
  232. }
  233. #endif
  234. int board_early_init_f(void)
  235. {
  236. /* Enable clocks for all PIOs */
  237. at91_periph_clk_enable(ATMEL_ID_PIOA);
  238. at91_periph_clk_enable(ATMEL_ID_PIOB);
  239. at91_periph_clk_enable(ATMEL_ID_PIOC);
  240. at91_seriald_hw_init();
  241. taurus_request_gpio();
  242. return 0;
  243. }
  244. #ifdef CONFIG_USB_GADGET_AT91
  245. #include <linux/usb/at91_udc.h>
  246. void at91_udp_hw_init(void)
  247. {
  248. /* Enable PLLB */
  249. at91_pllb_clk_enable(get_pllb_init());
  250. /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
  251. at91_periph_clk_enable(ATMEL_ID_UDP);
  252. at91_system_clk_enable(AT91SAM926x_PMC_UDP);
  253. }
  254. struct at91_udc_data board_udc_data = {
  255. .baseaddr = ATMEL_BASE_UDP0,
  256. };
  257. #endif
  258. int board_init(void)
  259. {
  260. /* adress of boot parameters */
  261. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  262. taurus_request_gpio();
  263. #ifdef CONFIG_CMD_NAND
  264. taurus_nand_hw_init();
  265. #endif
  266. #ifdef CONFIG_MACB
  267. taurus_macb_hw_init();
  268. #endif
  269. at91_spi0_hw_init(TAURUS_SPI_MASK);
  270. #ifdef CONFIG_USB_GADGET_AT91
  271. at91_udp_hw_init();
  272. at91_udc_probe(&board_udc_data);
  273. #endif
  274. return 0;
  275. }
  276. int dram_init(void)
  277. {
  278. gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  279. CONFIG_SYS_SDRAM_SIZE);
  280. return 0;
  281. }
  282. #if !defined(CONFIG_SPL_BUILD)
  283. #if defined(CONFIG_BOARD_AXM)
  284. /*
  285. * Booting the Fallback Image.
  286. *
  287. * The function is used to provide and
  288. * boot the image with the fallback
  289. * parameters, incase if the faulty image
  290. * in upgraded over the base firmware.
  291. *
  292. */
  293. static int upgrade_failure_fallback(void)
  294. {
  295. char *partitionset_active = NULL;
  296. char *rootfs = NULL;
  297. char *rootfs_fallback = NULL;
  298. char *kern_off;
  299. char *kern_off_fb;
  300. char *kern_size;
  301. char *kern_size_fb;
  302. partitionset_active = env_get("partitionset_active");
  303. if (partitionset_active) {
  304. if (partitionset_active[0] == 'A')
  305. env_set("partitionset_active", "B");
  306. else
  307. env_set("partitionset_active", "A");
  308. } else {
  309. printf("partitionset_active missing.\n");
  310. return -ENOENT;
  311. }
  312. rootfs = env_get("rootfs");
  313. rootfs_fallback = env_get("rootfs_fallback");
  314. env_set("rootfs", rootfs_fallback);
  315. env_set("rootfs_fallback", rootfs);
  316. kern_size = env_get("kernel_size");
  317. kern_size_fb = env_get("kernel_size_fallback");
  318. env_set("kernel_size", kern_size_fb);
  319. env_set("kernel_size_fallback", kern_size);
  320. kern_off = env_get("kernel_Off");
  321. kern_off_fb = env_get("kernel_Off_fallback");
  322. env_set("kernel_Off", kern_off_fb);
  323. env_set("kernel_Off_fallback", kern_off);
  324. env_set("bootargs", '\0');
  325. env_set("upgrade_available", '\0');
  326. env_set("boot_retries", '\0');
  327. env_save();
  328. return 0;
  329. }
  330. static int do_upgrade_available(struct cmd_tbl *cmdtp, int flag, int argc,
  331. char *const argv[])
  332. {
  333. unsigned long upgrade_available = 0;
  334. unsigned long boot_retry = 0;
  335. char boot_buf[10];
  336. upgrade_available = dectoul(env_get("upgrade_available"), NULL);
  337. if (upgrade_available) {
  338. boot_retry = dectoul(env_get("boot_retries"), NULL);
  339. boot_retry++;
  340. sprintf(boot_buf, "%lx", boot_retry);
  341. env_set("boot_retries", boot_buf);
  342. env_save();
  343. /*
  344. * Here the boot_retries count is checked, and if the
  345. * count becomes greater than 2 switch back to the
  346. * fallback, and reset the board.
  347. */
  348. if (boot_retry > 2) {
  349. if (upgrade_failure_fallback() == 0)
  350. do_reset(NULL, 0, 0, NULL);
  351. return -1;
  352. }
  353. }
  354. return 0;
  355. }
  356. U_BOOT_CMD(
  357. upgrade_available, 1, 1, do_upgrade_available,
  358. "check Siemens update",
  359. "no parameters"
  360. );
  361. #endif
  362. #endif