stm32prog.c 41 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <command.h>
  6. #include <console.h>
  7. #include <dfu.h>
  8. #include <malloc.h>
  9. #include <misc.h>
  10. #include <mmc.h>
  11. #include <part.h>
  12. #include <asm/arch/stm32mp1_smc.h>
  13. #include <asm/global_data.h>
  14. #include <dm/uclass.h>
  15. #include <jffs2/load_kernel.h>
  16. #include <linux/list.h>
  17. #include <linux/list_sort.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/sizes.h>
  20. #include "stm32prog.h"
  21. /* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
  22. #define GPT_HEADER_SZ 34
  23. #define OPT_SELECT BIT(0)
  24. #define OPT_EMPTY BIT(1)
  25. #define OPT_DELETE BIT(2)
  26. #define IS_SELECT(part) ((part)->option & OPT_SELECT)
  27. #define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
  28. #define IS_DELETE(part) ((part)->option & OPT_DELETE)
  29. #define ALT_BUF_LEN SZ_1K
  30. #define ROOTFS_MMC0_UUID \
  31. EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
  32. 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
  33. #define ROOTFS_MMC1_UUID \
  34. EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
  35. 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
  36. #define ROOTFS_MMC2_UUID \
  37. EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
  38. 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
  39. /* RAW parttion (binary / bootloader) used Linux - reserved UUID */
  40. #define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
  41. /*
  42. * unique partition guid (uuid) for partition named "rootfs"
  43. * on each MMC instance = SD Card or eMMC
  44. * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
  45. */
  46. static const efi_guid_t uuid_mmc[3] = {
  47. ROOTFS_MMC0_UUID,
  48. ROOTFS_MMC1_UUID,
  49. ROOTFS_MMC2_UUID
  50. };
  51. /* order of column in flash layout file */
  52. enum stm32prog_col_t {
  53. COL_OPTION,
  54. COL_ID,
  55. COL_NAME,
  56. COL_TYPE,
  57. COL_IP,
  58. COL_OFFSET,
  59. COL_NB_STM32
  60. };
  61. #define FIP_TOC_HEADER_NAME 0xAA640001
  62. struct fip_toc_header {
  63. u32 name;
  64. u32 serial_number;
  65. u64 flags;
  66. };
  67. DECLARE_GLOBAL_DATA_PTR;
  68. /* partition handling routines : CONFIG_CMD_MTDPARTS */
  69. int mtdparts_init(void);
  70. int find_dev_and_part(const char *id, struct mtd_device **dev,
  71. u8 *part_num, struct part_info **part);
  72. char *stm32prog_get_error(struct stm32prog_data *data)
  73. {
  74. static const char error_msg[] = "Unspecified";
  75. if (strlen(data->error) == 0)
  76. strcpy(data->error, error_msg);
  77. return data->error;
  78. }
  79. static bool stm32prog_is_fip_header(struct fip_toc_header *header)
  80. {
  81. return (header->name == FIP_TOC_HEADER_NAME) && header->serial_number;
  82. }
  83. void stm32prog_header_check(struct raw_header_s *raw_header,
  84. struct image_header_s *header)
  85. {
  86. unsigned int i;
  87. if (!raw_header || !header) {
  88. log_debug("%s:no header data\n", __func__);
  89. return;
  90. }
  91. header->type = HEADER_NONE;
  92. header->image_checksum = 0x0;
  93. header->image_length = 0x0;
  94. if (stm32prog_is_fip_header((struct fip_toc_header *)raw_header)) {
  95. header->type = HEADER_FIP;
  96. return;
  97. }
  98. if (raw_header->magic_number !=
  99. (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
  100. log_debug("%s:invalid magic number : 0x%x\n",
  101. __func__, raw_header->magic_number);
  102. return;
  103. }
  104. /* only header v1.0 supported */
  105. if (raw_header->header_version != 0x00010000) {
  106. log_debug("%s:invalid header version : 0x%x\n",
  107. __func__, raw_header->header_version);
  108. return;
  109. }
  110. if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
  111. log_debug("%s:invalid reserved field\n", __func__);
  112. return;
  113. }
  114. for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
  115. if (raw_header->padding[i] != 0) {
  116. log_debug("%s:invalid padding field\n", __func__);
  117. return;
  118. }
  119. }
  120. header->type = HEADER_STM32IMAGE;
  121. header->image_checksum = le32_to_cpu(raw_header->image_checksum);
  122. header->image_length = le32_to_cpu(raw_header->image_length);
  123. return;
  124. }
  125. static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
  126. {
  127. u32 i, checksum;
  128. u8 *payload;
  129. /* compute checksum on payload */
  130. payload = (u8 *)addr;
  131. checksum = 0;
  132. for (i = header->image_length; i > 0; i--)
  133. checksum += *(payload++);
  134. return checksum;
  135. }
  136. /* FLASHLAYOUT PARSING *****************************************/
  137. static int parse_option(struct stm32prog_data *data,
  138. int i, char *p, struct stm32prog_part_t *part)
  139. {
  140. int result = 0;
  141. char *c = p;
  142. part->option = 0;
  143. if (!strcmp(p, "-"))
  144. return 0;
  145. while (*c) {
  146. switch (*c) {
  147. case 'P':
  148. part->option |= OPT_SELECT;
  149. break;
  150. case 'E':
  151. part->option |= OPT_EMPTY;
  152. break;
  153. case 'D':
  154. part->option |= OPT_DELETE;
  155. break;
  156. default:
  157. result = -EINVAL;
  158. stm32prog_err("Layout line %d: invalid option '%c' in %s)",
  159. i, *c, p);
  160. return -EINVAL;
  161. }
  162. c++;
  163. }
  164. if (!(part->option & OPT_SELECT)) {
  165. stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
  166. return -EINVAL;
  167. }
  168. return result;
  169. }
  170. static int parse_id(struct stm32prog_data *data,
  171. int i, char *p, struct stm32prog_part_t *part)
  172. {
  173. int result = 0;
  174. unsigned long value;
  175. result = strict_strtoul(p, 0, &value);
  176. part->id = value;
  177. if (result || value > PHASE_LAST_USER) {
  178. stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
  179. result = -EINVAL;
  180. }
  181. return result;
  182. }
  183. static int parse_name(struct stm32prog_data *data,
  184. int i, char *p, struct stm32prog_part_t *part)
  185. {
  186. int result = 0;
  187. if (strlen(p) < sizeof(part->name)) {
  188. strcpy(part->name, p);
  189. } else {
  190. stm32prog_err("Layout line %d: partition name too long [%d]: %s",
  191. i, strlen(p), p);
  192. result = -EINVAL;
  193. }
  194. return result;
  195. }
  196. static int parse_type(struct stm32prog_data *data,
  197. int i, char *p, struct stm32prog_part_t *part)
  198. {
  199. int result = 0;
  200. int len = 0;
  201. part->bin_nb = 0;
  202. if (!strncmp(p, "Binary", 6)) {
  203. part->part_type = PART_BINARY;
  204. /* search for Binary(X) case */
  205. len = strlen(p);
  206. part->bin_nb = 1;
  207. if (len > 6) {
  208. if (len < 8 ||
  209. (p[6] != '(') ||
  210. (p[len - 1] != ')'))
  211. result = -EINVAL;
  212. else
  213. part->bin_nb =
  214. dectoul(&p[7], NULL);
  215. }
  216. } else if (!strcmp(p, "System")) {
  217. part->part_type = PART_SYSTEM;
  218. } else if (!strcmp(p, "FileSystem")) {
  219. part->part_type = PART_FILESYSTEM;
  220. } else if (!strcmp(p, "RawImage")) {
  221. part->part_type = RAW_IMAGE;
  222. } else {
  223. result = -EINVAL;
  224. }
  225. if (result)
  226. stm32prog_err("Layout line %d: type parsing error : '%s'",
  227. i, p);
  228. return result;
  229. }
  230. static int parse_ip(struct stm32prog_data *data,
  231. int i, char *p, struct stm32prog_part_t *part)
  232. {
  233. int result = 0;
  234. unsigned int len = 0;
  235. part->dev_id = 0;
  236. if (!strcmp(p, "none")) {
  237. part->target = STM32PROG_NONE;
  238. } else if (!strncmp(p, "mmc", 3)) {
  239. part->target = STM32PROG_MMC;
  240. len = 3;
  241. } else if (!strncmp(p, "nor", 3)) {
  242. part->target = STM32PROG_NOR;
  243. len = 3;
  244. } else if (!strncmp(p, "nand", 4)) {
  245. part->target = STM32PROG_NAND;
  246. len = 4;
  247. } else if (!strncmp(p, "spi-nand", 8)) {
  248. part->target = STM32PROG_SPI_NAND;
  249. len = 8;
  250. } else if (!strncmp(p, "ram", 3)) {
  251. part->target = STM32PROG_RAM;
  252. len = 0;
  253. } else {
  254. result = -EINVAL;
  255. }
  256. if (len) {
  257. /* only one digit allowed for device id */
  258. if (strlen(p) != len + 1) {
  259. result = -EINVAL;
  260. } else {
  261. part->dev_id = p[len] - '0';
  262. if (part->dev_id > 9)
  263. result = -EINVAL;
  264. }
  265. }
  266. if (result)
  267. stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
  268. return result;
  269. }
  270. static int parse_offset(struct stm32prog_data *data,
  271. int i, char *p, struct stm32prog_part_t *part)
  272. {
  273. int result = 0;
  274. char *tail;
  275. part->part_id = 0;
  276. part->addr = 0;
  277. part->size = 0;
  278. /* eMMC boot parttion */
  279. if (!strncmp(p, "boot", 4)) {
  280. if (strlen(p) != 5) {
  281. result = -EINVAL;
  282. } else {
  283. if (p[4] == '1')
  284. part->part_id = -1;
  285. else if (p[4] == '2')
  286. part->part_id = -2;
  287. else
  288. result = -EINVAL;
  289. }
  290. if (result)
  291. stm32prog_err("Layout line %d: invalid part '%s'",
  292. i, p);
  293. } else {
  294. part->addr = simple_strtoull(p, &tail, 0);
  295. if (tail == p || *tail != '\0') {
  296. stm32prog_err("Layout line %d: invalid offset '%s'",
  297. i, p);
  298. result = -EINVAL;
  299. }
  300. }
  301. return result;
  302. }
  303. static
  304. int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
  305. struct stm32prog_part_t *part) = {
  306. [COL_OPTION] = parse_option,
  307. [COL_ID] = parse_id,
  308. [COL_NAME] = parse_name,
  309. [COL_TYPE] = parse_type,
  310. [COL_IP] = parse_ip,
  311. [COL_OFFSET] = parse_offset,
  312. };
  313. static int parse_flash_layout(struct stm32prog_data *data,
  314. ulong addr,
  315. ulong size)
  316. {
  317. int column = 0, part_nb = 0, ret;
  318. bool end_of_line, eof;
  319. char *p, *start, *last, *col;
  320. struct stm32prog_part_t *part;
  321. struct image_header_s header;
  322. int part_list_size;
  323. int i;
  324. data->part_nb = 0;
  325. /* check if STM32image is detected */
  326. stm32prog_header_check((struct raw_header_s *)addr, &header);
  327. if (header.type == HEADER_STM32IMAGE) {
  328. u32 checksum;
  329. addr = addr + BL_HEADER_SIZE;
  330. size = header.image_length;
  331. checksum = stm32prog_header_checksum(addr, &header);
  332. if (checksum != header.image_checksum) {
  333. stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
  334. checksum, header.image_checksum);
  335. return -EIO;
  336. }
  337. }
  338. if (!size)
  339. return -EINVAL;
  340. start = (char *)addr;
  341. last = start + size;
  342. *last = 0x0; /* force null terminated string */
  343. log_debug("flash layout =\n%s\n", start);
  344. /* calculate expected number of partitions */
  345. part_list_size = 1;
  346. p = start;
  347. while (*p && (p < last)) {
  348. if (*p++ == '\n') {
  349. part_list_size++;
  350. if (p < last && *p == '#')
  351. part_list_size--;
  352. }
  353. }
  354. if (part_list_size > PHASE_LAST_USER) {
  355. stm32prog_err("Layout: too many partition (%d)",
  356. part_list_size);
  357. return -1;
  358. }
  359. part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
  360. if (!part) {
  361. stm32prog_err("Layout: alloc failed");
  362. return -ENOMEM;
  363. }
  364. data->part_array = part;
  365. /* main parsing loop */
  366. i = 1;
  367. eof = false;
  368. p = start;
  369. col = start; /* 1st column */
  370. end_of_line = false;
  371. while (!eof) {
  372. switch (*p) {
  373. /* CR is ignored and replaced by NULL character */
  374. case '\r':
  375. *p = '\0';
  376. p++;
  377. continue;
  378. case '\0':
  379. end_of_line = true;
  380. eof = true;
  381. break;
  382. case '\n':
  383. end_of_line = true;
  384. break;
  385. case '\t':
  386. break;
  387. case '#':
  388. /* comment line is skipped */
  389. if (column == 0 && p == col) {
  390. while ((p < last) && *p)
  391. if (*p++ == '\n')
  392. break;
  393. col = p;
  394. i++;
  395. if (p >= last || !*p) {
  396. eof = true;
  397. end_of_line = true;
  398. }
  399. continue;
  400. }
  401. /* fall through */
  402. /* by default continue with the next character */
  403. default:
  404. p++;
  405. continue;
  406. }
  407. /* replace by \0: allow string parsing for each column */
  408. *p = '\0';
  409. p++;
  410. if (p >= last) {
  411. eof = true;
  412. end_of_line = true;
  413. }
  414. /* skip empty line and multiple TAB in tsv file */
  415. if (strlen(col) == 0) {
  416. col = p;
  417. /* skip empty line */
  418. if (column == 0 && end_of_line) {
  419. end_of_line = false;
  420. i++;
  421. }
  422. continue;
  423. }
  424. if (column < COL_NB_STM32) {
  425. ret = parse[column](data, i, col, part);
  426. if (ret)
  427. return ret;
  428. }
  429. /* save the beginning of the next column */
  430. column++;
  431. col = p;
  432. if (!end_of_line)
  433. continue;
  434. /* end of the line detected */
  435. end_of_line = false;
  436. if (column < COL_NB_STM32) {
  437. stm32prog_err("Layout line %d: no enought column", i);
  438. return -EINVAL;
  439. }
  440. column = 0;
  441. part_nb++;
  442. part++;
  443. i++;
  444. if (part_nb >= part_list_size) {
  445. part = NULL;
  446. if (!eof) {
  447. stm32prog_err("Layout: no enought memory for %d part",
  448. part_nb);
  449. return -EINVAL;
  450. }
  451. }
  452. }
  453. data->part_nb = part_nb;
  454. if (data->part_nb == 0) {
  455. stm32prog_err("Layout: no partition found");
  456. return -ENODEV;
  457. }
  458. return 0;
  459. }
  460. static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
  461. {
  462. struct stm32prog_part_t *parta, *partb;
  463. parta = container_of(a, struct stm32prog_part_t, list);
  464. partb = container_of(b, struct stm32prog_part_t, list);
  465. if (parta->part_id != partb->part_id)
  466. return parta->part_id - partb->part_id;
  467. else
  468. return parta->addr > partb->addr ? 1 : -1;
  469. }
  470. static void get_mtd_by_target(char *string, enum stm32prog_target target,
  471. int dev_id)
  472. {
  473. const char *dev_str;
  474. switch (target) {
  475. case STM32PROG_NOR:
  476. dev_str = "nor";
  477. break;
  478. case STM32PROG_NAND:
  479. dev_str = "nand";
  480. break;
  481. case STM32PROG_SPI_NAND:
  482. dev_str = "spi-nand";
  483. break;
  484. default:
  485. dev_str = "invalid";
  486. break;
  487. }
  488. sprintf(string, "%s%d", dev_str, dev_id);
  489. }
  490. static int init_device(struct stm32prog_data *data,
  491. struct stm32prog_dev_t *dev)
  492. {
  493. struct mmc *mmc = NULL;
  494. struct blk_desc *block_dev = NULL;
  495. struct mtd_info *mtd = NULL;
  496. char mtd_id[16];
  497. int part_id;
  498. int ret;
  499. u64 first_addr = 0, last_addr = 0;
  500. struct stm32prog_part_t *part, *next_part;
  501. u64 part_addr, part_size;
  502. bool part_found;
  503. const char *part_name;
  504. switch (dev->target) {
  505. case STM32PROG_MMC:
  506. if (!IS_ENABLED(CONFIG_MMC)) {
  507. stm32prog_err("unknown device type = %d", dev->target);
  508. return -ENODEV;
  509. }
  510. mmc = find_mmc_device(dev->dev_id);
  511. if (!mmc || mmc_init(mmc)) {
  512. stm32prog_err("mmc device %d not found", dev->dev_id);
  513. return -ENODEV;
  514. }
  515. block_dev = mmc_get_blk_desc(mmc);
  516. if (!block_dev) {
  517. stm32prog_err("mmc device %d not probed", dev->dev_id);
  518. return -ENODEV;
  519. }
  520. dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
  521. dev->mmc = mmc;
  522. /* reserve a full erase group for each GTP headers */
  523. if (mmc->erase_grp_size > GPT_HEADER_SZ) {
  524. first_addr = dev->erase_size;
  525. last_addr = (u64)(block_dev->lba -
  526. mmc->erase_grp_size) *
  527. block_dev->blksz;
  528. } else {
  529. first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
  530. last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
  531. block_dev->blksz;
  532. }
  533. log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
  534. block_dev->lba, block_dev->blksz);
  535. log_debug(" available address = 0x%llx..0x%llx\n",
  536. first_addr, last_addr);
  537. log_debug(" full_update = %d\n", dev->full_update);
  538. break;
  539. case STM32PROG_NOR:
  540. case STM32PROG_NAND:
  541. case STM32PROG_SPI_NAND:
  542. if (!IS_ENABLED(CONFIG_MTD)) {
  543. stm32prog_err("unknown device type = %d", dev->target);
  544. return -ENODEV;
  545. }
  546. get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
  547. log_debug("%s\n", mtd_id);
  548. mtdparts_init();
  549. mtd = get_mtd_device_nm(mtd_id);
  550. if (IS_ERR(mtd)) {
  551. stm32prog_err("MTD device %s not found", mtd_id);
  552. return -ENODEV;
  553. }
  554. first_addr = 0;
  555. last_addr = mtd->size;
  556. dev->erase_size = mtd->erasesize;
  557. log_debug("MTD device %s: size=%lld erasesize=%d\n",
  558. mtd_id, mtd->size, mtd->erasesize);
  559. log_debug(" available address = 0x%llx..0x%llx\n",
  560. first_addr, last_addr);
  561. dev->mtd = mtd;
  562. break;
  563. case STM32PROG_RAM:
  564. first_addr = gd->bd->bi_dram[0].start;
  565. last_addr = first_addr + gd->bd->bi_dram[0].size;
  566. dev->erase_size = 1;
  567. break;
  568. default:
  569. stm32prog_err("unknown device type = %d", dev->target);
  570. return -ENODEV;
  571. }
  572. log_debug(" erase size = 0x%x\n", dev->erase_size);
  573. log_debug(" full_update = %d\n", dev->full_update);
  574. /* order partition list in offset order */
  575. list_sort(NULL, &dev->part_list, &part_cmp);
  576. part_id = 1;
  577. log_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
  578. list_for_each_entry(part, &dev->part_list, list) {
  579. if (part->bin_nb > 1) {
  580. if ((dev->target != STM32PROG_NAND &&
  581. dev->target != STM32PROG_SPI_NAND) ||
  582. part->id >= PHASE_FIRST_USER ||
  583. strncmp(part->name, "fsbl", 4)) {
  584. stm32prog_err("%s (0x%x): multiple binary %d not supported",
  585. part->name, part->id,
  586. part->bin_nb);
  587. return -EINVAL;
  588. }
  589. }
  590. if (part->part_type == RAW_IMAGE) {
  591. part->part_id = 0x0;
  592. part->addr = 0x0;
  593. if (block_dev)
  594. part->size = block_dev->lba * block_dev->blksz;
  595. else
  596. part->size = last_addr;
  597. log_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
  598. part->option, part->id, part->name,
  599. part->part_type, part->bin_nb, part->target,
  600. part->dev_id, part->addr, part->size);
  601. continue;
  602. }
  603. if (part->part_id < 0) { /* boot hw partition for eMMC */
  604. if (mmc) {
  605. part->size = mmc->capacity_boot;
  606. } else {
  607. stm32prog_err("%s (0x%x): hw partition not expected : %d",
  608. part->name, part->id,
  609. part->part_id);
  610. return -ENODEV;
  611. }
  612. } else {
  613. part->part_id = part_id++;
  614. /* last partition : size to the end of the device */
  615. if (part->list.next != &dev->part_list) {
  616. next_part =
  617. container_of(part->list.next,
  618. struct stm32prog_part_t,
  619. list);
  620. if (part->addr < next_part->addr) {
  621. part->size = next_part->addr -
  622. part->addr;
  623. } else {
  624. stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
  625. part->name, part->id,
  626. part->addr,
  627. next_part->name,
  628. next_part->id,
  629. next_part->addr);
  630. return -EINVAL;
  631. }
  632. } else {
  633. if (part->addr <= last_addr) {
  634. part->size = last_addr - part->addr;
  635. } else {
  636. stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
  637. part->name, part->id,
  638. part->addr, last_addr);
  639. return -EINVAL;
  640. }
  641. }
  642. if (part->addr < first_addr) {
  643. stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
  644. part->name, part->id,
  645. part->addr, first_addr);
  646. return -EINVAL;
  647. }
  648. }
  649. if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
  650. stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
  651. part->name, part->id, part->addr,
  652. part->dev->erase_size);
  653. return -EINVAL;
  654. }
  655. log_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
  656. part->part_id, part->option, part->id, part->name,
  657. part->part_type, part->bin_nb, part->target,
  658. part->dev_id, part->addr, part->size);
  659. part_addr = 0;
  660. part_size = 0;
  661. part_found = false;
  662. /* check coherency with existing partition */
  663. if (block_dev) {
  664. /*
  665. * block devices with GPT: check user partition size
  666. * only for partial update, the GPT partions are be
  667. * created for full update
  668. */
  669. if (dev->full_update || part->part_id < 0) {
  670. log_debug("\n");
  671. continue;
  672. }
  673. struct disk_partition partinfo;
  674. ret = part_get_info(block_dev, part->part_id,
  675. &partinfo);
  676. if (ret) {
  677. stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
  678. part->name, part->id,
  679. part_id, part->dev_id);
  680. return -ENODEV;
  681. }
  682. part_addr = (u64)partinfo.start * partinfo.blksz;
  683. part_size = (u64)partinfo.size * partinfo.blksz;
  684. part_name = (char *)partinfo.name;
  685. part_found = true;
  686. }
  687. if (IS_ENABLED(CONFIG_MTD) && mtd) {
  688. char mtd_part_id[32];
  689. struct part_info *mtd_part;
  690. struct mtd_device *mtd_dev;
  691. u8 part_num;
  692. sprintf(mtd_part_id, "%s,%d", mtd_id,
  693. part->part_id - 1);
  694. ret = find_dev_and_part(mtd_part_id, &mtd_dev,
  695. &part_num, &mtd_part);
  696. if (ret != 0) {
  697. stm32prog_err("%s (0x%x): Invalid MTD partition %s",
  698. part->name, part->id,
  699. mtd_part_id);
  700. return -ENODEV;
  701. }
  702. part_addr = mtd_part->offset;
  703. part_size = mtd_part->size;
  704. part_name = mtd_part->name;
  705. part_found = true;
  706. }
  707. /* no partition for this device */
  708. if (!part_found) {
  709. log_debug("\n");
  710. continue;
  711. }
  712. log_debug(" %08llx %08llx\n", part_addr, part_size);
  713. if (part->addr != part_addr) {
  714. stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
  715. part->name, part->id, part->part_id,
  716. part_name, part->addr, part_addr);
  717. return -ENODEV;
  718. }
  719. if (part->size != part_size) {
  720. stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
  721. part->name, part->id, part->part_id,
  722. part_name, part->addr, part->size,
  723. part_size);
  724. return -ENODEV;
  725. }
  726. }
  727. return 0;
  728. }
  729. static int treat_partition_list(struct stm32prog_data *data)
  730. {
  731. int i, j;
  732. struct stm32prog_part_t *part;
  733. for (j = 0; j < STM32PROG_MAX_DEV; j++) {
  734. data->dev[j].target = STM32PROG_NONE;
  735. INIT_LIST_HEAD(&data->dev[j].part_list);
  736. }
  737. data->tee_detected = false;
  738. data->fsbl_nor_detected = false;
  739. for (i = 0; i < data->part_nb; i++) {
  740. part = &data->part_array[i];
  741. part->alt_id = -1;
  742. /* skip partition with IP="none" */
  743. if (part->target == STM32PROG_NONE) {
  744. if (IS_SELECT(part)) {
  745. stm32prog_err("Layout: selected none phase = 0x%x",
  746. part->id);
  747. return -EINVAL;
  748. }
  749. continue;
  750. }
  751. if (part->id == PHASE_FLASHLAYOUT ||
  752. part->id > PHASE_LAST_USER) {
  753. stm32prog_err("Layout: invalid phase = 0x%x",
  754. part->id);
  755. return -EINVAL;
  756. }
  757. for (j = i + 1; j < data->part_nb; j++) {
  758. if (part->id == data->part_array[j].id) {
  759. stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
  760. part->id, i, j);
  761. return -EINVAL;
  762. }
  763. }
  764. for (j = 0; j < STM32PROG_MAX_DEV; j++) {
  765. if (data->dev[j].target == STM32PROG_NONE) {
  766. /* new device found */
  767. data->dev[j].target = part->target;
  768. data->dev[j].dev_id = part->dev_id;
  769. data->dev[j].full_update = true;
  770. data->dev_nb++;
  771. break;
  772. } else if ((part->target == data->dev[j].target) &&
  773. (part->dev_id == data->dev[j].dev_id)) {
  774. break;
  775. }
  776. }
  777. if (j == STM32PROG_MAX_DEV) {
  778. stm32prog_err("Layout: too many device");
  779. return -EINVAL;
  780. }
  781. switch (part->target) {
  782. case STM32PROG_NOR:
  783. if (!data->fsbl_nor_detected &&
  784. !strncmp(part->name, "fsbl", 4))
  785. data->fsbl_nor_detected = true;
  786. /* fallthrough */
  787. case STM32PROG_NAND:
  788. case STM32PROG_SPI_NAND:
  789. if (!data->tee_detected &&
  790. !strncmp(part->name, "tee", 3))
  791. data->tee_detected = true;
  792. break;
  793. default:
  794. break;
  795. }
  796. part->dev = &data->dev[j];
  797. if (!IS_SELECT(part))
  798. part->dev->full_update = false;
  799. list_add_tail(&part->list, &data->dev[j].part_list);
  800. }
  801. return 0;
  802. }
  803. static int create_gpt_partitions(struct stm32prog_data *data)
  804. {
  805. int offset = 0;
  806. const int buflen = SZ_8K;
  807. char *buf;
  808. char uuid[UUID_STR_LEN + 1];
  809. unsigned char *uuid_bin;
  810. unsigned int mmc_id;
  811. int i;
  812. bool rootfs_found;
  813. struct stm32prog_part_t *part;
  814. buf = malloc(buflen);
  815. if (!buf)
  816. return -ENOMEM;
  817. puts("partitions : ");
  818. /* initialize the selected device */
  819. for (i = 0; i < data->dev_nb; i++) {
  820. /* create gpt partition support only for full update on MMC */
  821. if (data->dev[i].target != STM32PROG_MMC ||
  822. !data->dev[i].full_update)
  823. continue;
  824. offset = 0;
  825. rootfs_found = false;
  826. memset(buf, 0, buflen);
  827. list_for_each_entry(part, &data->dev[i].part_list, list) {
  828. /* skip eMMC boot partitions */
  829. if (part->part_id < 0)
  830. continue;
  831. /* skip Raw Image */
  832. if (part->part_type == RAW_IMAGE)
  833. continue;
  834. if (offset + 100 > buflen) {
  835. log_debug("\n%s: buffer too small, %s skippped",
  836. __func__, part->name);
  837. continue;
  838. }
  839. if (!offset)
  840. offset += sprintf(buf, "gpt write mmc %d \"",
  841. data->dev[i].dev_id);
  842. offset += snprintf(buf + offset, buflen - offset,
  843. "name=%s,start=0x%llx,size=0x%llx",
  844. part->name,
  845. part->addr,
  846. part->size);
  847. if (part->part_type == PART_BINARY)
  848. offset += snprintf(buf + offset,
  849. buflen - offset,
  850. ",type="
  851. LINUX_RESERVED_UUID);
  852. else
  853. offset += snprintf(buf + offset,
  854. buflen - offset,
  855. ",type=linux");
  856. if (part->part_type == PART_SYSTEM)
  857. offset += snprintf(buf + offset,
  858. buflen - offset,
  859. ",bootable");
  860. if (!rootfs_found && !strcmp(part->name, "rootfs")) {
  861. mmc_id = part->dev_id;
  862. rootfs_found = true;
  863. if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
  864. uuid_bin =
  865. (unsigned char *)uuid_mmc[mmc_id].b;
  866. uuid_bin_to_str(uuid_bin, uuid,
  867. UUID_STR_FORMAT_GUID);
  868. offset += snprintf(buf + offset,
  869. buflen - offset,
  870. ",uuid=%s", uuid);
  871. }
  872. }
  873. offset += snprintf(buf + offset, buflen - offset, ";");
  874. }
  875. if (offset) {
  876. offset += snprintf(buf + offset, buflen - offset, "\"");
  877. log_debug("\ncmd: %s\n", buf);
  878. if (run_command(buf, 0)) {
  879. stm32prog_err("GPT partitionning fail: %s",
  880. buf);
  881. free(buf);
  882. return -1;
  883. }
  884. }
  885. if (data->dev[i].mmc)
  886. part_init(mmc_get_blk_desc(data->dev[i].mmc));
  887. #ifdef DEBUG
  888. sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
  889. log_debug("\ncmd: %s", buf);
  890. if (run_command(buf, 0))
  891. printf("fail !\n");
  892. else
  893. printf("OK\n");
  894. sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
  895. run_command(buf, 0);
  896. #endif
  897. }
  898. puts("done\n");
  899. #ifdef DEBUG
  900. run_command("mtd list", 0);
  901. #endif
  902. free(buf);
  903. return 0;
  904. }
  905. static int stm32prog_alt_add(struct stm32prog_data *data,
  906. struct dfu_entity *dfu,
  907. struct stm32prog_part_t *part)
  908. {
  909. int ret = 0;
  910. int offset = 0;
  911. char devstr[10];
  912. char dfustr[10];
  913. char buf[ALT_BUF_LEN];
  914. u32 size;
  915. char multiplier, type;
  916. /* max 3 digit for sector size */
  917. if (part->size > SZ_1M) {
  918. size = (u32)(part->size / SZ_1M);
  919. multiplier = 'M';
  920. } else if (part->size > SZ_1K) {
  921. size = (u32)(part->size / SZ_1K);
  922. multiplier = 'K';
  923. } else {
  924. size = (u32)part->size;
  925. multiplier = 'B';
  926. }
  927. if (IS_SELECT(part) && !IS_EMPTY(part))
  928. type = 'e'; /*Readable and Writeable*/
  929. else
  930. type = 'a';/*Readable*/
  931. memset(buf, 0, sizeof(buf));
  932. offset = snprintf(buf, ALT_BUF_LEN - offset,
  933. "@%s/0x%02x/1*%d%c%c ",
  934. part->name, part->id,
  935. size, multiplier, type);
  936. if (part->target == STM32PROG_RAM) {
  937. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  938. "ram 0x%llx 0x%llx",
  939. part->addr, part->size);
  940. } else if (part->part_type == RAW_IMAGE) {
  941. u64 dfu_size;
  942. if (part->dev->target == STM32PROG_MMC)
  943. dfu_size = part->size / part->dev->mmc->read_bl_len;
  944. else
  945. dfu_size = part->size;
  946. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  947. "raw 0x0 0x%llx", dfu_size);
  948. } else if (part->part_id < 0) {
  949. u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
  950. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  951. "raw 0x%llx 0x%llx",
  952. part->addr, nb_blk);
  953. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  954. " mmcpart %d;", -(part->part_id));
  955. } else {
  956. if (part->part_type == PART_SYSTEM &&
  957. (part->target == STM32PROG_NAND ||
  958. part->target == STM32PROG_NOR ||
  959. part->target == STM32PROG_SPI_NAND))
  960. offset += snprintf(buf + offset,
  961. ALT_BUF_LEN - offset,
  962. "partubi");
  963. else
  964. offset += snprintf(buf + offset,
  965. ALT_BUF_LEN - offset,
  966. "part");
  967. /* dev_id requested by DFU MMC */
  968. if (part->target == STM32PROG_MMC)
  969. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  970. " %d", part->dev_id);
  971. offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
  972. " %d;", part->part_id);
  973. }
  974. ret = -ENODEV;
  975. switch (part->target) {
  976. case STM32PROG_MMC:
  977. if (IS_ENABLED(CONFIG_MMC)) {
  978. ret = 0;
  979. sprintf(dfustr, "mmc");
  980. sprintf(devstr, "%d", part->dev_id);
  981. }
  982. break;
  983. case STM32PROG_NAND:
  984. case STM32PROG_NOR:
  985. case STM32PROG_SPI_NAND:
  986. if (IS_ENABLED(CONFIG_MTD)) {
  987. ret = 0;
  988. sprintf(dfustr, "mtd");
  989. get_mtd_by_target(devstr, part->target, part->dev_id);
  990. }
  991. break;
  992. case STM32PROG_RAM:
  993. ret = 0;
  994. sprintf(dfustr, "ram");
  995. sprintf(devstr, "0");
  996. break;
  997. default:
  998. break;
  999. }
  1000. if (ret) {
  1001. stm32prog_err("invalid target: %d", part->target);
  1002. return ret;
  1003. }
  1004. log_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
  1005. ret = dfu_alt_add(dfu, dfustr, devstr, buf);
  1006. log_debug("dfu_alt_add(%s,%s,%s) result %d\n",
  1007. dfustr, devstr, buf, ret);
  1008. return ret;
  1009. }
  1010. static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
  1011. char *name, int phase, int size)
  1012. {
  1013. int ret = 0;
  1014. char devstr[4];
  1015. char buf[ALT_BUF_LEN];
  1016. sprintf(devstr, "%d", phase);
  1017. sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
  1018. ret = dfu_alt_add(dfu, "virt", devstr, buf);
  1019. log_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
  1020. return ret;
  1021. }
  1022. static int dfu_init_entities(struct stm32prog_data *data)
  1023. {
  1024. int ret = 0;
  1025. int phase, i, alt_id;
  1026. struct stm32prog_part_t *part;
  1027. struct dfu_entity *dfu;
  1028. int alt_nb;
  1029. alt_nb = 2; /* number of virtual = CMD, OTP*/
  1030. if (CONFIG_IS_ENABLED(DM_PMIC))
  1031. alt_nb++; /* PMIC NVMEM*/
  1032. if (data->part_nb == 0)
  1033. alt_nb++; /* +1 for FlashLayout */
  1034. else
  1035. for (i = 0; i < data->part_nb; i++) {
  1036. if (data->part_array[i].target != STM32PROG_NONE)
  1037. alt_nb++;
  1038. }
  1039. if (dfu_alt_init(alt_nb, &dfu))
  1040. return -ENODEV;
  1041. puts("DFU alt info setting: ");
  1042. if (data->part_nb) {
  1043. alt_id = 0;
  1044. for (phase = 1;
  1045. (phase <= PHASE_LAST_USER) &&
  1046. (alt_id < alt_nb) && !ret;
  1047. phase++) {
  1048. /* ordering alt setting by phase id */
  1049. part = NULL;
  1050. for (i = 0; i < data->part_nb; i++) {
  1051. if (phase == data->part_array[i].id) {
  1052. part = &data->part_array[i];
  1053. break;
  1054. }
  1055. }
  1056. if (!part)
  1057. continue;
  1058. if (part->target == STM32PROG_NONE)
  1059. continue;
  1060. part->alt_id = alt_id;
  1061. alt_id++;
  1062. ret = stm32prog_alt_add(data, dfu, part);
  1063. }
  1064. } else {
  1065. char buf[ALT_BUF_LEN];
  1066. sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
  1067. PHASE_FLASHLAYOUT, STM32_DDR_BASE);
  1068. ret = dfu_alt_add(dfu, "ram", NULL, buf);
  1069. log_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
  1070. }
  1071. if (!ret)
  1072. ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, CMD_SIZE);
  1073. if (!ret)
  1074. ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, OTP_SIZE);
  1075. if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
  1076. ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, PMIC_SIZE);
  1077. if (ret)
  1078. stm32prog_err("dfu init failed: %d", ret);
  1079. puts("done\n");
  1080. #ifdef DEBUG
  1081. dfu_show_entities();
  1082. #endif
  1083. return ret;
  1084. }
  1085. int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
  1086. long *size)
  1087. {
  1088. log_debug("%s: %x %lx\n", __func__, offset, *size);
  1089. if (!data->otp_part) {
  1090. data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
  1091. if (!data->otp_part)
  1092. return -ENOMEM;
  1093. }
  1094. if (!offset)
  1095. memset(data->otp_part, 0, OTP_SIZE);
  1096. if (offset + *size > OTP_SIZE)
  1097. *size = OTP_SIZE - offset;
  1098. memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
  1099. return 0;
  1100. }
  1101. int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
  1102. long *size)
  1103. {
  1104. int result = 0;
  1105. if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
  1106. stm32prog_err("OTP update not supported");
  1107. return -1;
  1108. }
  1109. log_debug("%s: %x %lx\n", __func__, offset, *size);
  1110. /* alway read for first packet */
  1111. if (!offset) {
  1112. if (!data->otp_part)
  1113. data->otp_part =
  1114. memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
  1115. if (!data->otp_part) {
  1116. result = -ENOMEM;
  1117. goto end_otp_read;
  1118. }
  1119. /* init struct with 0 */
  1120. memset(data->otp_part, 0, OTP_SIZE);
  1121. /* call the service */
  1122. result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
  1123. (u32)data->otp_part, 0);
  1124. if (result)
  1125. goto end_otp_read;
  1126. }
  1127. if (!data->otp_part) {
  1128. result = -ENOMEM;
  1129. goto end_otp_read;
  1130. }
  1131. if (offset + *size > OTP_SIZE)
  1132. *size = OTP_SIZE - offset;
  1133. memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
  1134. end_otp_read:
  1135. log_debug("%s: result %i\n", __func__, result);
  1136. return result;
  1137. }
  1138. int stm32prog_otp_start(struct stm32prog_data *data)
  1139. {
  1140. int result = 0;
  1141. struct arm_smccc_res res;
  1142. if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
  1143. stm32prog_err("OTP update not supported");
  1144. return -1;
  1145. }
  1146. if (!data->otp_part) {
  1147. stm32prog_err("start OTP without data");
  1148. return -1;
  1149. }
  1150. arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
  1151. (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
  1152. if (!res.a0) {
  1153. switch (res.a1) {
  1154. case 0:
  1155. result = 0;
  1156. break;
  1157. case 1:
  1158. stm32prog_err("Provisioning");
  1159. result = 0;
  1160. break;
  1161. default:
  1162. log_err("%s: OTP incorrect value (err = %ld)\n",
  1163. __func__, res.a1);
  1164. result = -EINVAL;
  1165. break;
  1166. }
  1167. } else {
  1168. log_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
  1169. __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
  1170. result = -EINVAL;
  1171. }
  1172. free(data->otp_part);
  1173. data->otp_part = NULL;
  1174. log_debug("%s: result %i\n", __func__, result);
  1175. return result;
  1176. }
  1177. int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
  1178. long *size)
  1179. {
  1180. log_debug("%s: %x %lx\n", __func__, offset, *size);
  1181. if (!offset)
  1182. memset(data->pmic_part, 0, PMIC_SIZE);
  1183. if (offset + *size > PMIC_SIZE)
  1184. *size = PMIC_SIZE - offset;
  1185. memcpy(&data->pmic_part[offset], buffer, *size);
  1186. return 0;
  1187. }
  1188. int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
  1189. long *size)
  1190. {
  1191. int result = 0, ret;
  1192. struct udevice *dev;
  1193. if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
  1194. stm32prog_err("PMIC update not supported");
  1195. return -EOPNOTSUPP;
  1196. }
  1197. log_debug("%s: %x %lx\n", __func__, offset, *size);
  1198. ret = uclass_get_device_by_driver(UCLASS_MISC,
  1199. DM_DRIVER_GET(stpmic1_nvm),
  1200. &dev);
  1201. if (ret)
  1202. return ret;
  1203. /* alway request PMIC for first packet */
  1204. if (!offset) {
  1205. /* init struct with 0 */
  1206. memset(data->pmic_part, 0, PMIC_SIZE);
  1207. ret = uclass_get_device_by_driver(UCLASS_MISC,
  1208. DM_DRIVER_GET(stpmic1_nvm),
  1209. &dev);
  1210. if (ret)
  1211. return ret;
  1212. ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
  1213. if (ret < 0) {
  1214. result = ret;
  1215. goto end_pmic_read;
  1216. }
  1217. if (ret != PMIC_SIZE) {
  1218. result = -EACCES;
  1219. goto end_pmic_read;
  1220. }
  1221. }
  1222. if (offset + *size > PMIC_SIZE)
  1223. *size = PMIC_SIZE - offset;
  1224. memcpy(buffer, &data->pmic_part[offset], *size);
  1225. end_pmic_read:
  1226. log_debug("%s: result %i\n", __func__, result);
  1227. return result;
  1228. }
  1229. int stm32prog_pmic_start(struct stm32prog_data *data)
  1230. {
  1231. int ret;
  1232. struct udevice *dev;
  1233. if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
  1234. stm32prog_err("PMIC update not supported");
  1235. return -EOPNOTSUPP;
  1236. }
  1237. ret = uclass_get_device_by_driver(UCLASS_MISC,
  1238. DM_DRIVER_GET(stpmic1_nvm),
  1239. &dev);
  1240. if (ret)
  1241. return ret;
  1242. return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
  1243. }
  1244. /* copy FSBL on NAND to improve reliability on NAND */
  1245. static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
  1246. {
  1247. int ret, i;
  1248. void *fsbl;
  1249. struct image_header_s header;
  1250. struct raw_header_s raw_header;
  1251. struct dfu_entity *dfu;
  1252. long size, offset;
  1253. if (part->target != STM32PROG_NAND &&
  1254. part->target != STM32PROG_SPI_NAND)
  1255. return -EINVAL;
  1256. dfu = dfu_get_entity(part->alt_id);
  1257. /* read header */
  1258. dfu_transaction_cleanup(dfu);
  1259. size = BL_HEADER_SIZE;
  1260. ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
  1261. if (ret)
  1262. return ret;
  1263. stm32prog_header_check(&raw_header, &header);
  1264. if (header.type != HEADER_STM32IMAGE)
  1265. return -ENOENT;
  1266. /* read header + payload */
  1267. size = header.image_length + BL_HEADER_SIZE;
  1268. size = round_up(size, part->dev->mtd->erasesize);
  1269. fsbl = calloc(1, size);
  1270. if (!fsbl)
  1271. return -ENOMEM;
  1272. ret = dfu->read_medium(dfu, 0, fsbl, &size);
  1273. log_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
  1274. if (ret)
  1275. goto error;
  1276. dfu_transaction_cleanup(dfu);
  1277. offset = 0;
  1278. for (i = part->bin_nb - 1; i > 0; i--) {
  1279. offset += size;
  1280. /* write to the next erase block */
  1281. ret = dfu->write_medium(dfu, offset, fsbl, &size);
  1282. log_debug("%s copy at ofset=%lx size=%lx ret=%d",
  1283. __func__, offset, size, ret);
  1284. if (ret)
  1285. goto error;
  1286. }
  1287. error:
  1288. free(fsbl);
  1289. return ret;
  1290. }
  1291. static void stm32prog_end_phase(struct stm32prog_data *data, u64 offset)
  1292. {
  1293. if (data->phase == PHASE_FLASHLAYOUT) {
  1294. if (parse_flash_layout(data, STM32_DDR_BASE, 0))
  1295. stm32prog_err("Layout: invalid FlashLayout");
  1296. return;
  1297. }
  1298. if (!data->cur_part)
  1299. return;
  1300. if (data->cur_part->target == STM32PROG_RAM) {
  1301. if (data->cur_part->part_type == PART_SYSTEM)
  1302. data->uimage = data->cur_part->addr;
  1303. if (data->cur_part->part_type == PART_FILESYSTEM)
  1304. data->dtb = data->cur_part->addr;
  1305. if (data->cur_part->part_type == PART_BINARY) {
  1306. data->initrd = data->cur_part->addr;
  1307. data->initrd_size = offset;
  1308. }
  1309. }
  1310. if (CONFIG_IS_ENABLED(MMC) &&
  1311. data->cur_part->part_id < 0) {
  1312. char cmdbuf[60];
  1313. sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
  1314. data->cur_part->dev_id, data->cur_part->dev_id,
  1315. -(data->cur_part->part_id));
  1316. if (run_command(cmdbuf, 0)) {
  1317. stm32prog_err("commands '%s' failed", cmdbuf);
  1318. return;
  1319. }
  1320. }
  1321. if (CONFIG_IS_ENABLED(MTD) &&
  1322. data->cur_part->bin_nb > 1) {
  1323. if (stm32prog_copy_fsbl(data->cur_part)) {
  1324. stm32prog_err("%s (0x%x): copy of fsbl failed",
  1325. data->cur_part->name, data->cur_part->id);
  1326. return;
  1327. }
  1328. }
  1329. }
  1330. void stm32prog_do_reset(struct stm32prog_data *data)
  1331. {
  1332. if (data->phase == PHASE_RESET) {
  1333. data->phase = PHASE_DO_RESET;
  1334. puts("Reset requested\n");
  1335. }
  1336. }
  1337. void stm32prog_next_phase(struct stm32prog_data *data)
  1338. {
  1339. int phase, i;
  1340. struct stm32prog_part_t *part;
  1341. bool found;
  1342. phase = data->phase;
  1343. switch (phase) {
  1344. case PHASE_RESET:
  1345. case PHASE_END:
  1346. case PHASE_DO_RESET:
  1347. return;
  1348. }
  1349. /* found next selected partition */
  1350. data->dfu_seq = 0;
  1351. data->cur_part = NULL;
  1352. data->phase = PHASE_END;
  1353. found = false;
  1354. do {
  1355. phase++;
  1356. if (phase > PHASE_LAST_USER)
  1357. break;
  1358. for (i = 0; i < data->part_nb; i++) {
  1359. part = &data->part_array[i];
  1360. if (part->id == phase) {
  1361. if (IS_SELECT(part) && !IS_EMPTY(part)) {
  1362. data->cur_part = part;
  1363. data->phase = phase;
  1364. found = true;
  1365. }
  1366. break;
  1367. }
  1368. }
  1369. } while (!found);
  1370. if (data->phase == PHASE_END)
  1371. puts("Phase=END\n");
  1372. }
  1373. static int part_delete(struct stm32prog_data *data,
  1374. struct stm32prog_part_t *part)
  1375. {
  1376. int ret = 0;
  1377. unsigned long blks, blks_offset, blks_size;
  1378. struct blk_desc *block_dev = NULL;
  1379. char cmdbuf[40];
  1380. char devstr[10];
  1381. printf("Erasing %s ", part->name);
  1382. switch (part->target) {
  1383. case STM32PROG_MMC:
  1384. if (!IS_ENABLED(CONFIG_MMC)) {
  1385. ret = -1;
  1386. stm32prog_err("%s (0x%x): erase invalid",
  1387. part->name, part->id);
  1388. break;
  1389. }
  1390. printf("on mmc %d: ", part->dev->dev_id);
  1391. block_dev = mmc_get_blk_desc(part->dev->mmc);
  1392. blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
  1393. blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
  1394. /* -1 or -2 : delete boot partition of MMC
  1395. * need to switch to associated hwpart 1 or 2
  1396. */
  1397. if (part->part_id < 0)
  1398. if (blk_select_hwpart_devnum(IF_TYPE_MMC,
  1399. part->dev->dev_id,
  1400. -part->part_id))
  1401. return -1;
  1402. blks = blk_derase(block_dev, blks_offset, blks_size);
  1403. /* return to user partition */
  1404. if (part->part_id < 0)
  1405. blk_select_hwpart_devnum(IF_TYPE_MMC,
  1406. part->dev->dev_id, 0);
  1407. if (blks != blks_size) {
  1408. ret = -1;
  1409. stm32prog_err("%s (0x%x): MMC erase failed",
  1410. part->name, part->id);
  1411. }
  1412. break;
  1413. case STM32PROG_NOR:
  1414. case STM32PROG_NAND:
  1415. case STM32PROG_SPI_NAND:
  1416. if (!IS_ENABLED(CONFIG_MTD)) {
  1417. ret = -1;
  1418. stm32prog_err("%s (0x%x): erase invalid",
  1419. part->name, part->id);
  1420. break;
  1421. }
  1422. get_mtd_by_target(devstr, part->target, part->dev->dev_id);
  1423. printf("on %s: ", devstr);
  1424. sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
  1425. devstr, part->addr, part->size);
  1426. if (run_command(cmdbuf, 0)) {
  1427. ret = -1;
  1428. stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
  1429. part->name, part->id, cmdbuf);
  1430. }
  1431. break;
  1432. case STM32PROG_RAM:
  1433. printf("on ram: ");
  1434. memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
  1435. break;
  1436. default:
  1437. ret = -1;
  1438. stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
  1439. break;
  1440. }
  1441. if (!ret)
  1442. printf("done\n");
  1443. return ret;
  1444. }
  1445. static void stm32prog_devices_init(struct stm32prog_data *data)
  1446. {
  1447. int i;
  1448. int ret;
  1449. struct stm32prog_part_t *part;
  1450. ret = treat_partition_list(data);
  1451. if (ret)
  1452. goto error;
  1453. /* initialize the selected device */
  1454. for (i = 0; i < data->dev_nb; i++) {
  1455. ret = init_device(data, &data->dev[i]);
  1456. if (ret)
  1457. goto error;
  1458. }
  1459. /* delete RAW partition before create partition */
  1460. for (i = 0; i < data->part_nb; i++) {
  1461. part = &data->part_array[i];
  1462. if (part->part_type != RAW_IMAGE)
  1463. continue;
  1464. if (!IS_SELECT(part) || !IS_DELETE(part))
  1465. continue;
  1466. ret = part_delete(data, part);
  1467. if (ret)
  1468. goto error;
  1469. }
  1470. if (IS_ENABLED(CONFIG_MMC)) {
  1471. ret = create_gpt_partitions(data);
  1472. if (ret)
  1473. goto error;
  1474. }
  1475. /* delete partition GPT or MTD */
  1476. for (i = 0; i < data->part_nb; i++) {
  1477. part = &data->part_array[i];
  1478. if (part->part_type == RAW_IMAGE)
  1479. continue;
  1480. if (!IS_SELECT(part) || !IS_DELETE(part))
  1481. continue;
  1482. ret = part_delete(data, part);
  1483. if (ret)
  1484. goto error;
  1485. }
  1486. return;
  1487. error:
  1488. data->part_nb = 0;
  1489. }
  1490. int stm32prog_dfu_init(struct stm32prog_data *data)
  1491. {
  1492. /* init device if no error */
  1493. if (data->part_nb)
  1494. stm32prog_devices_init(data);
  1495. if (data->part_nb)
  1496. stm32prog_next_phase(data);
  1497. /* prepare DFU for device read/write */
  1498. dfu_free_entities();
  1499. return dfu_init_entities(data);
  1500. }
  1501. int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
  1502. {
  1503. memset(data, 0x0, sizeof(*data));
  1504. data->read_phase = PHASE_RESET;
  1505. data->phase = PHASE_FLASHLAYOUT;
  1506. return parse_flash_layout(data, addr, size);
  1507. }
  1508. void stm32prog_clean(struct stm32prog_data *data)
  1509. {
  1510. /* clean */
  1511. dfu_free_entities();
  1512. free(data->part_array);
  1513. free(data->otp_part);
  1514. free(data->buffer);
  1515. }
  1516. /* DFU callback: used after serial and direct DFU USB access */
  1517. void dfu_flush_callback(struct dfu_entity *dfu)
  1518. {
  1519. if (!stm32prog_data)
  1520. return;
  1521. if (dfu->dev_type == DFU_DEV_VIRT) {
  1522. if (dfu->data.virt.dev_num == PHASE_OTP)
  1523. stm32prog_otp_start(stm32prog_data);
  1524. else if (dfu->data.virt.dev_num == PHASE_PMIC)
  1525. stm32prog_pmic_start(stm32prog_data);
  1526. return;
  1527. }
  1528. if (dfu->dev_type == DFU_DEV_RAM) {
  1529. if (dfu->alt == 0 &&
  1530. stm32prog_data->phase == PHASE_FLASHLAYOUT) {
  1531. stm32prog_end_phase(stm32prog_data, dfu->offset);
  1532. /* waiting DFU DETACH for reenumeration */
  1533. }
  1534. }
  1535. if (!stm32prog_data->cur_part)
  1536. return;
  1537. if (dfu->alt == stm32prog_data->cur_part->alt_id) {
  1538. stm32prog_end_phase(stm32prog_data, dfu->offset);
  1539. stm32prog_next_phase(stm32prog_data);
  1540. }
  1541. }
  1542. void dfu_initiated_callback(struct dfu_entity *dfu)
  1543. {
  1544. if (!stm32prog_data)
  1545. return;
  1546. if (!stm32prog_data->cur_part)
  1547. return;
  1548. /* force the saved offset for the current partition */
  1549. if (dfu->alt == stm32prog_data->cur_part->alt_id) {
  1550. dfu->offset = stm32prog_data->offset;
  1551. stm32prog_data->dfu_seq = 0;
  1552. log_debug("dfu offset = 0x%llx\n", dfu->offset);
  1553. }
  1554. }
  1555. void dfu_error_callback(struct dfu_entity *dfu, const char *msg)
  1556. {
  1557. struct stm32prog_data *data = stm32prog_data;
  1558. if (!stm32prog_data)
  1559. return;
  1560. if (!stm32prog_data->cur_part)
  1561. return;
  1562. if (dfu->alt == stm32prog_data->cur_part->alt_id)
  1563. stm32prog_err(msg);
  1564. }