atngw100mkii.h 4.1 KB

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  1. /*
  2. * Copyright (C) 2006 Atmel Corporation
  3. *
  4. * Copyright (C) 2012 Andreas Bießmann <andreas@biessmann.org>
  5. *
  6. * Configuration settings for the AVR32 Network Gateway
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #ifndef __CONFIG_H
  11. #define __CONFIG_H
  12. #include <asm/arch/hardware.h>
  13. #define CONFIG_AT32AP
  14. #define CONFIG_AT32AP7000
  15. #define CONFIG_ATNGW100MKII
  16. #define CONFIG_BOARD_EARLY_INIT_F
  17. #define CONFIG_BOARD_EARLY_INIT_R
  18. /*
  19. * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  20. * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
  21. * and the PBA bus to run at 1/4 the PLL frequency.
  22. */
  23. #define CONFIG_PLL
  24. #define CONFIG_SYS_POWER_MANAGER
  25. #define CONFIG_SYS_OSC0_HZ 20000000
  26. #define CONFIG_SYS_PLL0_DIV 1
  27. #define CONFIG_SYS_PLL0_MUL 7
  28. #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  29. /*
  30. * Set the CPU running at:
  31. * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
  32. */
  33. #define CONFIG_SYS_CLKDIV_CPU 0
  34. /*
  35. * Set the HSB running at:
  36. * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
  37. */
  38. #define CONFIG_SYS_CLKDIV_HSB 1
  39. /*
  40. * Set the PBA running at:
  41. * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
  42. */
  43. #define CONFIG_SYS_CLKDIV_PBA 2
  44. /*
  45. * Set the PBB running at:
  46. * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
  47. */
  48. #define CONFIG_SYS_CLKDIV_PBB 1
  49. /* Reserve VM regions for NOR flash, NAND flash and SDRAM */
  50. #define CONFIG_SYS_NR_VM_REGIONS 3
  51. /*
  52. * The PLLOPT register controls the PLL like this:
  53. * icp = PLLOPT<2>
  54. * ivco = PLLOPT<1:0>
  55. *
  56. * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  57. */
  58. #define CONFIG_SYS_PLL0_OPT 0x04
  59. #define CONFIG_USART_BASE ATMEL_BASE_USART1
  60. #define CONFIG_USART_ID 1
  61. /* User serviceable stuff */
  62. #define CONFIG_DOS_PARTITION
  63. #define CONFIG_CMDLINE_TAG
  64. #define CONFIG_SETUP_MEMORY_TAGS
  65. #define CONFIG_INITRD_TAG
  66. #define CONFIG_STACKSIZE (2048)
  67. #define CONFIG_BAUDRATE 115200
  68. #define CONFIG_BOOTARGS \
  69. "root=mtd:main rootfstype=jffs2"
  70. #define CONFIG_BOOTCOMMAND \
  71. "fsload 0x10400000 /uImage; bootm"
  72. #define CONFIG_BOOTDELAY 1
  73. /*
  74. * After booting the board for the first time, new ethernet addresses
  75. * should be generated and assigned to the environment variables
  76. * "ethaddr" and "eth1addr". This is normally done during production.
  77. */
  78. #define CONFIG_OVERWRITE_ETHADDR_ONCE
  79. /*
  80. * BOOTP/DHCP options
  81. */
  82. #define CONFIG_BOOTP_SUBNETMASK
  83. #define CONFIG_BOOTP_GATEWAY
  84. /*
  85. * Command line configuration.
  86. */
  87. #define CONFIG_CMD_JFFS2
  88. #define CONFIG_ATMEL_USART
  89. #define CONFIG_MACB
  90. #define CONFIG_PORTMUX_PIO
  91. #define CONFIG_SYS_NR_PIOS 5
  92. #define CONFIG_SYS_HSDRAMC
  93. #define CONFIG_MMC
  94. #define CONFIG_GENERIC_ATMEL_MCI
  95. #define CONFIG_GENERIC_MMC
  96. #define CONFIG_ATMEL_SPI
  97. #define CONFIG_SYS_DCACHE_LINESZ 32
  98. #define CONFIG_SYS_ICACHE_LINESZ 32
  99. #define CONFIG_NR_DRAM_BANKS 1
  100. #define CONFIG_SYS_FLASH_CFI
  101. #define CONFIG_FLASH_CFI_DRIVER
  102. #define CONFIG_SYS_FLASH_PROTECTION
  103. #define CONFIG_SYS_FLASH_BASE 0x00000000
  104. #define CONFIG_SYS_FLASH_SIZE 0x800000
  105. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  106. #define CONFIG_SYS_MAX_FLASH_SECT 135
  107. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  108. #define CONFIG_SYS_TEXT_BASE 0x00000000
  109. #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
  110. #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
  111. #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
  112. #define CONFIG_ENV_IS_IN_FLASH
  113. #define CONFIG_ENV_SIZE 65536
  114. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
  115. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
  116. #define CONFIG_SYS_MALLOC_LEN (256*1024)
  117. /* Allow 4MB for the kernel run-time image */
  118. #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
  119. #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
  120. /* Other configuration settings that shouldn't have to change all that often */
  121. #define CONFIG_SYS_CBSIZE 256
  122. #define CONFIG_SYS_MAXARGS 16
  123. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  124. #define CONFIG_SYS_LONGHELP
  125. #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
  126. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
  127. #define CONFIG_MTD_DEVICE
  128. #define CONFIG_MTD_PARTITIONS
  129. #endif /* __CONFIG_H */