fpga.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000, 2001
  4. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  5. */
  6. /*
  7. * FPGA support
  8. */
  9. #include <common.h>
  10. #include <command.h>
  11. #include <env.h>
  12. #include <fpga.h>
  13. #include <fs.h>
  14. #include <gzip.h>
  15. #include <image.h>
  16. #include <malloc.h>
  17. static long do_fpga_get_device(char *arg)
  18. {
  19. long dev = FPGA_INVALID_DEVICE;
  20. char *devstr = env_get("fpga");
  21. if (devstr)
  22. /* Should be strtol to handle -1 cases */
  23. dev = simple_strtol(devstr, NULL, 16);
  24. if (dev == FPGA_INVALID_DEVICE && arg)
  25. dev = simple_strtol(arg, NULL, 16);
  26. debug("%s: device = %ld\n", __func__, dev);
  27. return dev;
  28. }
  29. static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
  30. struct cmd_tbl *cmdtp, int argc,
  31. char *const argv[])
  32. {
  33. size_t local_data_size;
  34. long local_fpga_data;
  35. debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
  36. if (argc != cmdtp->maxargs) {
  37. debug("fpga: incorrect parameters passed\n");
  38. return CMD_RET_USAGE;
  39. }
  40. *dev = do_fpga_get_device(argv[0]);
  41. local_fpga_data = simple_strtol(argv[1], NULL, 16);
  42. if (!local_fpga_data) {
  43. debug("fpga: zero fpga_data address\n");
  44. return CMD_RET_USAGE;
  45. }
  46. *fpga_data = local_fpga_data;
  47. local_data_size = simple_strtoul(argv[2], NULL, 16);
  48. if (!local_data_size) {
  49. debug("fpga: zero size\n");
  50. return CMD_RET_USAGE;
  51. }
  52. *data_size = local_data_size;
  53. return 0;
  54. }
  55. #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
  56. int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  57. {
  58. size_t data_size = 0;
  59. long fpga_data, dev;
  60. int ret;
  61. struct fpga_secure_info fpga_sec_info;
  62. memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
  63. if (argc < 5) {
  64. debug("fpga: incorrect parameters passed\n");
  65. return CMD_RET_USAGE;
  66. }
  67. if (argc == 6)
  68. fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
  69. simple_strtoull(argv[5],
  70. NULL, 16);
  71. else
  72. /*
  73. * If 6th parameter is not passed then do_fpga_check_params
  74. * will get 5 instead of expected 6 which means that function
  75. * return CMD_RET_USAGE. Increase number of params +1 to pass
  76. * this.
  77. */
  78. argc++;
  79. fpga_sec_info.encflag = (u8)simple_strtoul(argv[4], NULL, 16);
  80. fpga_sec_info.authflag = (u8)simple_strtoul(argv[3], NULL, 16);
  81. if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
  82. fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
  83. debug("fpga: Use <fpga load> for NonSecure bitstream\n");
  84. return CMD_RET_USAGE;
  85. }
  86. if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
  87. !fpga_sec_info.userkey_addr) {
  88. debug("fpga: User key not provided\n");
  89. return CMD_RET_USAGE;
  90. }
  91. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  92. cmdtp, argc, argv);
  93. if (ret)
  94. return ret;
  95. return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
  96. }
  97. #endif
  98. #if defined(CONFIG_CMD_FPGA_LOADFS)
  99. static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
  100. char *const argv[])
  101. {
  102. size_t data_size = 0;
  103. long fpga_data, dev;
  104. int ret;
  105. fpga_fs_info fpga_fsinfo;
  106. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  107. cmdtp, argc, argv);
  108. if (ret)
  109. return ret;
  110. fpga_fsinfo.fstype = FS_TYPE_ANY;
  111. fpga_fsinfo.blocksize = (unsigned int)simple_strtoul(argv[3], NULL, 16);
  112. fpga_fsinfo.interface = argv[4];
  113. fpga_fsinfo.dev_part = argv[5];
  114. fpga_fsinfo.filename = argv[6];
  115. return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
  116. }
  117. #endif
  118. static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
  119. char *const argv[])
  120. {
  121. long dev = do_fpga_get_device(argv[0]);
  122. return fpga_info(dev);
  123. }
  124. static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
  125. char *const argv[])
  126. {
  127. size_t data_size = 0;
  128. long fpga_data, dev;
  129. int ret;
  130. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  131. cmdtp, argc, argv);
  132. if (ret)
  133. return ret;
  134. return fpga_dump(dev, (void *)fpga_data, data_size);
  135. }
  136. static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
  137. char *const argv[])
  138. {
  139. size_t data_size = 0;
  140. long fpga_data, dev;
  141. int ret;
  142. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  143. cmdtp, argc, argv);
  144. if (ret)
  145. return ret;
  146. return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
  147. }
  148. static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
  149. char *const argv[])
  150. {
  151. size_t data_size = 0;
  152. long fpga_data, dev;
  153. int ret;
  154. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  155. cmdtp, argc, argv);
  156. if (ret)
  157. return ret;
  158. return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
  159. }
  160. #if defined(CONFIG_CMD_FPGA_LOADP)
  161. static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
  162. char *const argv[])
  163. {
  164. size_t data_size = 0;
  165. long fpga_data, dev;
  166. int ret;
  167. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  168. cmdtp, argc, argv);
  169. if (ret)
  170. return ret;
  171. return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
  172. }
  173. #endif
  174. #if defined(CONFIG_CMD_FPGA_LOADBP)
  175. static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
  176. char *const argv[])
  177. {
  178. size_t data_size = 0;
  179. long fpga_data, dev;
  180. int ret;
  181. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  182. cmdtp, argc, argv);
  183. if (ret)
  184. return ret;
  185. return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
  186. BIT_PARTIAL);
  187. }
  188. #endif
  189. #if defined(CONFIG_CMD_FPGA_LOADMK)
  190. static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
  191. char *const argv[])
  192. {
  193. size_t data_size = 0;
  194. void *fpga_data = NULL;
  195. #if defined(CONFIG_FIT)
  196. const char *fit_uname = NULL;
  197. ulong fit_addr;
  198. #endif
  199. ulong dev = do_fpga_get_device(argv[0]);
  200. char *datastr = env_get("fpgadata");
  201. debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
  202. if (dev == FPGA_INVALID_DEVICE) {
  203. debug("fpga: Invalid fpga device\n");
  204. return CMD_RET_USAGE;
  205. }
  206. if (argc == 0 && !datastr) {
  207. debug("fpga: No datastr passed\n");
  208. return CMD_RET_USAGE;
  209. }
  210. if (argc == 2) {
  211. datastr = argv[1];
  212. debug("fpga: Full command with two args\n");
  213. } else if (argc == 1 && !datastr) {
  214. debug("fpga: Dev is setup - fpgadata passed\n");
  215. datastr = argv[0];
  216. }
  217. #if defined(CONFIG_FIT)
  218. if (fit_parse_subimage(datastr, (ulong)fpga_data,
  219. &fit_addr, &fit_uname)) {
  220. fpga_data = (void *)fit_addr;
  221. debug("* fpga: subimage '%s' from FIT image ",
  222. fit_uname);
  223. debug("at 0x%08lx\n", fit_addr);
  224. } else
  225. #endif
  226. {
  227. fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
  228. debug("* fpga: cmdline image address = 0x%08lx\n",
  229. (ulong)fpga_data);
  230. }
  231. debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
  232. if (!fpga_data) {
  233. puts("Zero fpga_data address\n");
  234. return CMD_RET_USAGE;
  235. }
  236. switch (genimg_get_format(fpga_data)) {
  237. #if defined(CONFIG_LEGACY_IMAGE_FORMAT)
  238. case IMAGE_FORMAT_LEGACY:
  239. {
  240. image_header_t *hdr = (image_header_t *)fpga_data;
  241. ulong data;
  242. u8 comp;
  243. comp = image_get_comp(hdr);
  244. if (comp == IH_COMP_GZIP) {
  245. #if defined(CONFIG_GZIP)
  246. ulong image_buf = image_get_data(hdr);
  247. ulong image_size = ~0UL;
  248. data = image_get_load(hdr);
  249. if (gunzip((void *)data, ~0UL, (void *)image_buf,
  250. &image_size) != 0) {
  251. puts("GUNZIP: error\n");
  252. return CMD_RET_FAILURE;
  253. }
  254. data_size = image_size;
  255. #else
  256. puts("Gunzip image is not supported\n");
  257. return 1;
  258. #endif
  259. } else {
  260. data = (ulong)image_get_data(hdr);
  261. data_size = image_get_data_size(hdr);
  262. }
  263. return fpga_load(dev, (void *)data, data_size,
  264. BIT_FULL);
  265. }
  266. #endif
  267. #if defined(CONFIG_FIT)
  268. case IMAGE_FORMAT_FIT:
  269. {
  270. const void *fit_hdr = (const void *)fpga_data;
  271. int noffset;
  272. const void *fit_data;
  273. if (!fit_uname) {
  274. puts("No FIT subimage unit name\n");
  275. return CMD_RET_FAILURE;
  276. }
  277. if (!fit_check_format(fit_hdr)) {
  278. puts("Bad FIT image format\n");
  279. return CMD_RET_FAILURE;
  280. }
  281. /* get fpga component image node offset */
  282. noffset = fit_image_get_node(fit_hdr, fit_uname);
  283. if (noffset < 0) {
  284. printf("Can't find '%s' FIT subimage\n", fit_uname);
  285. return CMD_RET_FAILURE;
  286. }
  287. /* verify integrity */
  288. if (!fit_image_verify(fit_hdr, noffset)) {
  289. puts("Bad Data Hash\n");
  290. return CMD_RET_FAILURE;
  291. }
  292. /* get fpga subimage/external data address and length */
  293. if (fit_image_get_data_and_size(fit_hdr, noffset,
  294. &fit_data, &data_size)) {
  295. puts("Fpga subimage data not found\n");
  296. return CMD_RET_FAILURE;
  297. }
  298. return fpga_load(dev, fit_data, data_size, BIT_FULL);
  299. }
  300. #endif
  301. default:
  302. puts("** Unknown image type\n");
  303. return CMD_RET_FAILURE;
  304. }
  305. }
  306. #endif
  307. static struct cmd_tbl fpga_commands[] = {
  308. U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
  309. U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
  310. U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
  311. U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
  312. #if defined(CONFIG_CMD_FPGA_LOADP)
  313. U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
  314. #endif
  315. #if defined(CONFIG_CMD_FPGA_LOADBP)
  316. U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
  317. #endif
  318. #if defined(CONFIG_CMD_FPGA_LOADFS)
  319. U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
  320. #endif
  321. #if defined(CONFIG_CMD_FPGA_LOADMK)
  322. U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
  323. #endif
  324. #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
  325. U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
  326. #endif
  327. };
  328. static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
  329. char *const argv[])
  330. {
  331. struct cmd_tbl *fpga_cmd;
  332. int ret;
  333. if (argc < 2)
  334. return CMD_RET_USAGE;
  335. fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
  336. ARRAY_SIZE(fpga_commands));
  337. if (!fpga_cmd) {
  338. debug("fpga: non existing command\n");
  339. return CMD_RET_USAGE;
  340. }
  341. argc -= 2;
  342. argv += 2;
  343. if (argc > fpga_cmd->maxargs) {
  344. debug("fpga: more parameters passed\n");
  345. return CMD_RET_USAGE;
  346. }
  347. ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
  348. return cmd_process_error(fpga_cmd, ret);
  349. }
  350. #if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
  351. U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
  352. #else
  353. U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
  354. #endif
  355. "loadable FPGA image support",
  356. "[operation type] [device number] [image address] [image size]\n"
  357. "fpga operations:\n"
  358. " dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
  359. " info\t[dev]\t\t\tlist known device information\n"
  360. " load\t[dev] [address] [size]\tLoad device from memory buffer\n"
  361. #if defined(CONFIG_CMD_FPGA_LOADP)
  362. " loadp\t[dev] [address] [size]\t"
  363. "Load device from memory buffer with partial bitstream\n"
  364. #endif
  365. " loadb\t[dev] [address] [size]\t"
  366. "Load device from bitstream buffer (Xilinx only)\n"
  367. #if defined(CONFIG_CMD_FPGA_LOADBP)
  368. " loadbp\t[dev] [address] [size]\t"
  369. "Load device from bitstream buffer with partial bitstream"
  370. "(Xilinx only)\n"
  371. #endif
  372. #if defined(CONFIG_CMD_FPGA_LOADFS)
  373. "Load device from filesystem (FAT by default) (Xilinx only)\n"
  374. " loadfs [dev] [address] [image size] [blocksize] <interface>\n"
  375. " [<dev[:part]>] <filename>\n"
  376. #endif
  377. #if defined(CONFIG_CMD_FPGA_LOADMK)
  378. " loadmk [dev] [address]\tLoad device generated with mkimage"
  379. #if defined(CONFIG_FIT)
  380. "\n"
  381. "\tFor loadmk operating on FIT format uImage address must include\n"
  382. "\tsubimage unit name in the form of addr:<subimg_uname>"
  383. #endif
  384. #endif
  385. #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
  386. "Load encrypted bitstream (Xilinx only)\n"
  387. " loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
  388. " [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
  389. "Loads the secure bistreams(authenticated/encrypted/both\n"
  390. "authenticated and encrypted) of [size] from [address].\n"
  391. "The auth-OCM/DDR flag specifies to perform authentication\n"
  392. "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
  393. "The enc flag specifies which key to be used for decryption\n"
  394. "0-device key, 1-user key, 2-no encryption.\n"
  395. "The optional Userkey address specifies from which address key\n"
  396. "has to be used for decryption if user key is selected.\n"
  397. "NOTE: the secure bitstream has to be created using Xilinx\n"
  398. "bootgen tool only.\n"
  399. #endif
  400. );