netspace_v2.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
  4. *
  5. * Based on Kirkwood support:
  6. * (C) Copyright 2009
  7. * Marvell Semiconductor <www.marvell.com>
  8. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  9. */
  10. #include <common.h>
  11. #include <command.h>
  12. #include <env.h>
  13. #include <init.h>
  14. #include <net.h>
  15. #include <asm/mach-types.h>
  16. #include <asm/arch/cpu.h>
  17. #include <asm/arch/soc.h>
  18. #include <asm/arch/mpp.h>
  19. #include <asm/arch/gpio.h>
  20. #include "netspace_v2.h"
  21. #include "../common/common.h"
  22. DECLARE_GLOBAL_DATA_PTR;
  23. int board_early_init_f(void)
  24. {
  25. /* Gpio configuration */
  26. mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
  27. NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
  28. /* Multi-Purpose Pins Functionality configuration */
  29. static const u32 kwmpp_config[] = {
  30. MPP0_SPI_SCn,
  31. MPP1_SPI_MOSI,
  32. MPP2_SPI_SCK,
  33. MPP3_SPI_MISO,
  34. MPP4_NF_IO6,
  35. MPP5_NF_IO7,
  36. MPP6_SYSRST_OUTn,
  37. MPP7_GPO, /* Fan speed (bit 1) */
  38. MPP8_TW_SDA,
  39. MPP9_TW_SCK,
  40. MPP10_UART0_TXD,
  41. MPP11_UART0_RXD,
  42. MPP12_GPO, /* Red led */
  43. MPP14_GPIO, /* USB fuse */
  44. MPP16_GPIO, /* SATA 0 power */
  45. MPP17_GPIO, /* SATA 1 power */
  46. MPP18_NF_IO0,
  47. MPP19_NF_IO1,
  48. MPP20_SATA1_ACTn,
  49. MPP21_SATA0_ACTn,
  50. MPP22_GPIO, /* Fan speed (bit 0) */
  51. MPP23_GPIO, /* Fan power */
  52. MPP24_GPIO, /* USB mode select */
  53. MPP25_GPIO, /* Fan rotation fail */
  54. MPP26_GPIO, /* USB vbus-in detection */
  55. MPP28_GPIO, /* USB enable vbus-out */
  56. MPP29_GPIO, /* Blue led (slow register) */
  57. MPP30_GPIO, /* Blue led (command register) */
  58. MPP31_GPIO, /* Board power off */
  59. MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */
  60. MPP33_GPIO, /* Fan speed (bit 2) */
  61. 0
  62. };
  63. kirkwood_mpp_conf(kwmpp_config, NULL);
  64. return 0;
  65. }
  66. int board_init(void)
  67. {
  68. /* Machine number */
  69. gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
  70. /* Boot parameters address */
  71. gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  72. return 0;
  73. }
  74. #if defined(CONFIG_MISC_INIT_R)
  75. int misc_init_r(void)
  76. {
  77. #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
  78. if (!env_get("ethaddr")) {
  79. uchar mac[6];
  80. if (lacie_read_mac_address(mac) == 0)
  81. eth_env_set_enetaddr("ethaddr", mac);
  82. }
  83. #endif
  84. return 0;
  85. }
  86. #endif
  87. #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
  88. /* Configure and initialize PHY */
  89. void reset_phy(void)
  90. {
  91. #if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
  92. mv_phy_88e1318_init("egiga0", 0);
  93. #else
  94. mv_phy_88e1116_init("egiga0", 8);
  95. #endif
  96. }
  97. #endif
  98. #if defined(CONFIG_KIRKWOOD_GPIO)
  99. /* Return GPIO button status */
  100. static int
  101. do_read_button(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  102. {
  103. return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
  104. }
  105. U_BOOT_CMD(button, 1, 1, do_read_button,
  106. "Return GPIO button status 0=off 1=on", "");
  107. #endif