net2big_v2.c 6.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
  4. *
  5. * Based on Kirkwood support:
  6. * (C) Copyright 2009
  7. * Marvell Semiconductor <www.marvell.com>
  8. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  9. */
  10. #include <common.h>
  11. #include <command.h>
  12. #include <env.h>
  13. #include <i2c.h>
  14. #include <init.h>
  15. #include <net.h>
  16. #include <asm/mach-types.h>
  17. #include <asm/arch/cpu.h>
  18. #include <asm/arch/soc.h>
  19. #include <asm/arch/mpp.h>
  20. #include <asm/arch/gpio.h>
  21. #include "net2big_v2.h"
  22. #include "../common/common.h"
  23. #include "../common/cpld-gpio-bus.h"
  24. DECLARE_GLOBAL_DATA_PTR;
  25. int board_early_init_f(void)
  26. {
  27. /* GPIO configuration */
  28. mvebu_config_gpio(NET2BIG_V2_OE_VAL_LOW, NET2BIG_V2_OE_VAL_HIGH,
  29. NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH);
  30. /* Multi-Purpose Pins Functionality configuration */
  31. static const u32 kwmpp_config[] = {
  32. MPP0_SPI_SCn,
  33. MPP1_SPI_MOSI,
  34. MPP2_SPI_SCK,
  35. MPP3_SPI_MISO,
  36. MPP6_SYSRST_OUTn,
  37. MPP7_GPO, /* Request power-off */
  38. MPP8_TW_SDA,
  39. MPP9_TW_SCK,
  40. MPP10_UART0_TXD,
  41. MPP11_UART0_RXD,
  42. MPP13_GPIO, /* Rear power switch (on|auto) */
  43. MPP14_GPIO, /* USB fuse alarm */
  44. MPP15_GPIO, /* Rear power switch (auto|off) */
  45. MPP16_GPIO, /* SATA HDD1 power */
  46. MPP17_GPIO, /* SATA HDD2 power */
  47. MPP20_SATA1_ACTn,
  48. MPP21_SATA0_ACTn,
  49. MPP24_GPIO, /* USB mode select */
  50. MPP26_GPIO, /* USB device vbus */
  51. MPP28_GPIO, /* USB enable host vbus */
  52. MPP29_GPIO, /* CPLD GPIO bus ALE */
  53. MPP34_GPIO, /* Rear Push button 0=on 1=off */
  54. MPP35_GPIO, /* Inhibit switch power-off */
  55. MPP36_GPIO, /* SATA HDD1 presence */
  56. MPP37_GPIO, /* SATA HDD2 presence */
  57. MPP40_GPIO, /* eSATA presence */
  58. MPP44_GPIO, /* CPLD GPIO bus (data 0) */
  59. MPP45_GPIO, /* CPLD GPIO bus (data 1) */
  60. MPP46_GPIO, /* CPLD GPIO bus (data 2) */
  61. MPP47_GPIO, /* CPLD GPIO bus (addr 0) */
  62. MPP48_GPIO, /* CPLD GPIO bus (addr 1) */
  63. MPP49_GPIO, /* CPLD GPIO bus (addr 2) */
  64. 0
  65. };
  66. kirkwood_mpp_conf(kwmpp_config, NULL);
  67. return 0;
  68. }
  69. int board_init(void)
  70. {
  71. /* Machine number */
  72. gd->bd->bi_arch_number = MACH_TYPE_NET2BIG_V2;
  73. /* Boot parameters address */
  74. gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  75. return 0;
  76. }
  77. #if defined(CONFIG_MISC_INIT_R)
  78. #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_G762_ADDR)
  79. /*
  80. * Start I2C fan (GMT G762 controller)
  81. */
  82. static void init_fan(void)
  83. {
  84. u8 data;
  85. i2c_set_bus_num(0);
  86. /* Enable open-loop and PWM modes */
  87. data = 0x20;
  88. if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
  89. G762_REG_FAN_CMD1, 1, &data, 1) != 0)
  90. goto err;
  91. data = 0;
  92. if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
  93. G762_REG_SET_CNT, 1, &data, 1) != 0)
  94. goto err;
  95. /*
  96. * RPM to PWM (set_out register) fan speed conversion array:
  97. * 0 0x00
  98. * 1500 0x04
  99. * 2800 0x08
  100. * 3400 0x0C
  101. * 3700 0x10
  102. * 4400 0x20
  103. * 4700 0x30
  104. * 4800 0x50
  105. * 5200 0x80
  106. * 5400 0xC0
  107. * 5500 0xFF
  108. *
  109. * Start fan at low speed (2800 RPM):
  110. */
  111. data = 0x08;
  112. if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
  113. G762_REG_SET_OUT, 1, &data, 1) != 0)
  114. goto err;
  115. return;
  116. err:
  117. printf("Error: failed to start I2C fan @%02x\n",
  118. CONFIG_SYS_I2C_G762_ADDR);
  119. }
  120. #else
  121. static void init_fan(void) {}
  122. #endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_G762_ADDR */
  123. #if defined(CONFIG_NET2BIG_V2) && defined(CONFIG_KIRKWOOD_GPIO)
  124. /*
  125. * CPLD GPIO bus:
  126. *
  127. * - address register : bit [0-2] -> GPIO [47-49]
  128. * - data register : bit [0-2] -> GPIO [44-46]
  129. * - enable register : GPIO 29
  130. */
  131. static unsigned cpld_gpio_bus_addr[] = { 47, 48, 49 };
  132. static unsigned cpld_gpio_bus_data[] = { 44, 45, 46 };
  133. static struct cpld_gpio_bus cpld_gpio_bus = {
  134. .addr = cpld_gpio_bus_addr,
  135. .num_addr = ARRAY_SIZE(cpld_gpio_bus_addr),
  136. .data = cpld_gpio_bus_data,
  137. .num_data = ARRAY_SIZE(cpld_gpio_bus_data),
  138. .enable = 29,
  139. };
  140. /*
  141. * LEDs configuration:
  142. *
  143. * The LEDs are controlled by a CPLD and can be configured through
  144. * the CPLD GPIO bus.
  145. *
  146. * Address register selection:
  147. *
  148. * addr | register
  149. * ----------------------------
  150. * 0 | front LED
  151. * 1 | front LED brightness
  152. * 2 | SATA LED brightness
  153. * 3 | SATA0 LED
  154. * 4 | SATA1 LED
  155. * 5 | SATA2 LED
  156. * 6 | SATA3 LED
  157. * 7 | SATA4 LED
  158. *
  159. * Data register configuration:
  160. *
  161. * data | LED brightness
  162. * -------------------------------------------------
  163. * 0 | min (off)
  164. * - | -
  165. * 7 | max
  166. *
  167. * data | front LED mode
  168. * -------------------------------------------------
  169. * 0 | fix off
  170. * 1 | fix blue on
  171. * 2 | fix red on
  172. * 3 | blink blue on=1 sec and blue off=1 sec
  173. * 4 | blink red on=1 sec and red off=1 sec
  174. * 5 | blink blue on=2.5 sec and red on=0.5 sec
  175. * 6 | blink blue on=1 sec and red on=1 sec
  176. * 7 | blink blue on=0.5 sec and blue off=2.5 sec
  177. *
  178. * data | SATA LED mode
  179. * -------------------------------------------------
  180. * 0 | fix off
  181. * 1 | SATA activity blink
  182. * 2 | fix red on
  183. * 3 | blink blue on=1 sec and blue off=1 sec
  184. * 4 | blink red on=1 sec and red off=1 sec
  185. * 5 | blink blue on=2.5 sec and red on=0.5 sec
  186. * 6 | blink blue on=1 sec and red on=1 sec
  187. * 7 | fix blue on
  188. */
  189. static void init_leds(void)
  190. {
  191. /* Enable the front blue LED */
  192. cpld_gpio_bus_write(&cpld_gpio_bus, 0, 1);
  193. cpld_gpio_bus_write(&cpld_gpio_bus, 1, 3);
  194. /* Configure SATA LEDs to blink in relation with the SATA activity */
  195. cpld_gpio_bus_write(&cpld_gpio_bus, 3, 1);
  196. cpld_gpio_bus_write(&cpld_gpio_bus, 4, 1);
  197. cpld_gpio_bus_write(&cpld_gpio_bus, 2, 3);
  198. }
  199. #else
  200. static void init_leds(void) {}
  201. #endif /* CONFIG_NET2BIG_V2 && CONFIG_KIRKWOOD_GPIO */
  202. int misc_init_r(void)
  203. {
  204. init_fan();
  205. #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
  206. if (!env_get("ethaddr")) {
  207. uchar mac[6];
  208. if (lacie_read_mac_address(mac) == 0)
  209. eth_env_set_enetaddr("ethaddr", mac);
  210. }
  211. #endif
  212. init_leds();
  213. return 0;
  214. }
  215. #endif /* CONFIG_MISC_INIT_R */
  216. #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
  217. /* Configure and initialize PHY */
  218. void reset_phy(void)
  219. {
  220. mv_phy_88e1116_init("egiga0", 8);
  221. }
  222. #endif
  223. #if defined(CONFIG_KIRKWOOD_GPIO)
  224. /* Return GPIO push button status */
  225. static int
  226. do_read_push_button(struct cmd_tbl *cmdtp, int flag, int argc,
  227. char *const argv[])
  228. {
  229. return !kw_gpio_get_value(NET2BIG_V2_GPIO_PUSH_BUTTON);
  230. }
  231. U_BOOT_CMD(button, 1, 1, do_read_push_button,
  232. "Return GPIO push button status 0=off 1=on", "");
  233. #endif