immap.c 8.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. /*
  7. * MPC8xx Internal Memory Map Functions
  8. */
  9. #include <common.h>
  10. #include <command.h>
  11. #include <asm/immap_8xx.h>
  12. #include <asm/cpm_8xx.h>
  13. #include <asm/iopin_8xx.h>
  14. #include <asm/io.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. static int do_siuinfo(struct cmd_tbl *cmdtp, int flag, int argc,
  17. char *const argv[])
  18. {
  19. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  20. sysconf8xx_t __iomem *sc = &immap->im_siu_conf;
  21. printf("SIUMCR= %08x SYPCR = %08x\n",
  22. in_be32(&sc->sc_siumcr), in_be32(&sc->sc_sypcr));
  23. printf("SWT = %08x\n", in_be32(&sc->sc_swt));
  24. printf("SIPEND= %08x SIMASK= %08x\n",
  25. in_be32(&sc->sc_sipend), in_be32(&sc->sc_simask));
  26. printf("SIEL = %08x SIVEC = %08x\n",
  27. in_be32(&sc->sc_siel), in_be32(&sc->sc_sivec));
  28. printf("TESR = %08x SDCR = %08x\n",
  29. in_be32(&sc->sc_tesr), in_be32(&sc->sc_sdcr));
  30. return 0;
  31. }
  32. static int do_memcinfo(struct cmd_tbl *cmdtp, int flag, int argc,
  33. char *const argv[])
  34. {
  35. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  36. memctl8xx_t __iomem *memctl = &immap->im_memctl;
  37. int nbanks = 8;
  38. uint __iomem *p = &memctl->memc_br0;
  39. int i;
  40. for (i = 0; i < nbanks; i++, p += 2)
  41. printf("BR%-2d = %08x OR%-2d = %08x\n",
  42. i, in_be32(p), i, in_be32(p + 1));
  43. printf("MAR = %08x", in_be32(&memctl->memc_mar));
  44. printf(" MCR = %08x\n", in_be32(&memctl->memc_mcr));
  45. printf("MAMR = %08x MBMR = %08x",
  46. in_be32(&memctl->memc_mamr), in_be32(&memctl->memc_mbmr));
  47. printf("\nMSTAT = %04x\n", in_be16(&memctl->memc_mstat));
  48. printf("MPTPR = %04x MDR = %08x\n",
  49. in_be16(&memctl->memc_mptpr), in_be32(&memctl->memc_mdr));
  50. return 0;
  51. }
  52. static int do_carinfo(struct cmd_tbl *cmdtp, int flag, int argc,
  53. char *const argv[])
  54. {
  55. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  56. car8xx_t __iomem *car = &immap->im_clkrst;
  57. printf("SCCR = %08x\n", in_be32(&car->car_sccr));
  58. printf("PLPRCR= %08x\n", in_be32(&car->car_plprcr));
  59. printf("RSR = %08x\n", in_be32(&car->car_rsr));
  60. return 0;
  61. }
  62. static int counter;
  63. static void header(void)
  64. {
  65. char *data = "\
  66. -------------------------------- --------------------------------\
  67. 00000000001111111111222222222233 00000000001111111111222222222233\
  68. 01234567890123456789012345678901 01234567890123456789012345678901\
  69. -------------------------------- --------------------------------\
  70. ";
  71. int i;
  72. if (counter % 2)
  73. putc('\n');
  74. counter = 0;
  75. for (i = 0; i < 4; i++, data += 79)
  76. printf("%.79s\n", data);
  77. }
  78. static void binary(char *label, uint value, int nbits)
  79. {
  80. uint mask = 1 << (nbits - 1);
  81. int i, second = (counter++ % 2);
  82. if (second)
  83. putc(' ');
  84. puts(label);
  85. for (i = 32 + 1; i != nbits; i--)
  86. putc(' ');
  87. while (mask != 0) {
  88. if (value & mask)
  89. putc('1');
  90. else
  91. putc('0');
  92. mask >>= 1;
  93. }
  94. if (second)
  95. putc('\n');
  96. }
  97. #define PA_NBITS 16
  98. #define PA_NB_ODR 8
  99. #define PB_NBITS 18
  100. #define PB_NB_ODR 16
  101. #define PC_NBITS 12
  102. #define PD_NBITS 13
  103. static int do_iopinfo(struct cmd_tbl *cmdtp, int flag, int argc,
  104. char *const argv[])
  105. {
  106. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  107. iop8xx_t __iomem *iop = &immap->im_ioport;
  108. ushort __iomem *l, *r;
  109. uint __iomem *R;
  110. counter = 0;
  111. header();
  112. /*
  113. * Ports A & B
  114. */
  115. l = &iop->iop_padir;
  116. R = &immap->im_cpm.cp_pbdir;
  117. binary("PA_DIR", in_be16(l++), PA_NBITS);
  118. binary("PB_DIR", in_be32(R++), PB_NBITS);
  119. binary("PA_PAR", in_be16(l++), PA_NBITS);
  120. binary("PB_PAR", in_be32(R++), PB_NBITS);
  121. binary("PA_ODR", in_be16(l++), PA_NB_ODR);
  122. binary("PB_ODR", in_be32(R++), PB_NB_ODR);
  123. binary("PA_DAT", in_be16(l++), PA_NBITS);
  124. binary("PB_DAT", in_be32(R++), PB_NBITS);
  125. header();
  126. /*
  127. * Ports C & D
  128. */
  129. l = &iop->iop_pcdir;
  130. r = &iop->iop_pddir;
  131. binary("PC_DIR", in_be16(l++), PC_NBITS);
  132. binary("PD_DIR", in_be16(r++), PD_NBITS);
  133. binary("PC_PAR", in_be16(l++), PC_NBITS);
  134. binary("PD_PAR", in_be16(r++), PD_NBITS);
  135. binary("PC_SO ", in_be16(l++), PC_NBITS);
  136. binary(" ", 0, 0);
  137. r++;
  138. binary("PC_DAT", in_be16(l++), PC_NBITS);
  139. binary("PD_DAT", in_be16(r++), PD_NBITS);
  140. binary("PC_INT", in_be16(l++), PC_NBITS);
  141. header();
  142. return 0;
  143. }
  144. /*
  145. * set the io pins
  146. * this needs a clean up for smaller tighter code
  147. * use *uint and set the address based on cmd + port
  148. */
  149. static int do_iopset(struct cmd_tbl *cmdtp, int flag, int argc,
  150. char *const argv[])
  151. {
  152. uint rcode = 0;
  153. iopin_t iopin;
  154. static uint port;
  155. static uint pin;
  156. static uint value;
  157. static enum {
  158. DIR,
  159. PAR,
  160. SOR,
  161. ODR,
  162. DAT,
  163. INT
  164. } cmd = DAT;
  165. if (argc != 5) {
  166. puts("iopset PORT PIN CMD VALUE\n");
  167. return 1;
  168. }
  169. port = argv[1][0] - 'A';
  170. if (port > 3)
  171. port -= 0x20;
  172. if (port > 3)
  173. rcode = 1;
  174. pin = simple_strtol(argv[2], NULL, 10);
  175. if (pin > 31)
  176. rcode = 1;
  177. switch (argv[3][0]) {
  178. case 'd':
  179. if (argv[3][1] == 'a')
  180. cmd = DAT;
  181. else if (argv[3][1] == 'i')
  182. cmd = DIR;
  183. else
  184. rcode = 1;
  185. break;
  186. case 'p':
  187. cmd = PAR;
  188. break;
  189. case 'o':
  190. cmd = ODR;
  191. break;
  192. case 's':
  193. cmd = SOR;
  194. break;
  195. case 'i':
  196. cmd = INT;
  197. break;
  198. default:
  199. printf("iopset: unknown command %s\n", argv[3]);
  200. rcode = 1;
  201. }
  202. if (argv[4][0] == '1')
  203. value = 1;
  204. else if (argv[4][0] == '0')
  205. value = 0;
  206. else
  207. rcode = 1;
  208. if (rcode == 0) {
  209. iopin.port = port;
  210. iopin.pin = pin;
  211. iopin.flag = 0;
  212. switch (cmd) {
  213. case DIR:
  214. if (value)
  215. iopin_set_out(&iopin);
  216. else
  217. iopin_set_in(&iopin);
  218. break;
  219. case PAR:
  220. if (value)
  221. iopin_set_ded(&iopin);
  222. else
  223. iopin_set_gen(&iopin);
  224. break;
  225. case SOR:
  226. if (value)
  227. iopin_set_opt2(&iopin);
  228. else
  229. iopin_set_opt1(&iopin);
  230. break;
  231. case ODR:
  232. if (value)
  233. iopin_set_odr(&iopin);
  234. else
  235. iopin_set_act(&iopin);
  236. break;
  237. case DAT:
  238. if (value)
  239. iopin_set_high(&iopin);
  240. else
  241. iopin_set_low(&iopin);
  242. break;
  243. case INT:
  244. if (value)
  245. iopin_set_falledge(&iopin);
  246. else
  247. iopin_set_anyedge(&iopin);
  248. break;
  249. }
  250. }
  251. return rcode;
  252. }
  253. static void prbrg(int n, uint val)
  254. {
  255. uint extc = (val >> 14) & 3;
  256. uint cd = (val & CPM_BRG_CD_MASK) >> 1;
  257. uint div16 = (val & CPM_BRG_DIV16) != 0;
  258. ulong clock = gd->cpu_clk;
  259. printf("BRG%d:", n);
  260. if (val & CPM_BRG_RST)
  261. puts(" RESET");
  262. else
  263. puts(" ");
  264. if (val & CPM_BRG_EN)
  265. puts(" ENABLED");
  266. else
  267. puts(" DISABLED");
  268. printf(" EXTC=%d", extc);
  269. if (val & CPM_BRG_ATB)
  270. puts(" ATB");
  271. else
  272. puts(" ");
  273. printf(" DIVIDER=%4d", cd);
  274. if (extc == 0 && cd != 0) {
  275. uint baudrate;
  276. if (div16)
  277. baudrate = (clock / 16) / (cd + 1);
  278. else
  279. baudrate = clock / (cd + 1);
  280. printf("=%6d bps", baudrate);
  281. } else {
  282. puts(" ");
  283. }
  284. if (val & CPM_BRG_DIV16)
  285. puts(" DIV16");
  286. else
  287. puts(" ");
  288. putc('\n');
  289. }
  290. static int do_brginfo(struct cmd_tbl *cmdtp, int flag, int argc,
  291. char *const argv[])
  292. {
  293. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  294. cpm8xx_t __iomem *cp = &immap->im_cpm;
  295. uint __iomem *p = &cp->cp_brgc1;
  296. int i = 1;
  297. while (i <= 4)
  298. prbrg(i++, in_be32(p++));
  299. return 0;
  300. }
  301. #ifdef CONFIG_CMD_REGINFO
  302. void print_reginfo(void)
  303. {
  304. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  305. sit8xx_t __iomem *timers = &immap->im_sit;
  306. printf("\nSystem Configuration registers\n"
  307. "\tIMMR\t0x%08X\n", get_immr());
  308. do_siuinfo(NULL, 0, 0, NULL);
  309. printf("Memory Controller Registers\n");
  310. do_memcinfo(NULL, 0, 0, NULL);
  311. printf("\nSystem Integration Timers\n");
  312. printf("\tTBSCR\t0x%04X\tRTCSC\t0x%04X\n",
  313. in_be16(&timers->sit_tbscr), in_be16(&timers->sit_rtcsc));
  314. printf("\tPISCR\t0x%04X\n", in_be16(&timers->sit_piscr));
  315. }
  316. #endif
  317. /***************************************************/
  318. U_BOOT_CMD(
  319. siuinfo, 1, 1, do_siuinfo,
  320. "print System Interface Unit (SIU) registers",
  321. ""
  322. );
  323. U_BOOT_CMD(
  324. memcinfo, 1, 1, do_memcinfo,
  325. "print Memory Controller registers",
  326. ""
  327. );
  328. U_BOOT_CMD(
  329. carinfo, 1, 1, do_carinfo,
  330. "print Clocks and Reset registers",
  331. ""
  332. );
  333. U_BOOT_CMD(
  334. iopinfo, 1, 1, do_iopinfo,
  335. "print I/O Port registers",
  336. ""
  337. );
  338. U_BOOT_CMD(
  339. iopset, 5, 0, do_iopset,
  340. "set I/O Port registers",
  341. "PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1"
  342. );
  343. U_BOOT_CMD(
  344. brginfo, 1, 1, do_brginfo,
  345. "print Baud Rate Generator (BRG) registers",
  346. ""
  347. );